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go/src/crypto/sha1/sha1block_arm.s

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An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
// Copyright 2014 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.
//
// ARM version of md5block.go
all: copy cmd/ld/textflag.h into pkg/GOOS_GOARCH The file is used by assembly code to define symbols like NOSPLIT. Having it hidden inside the cmd directory makes it hard to access outside the standard repository. Solution: As with a couple of other files used by cgo, copy the file into the pkg directory and add a -I argument to the assembler to access it. Thus one can write just #include "textflag.h" in .s files. The names in runtime are not updated because in the boot sequence the file has not been copied yet when runtime is built. All other .s files in the repository are updated. Changes to doc/asm.html, src/cmd/dist/build.c, and src/cmd/go/build.go are hand-made. The rest are just the renaming done by a global substitution. (Yay sam). LGTM=rsc R=rsc CC=golang-codereviews https://golang.org/cl/128050043
2014-08-12 18:04:45 -06:00
#include "textflag.h"
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
// SHA1 block routine. See sha1block.go for Go equivalent.
//
// There are 80 rounds of 4 types:
// - rounds 0-15 are type 1 and load data (ROUND1 macro).
// - rounds 16-19 are type 1 and do not load data (ROUND1x macro).
// - rounds 20-39 are type 2 and do not load data (ROUND2 macro).
// - rounds 40-59 are type 3 and do not load data (ROUND3 macro).
// - rounds 60-79 are type 4 and do not load data (ROUND4 macro).
//
// Each round loads or shuffles the data, then computes a per-round
// function of b, c, d, and then mixes the result into and rotates the
// five registers a, b, c, d, e holding the intermediate results.
//
// The register rotation is implemented by rotating the arguments to
// the round macros instead of by explicit move instructions.
// Register definitions
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
#define Rdata R0 // Pointer to incoming data
#define Rconst R1 // Current constant for SHA round
#define Ra R2 // SHA1 accumulator
#define Rb R3 // SHA1 accumulator
#define Rc R4 // SHA1 accumulator
#define Rd R5 // SHA1 accumulator
#define Re R6 // SHA1 accumulator
#define Rt0 R7 // Temporary
#define Rt1 R8 // Temporary
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
// r9, r10 are forbidden
// r11 is OK provided you check the assembler that no synthetic instructions use it
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
#define Rt2 R11 // Temporary
#define Rctr R12 // loop counter
#define Rw R14 // point to w buffer
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
// func block(dig *digest, p []byte)
// 0(FP) is *digest
// 4(FP) is p.array (struct Slice)
// 8(FP) is p.len
//12(FP) is p.cap
//
// Stack frame
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
#define p_end -4 // -4(SP) pointer to the end of data
#define p_data (p_end - 4) // -8(SP) current data pointer
#define w_buf (p_data - 4*80) // -328(SP) 80 words temporary buffer w uint32[80]
#define saved (w_buf - 4*5) // -348(SP) saved sha1 registers a,b,c,d,e - these must be last
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
// Total size +4 for saved LR is 352
// w[i] = p[j]<<24 | p[j+1]<<16 | p[j+2]<<8 | p[j+3]
// e += w[i]
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
#define LOAD(Re) \
MOVBU 2(Rdata), Rt0 ; \
MOVBU 3(Rdata), Rt1 ; \
MOVBU 1(Rdata), Rt2 ; \
ORR Rt0<<8, Rt1, Rt0 ; \
MOVBU.P 4(Rdata), Rt1 ; \
ORR Rt2<<16, Rt0, Rt0 ; \
ORR Rt1<<24, Rt0, Rt0 ; \
MOVW.P Rt0, 4(Rw) ; \
ADD Rt0, Re, Re
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
// tmp := w[(i-3)&0xf] ^ w[(i-8)&0xf] ^ w[(i-14)&0xf] ^ w[(i)&0xf]
// w[i&0xf] = tmp<<1 | tmp>>(32-1)
// e += w[i&0xf]
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
#define SHUFFLE(Re) \
MOVW (-16*4)(Rw), Rt0 ; \
MOVW (-14*4)(Rw), Rt1 ; \
MOVW (-8*4)(Rw), Rt2 ; \
EOR Rt0, Rt1, Rt0 ; \
MOVW (-3*4)(Rw), Rt1 ; \
EOR Rt2, Rt0, Rt0 ; \
EOR Rt0, Rt1, Rt0 ; \
MOVW Rt0@>(32-1), Rt0 ; \
MOVW.P Rt0, 4(Rw) ; \
ADD Rt0, Re, Re
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
// t1 = (b & c) | ((~b) & d)
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
#define FUNC1(Ra, Rb, Rc, Rd, Re) \
MVN Rb, Rt1 ; \
AND Rb, Rc, Rt0 ; \
AND Rd, Rt1, Rt1 ; \
ORR Rt0, Rt1, Rt1
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
// t1 = b ^ c ^ d
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
#define FUNC2(Ra, Rb, Rc, Rd, Re) \
EOR Rb, Rc, Rt1 ; \
EOR Rd, Rt1, Rt1
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
// t1 = (b & c) | (b & d) | (c & d) =
// t1 = (b & c) | ((b | c) & d)
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
#define FUNC3(Ra, Rb, Rc, Rd, Re) \
ORR Rb, Rc, Rt0 ; \
AND Rb, Rc, Rt1 ; \
AND Rd, Rt0, Rt0 ; \
ORR Rt0, Rt1, Rt1
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
#define FUNC4 FUNC2
// a5 := a<<5 | a>>(32-5)
// b = b<<30 | b>>(32-30)
// e = a5 + t1 + e + const
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
#define MIX(Ra, Rb, Rc, Rd, Re) \
ADD Rt1, Re, Re ; \
MOVW Rb@>(32-30), Rb ; \
ADD Ra@>(32-5), Re, Re ; \
ADD Rconst, Re, Re
#define ROUND1(Ra, Rb, Rc, Rd, Re) \
LOAD(Re) ; \
FUNC1(Ra, Rb, Rc, Rd, Re) ; \
MIX(Ra, Rb, Rc, Rd, Re)
#define ROUND1x(Ra, Rb, Rc, Rd, Re) \
SHUFFLE(Re) ; \
FUNC1(Ra, Rb, Rc, Rd, Re) ; \
MIX(Ra, Rb, Rc, Rd, Re)
#define ROUND2(Ra, Rb, Rc, Rd, Re) \
SHUFFLE(Re) ; \
FUNC2(Ra, Rb, Rc, Rd, Re) ; \
MIX(Ra, Rb, Rc, Rd, Re)
#define ROUND3(Ra, Rb, Rc, Rd, Re) \
SHUFFLE(Re) ; \
FUNC3(Ra, Rb, Rc, Rd, Re) ; \
MIX(Ra, Rb, Rc, Rd, Re)
#define ROUND4(Ra, Rb, Rc, Rd, Re) \
SHUFFLE(Re) ; \
FUNC4(Ra, Rb, Rc, Rd, Re) ; \
MIX(Ra, Rb, Rc, Rd, Re)
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
// func block(dig *digest, p []byte)
TEXT ·block(SB), 0, $352-16
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
MOVW p+4(FP), Rdata // pointer to the data
MOVW p_len+8(FP), Rt0 // number of bytes
ADD Rdata, Rt0
[dev.cc] cmd/asm: make 4(SP) illegal except on 386 Require a name to be specified when referencing the pseudo-stack. If you want a real stack offset, use the hardware stack pointer (e.g., R13 on arm), not SP. Fix affected assembly files. Change-Id: If3545f187a43cdda4acc892000038ec25901132a Reviewed-on: https://go-review.googlesource.com/5120 Run-TryBot: Rob Pike <r@golang.org> Reviewed-by: Russ Cox <rsc@golang.org> Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-17 19:30:27 -07:00
MOVW Rt0, p_end(R13) // pointer to end of data
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
// Load up initial SHA1 accumulator
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
MOVW dig+0(FP), Rt0
MOVM.IA (Rt0), [Ra,Rb,Rc,Rd,Re]
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
loop:
// Save registers at SP+4 onwards
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
MOVM.IB [Ra,Rb,Rc,Rd,Re], (R13)
[dev.cc] cmd/asm: make 4(SP) illegal except on 386 Require a name to be specified when referencing the pseudo-stack. If you want a real stack offset, use the hardware stack pointer (e.g., R13 on arm), not SP. Fix affected assembly files. Change-Id: If3545f187a43cdda4acc892000038ec25901132a Reviewed-on: https://go-review.googlesource.com/5120 Run-TryBot: Rob Pike <r@golang.org> Reviewed-by: Russ Cox <rsc@golang.org> Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-17 19:30:27 -07:00
MOVW $w_buf(R13), Rw
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
MOVW $0x5A827999, Rconst
MOVW $3, Rctr
loop1: ROUND1(Ra, Rb, Rc, Rd, Re)
ROUND1(Re, Ra, Rb, Rc, Rd)
ROUND1(Rd, Re, Ra, Rb, Rc)
ROUND1(Rc, Rd, Re, Ra, Rb)
ROUND1(Rb, Rc, Rd, Re, Ra)
SUB.S $1, Rctr
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
BNE loop1
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
ROUND1(Ra, Rb, Rc, Rd, Re)
ROUND1x(Re, Ra, Rb, Rc, Rd)
ROUND1x(Rd, Re, Ra, Rb, Rc)
ROUND1x(Rc, Rd, Re, Ra, Rb)
ROUND1x(Rb, Rc, Rd, Re, Ra)
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
MOVW $0x6ED9EBA1, Rconst
MOVW $4, Rctr
loop2: ROUND2(Ra, Rb, Rc, Rd, Re)
ROUND2(Re, Ra, Rb, Rc, Rd)
ROUND2(Rd, Re, Ra, Rb, Rc)
ROUND2(Rc, Rd, Re, Ra, Rb)
ROUND2(Rb, Rc, Rd, Re, Ra)
SUB.S $1, Rctr
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
BNE loop2
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
MOVW $0x8F1BBCDC, Rconst
MOVW $4, Rctr
loop3: ROUND3(Ra, Rb, Rc, Rd, Re)
ROUND3(Re, Ra, Rb, Rc, Rd)
ROUND3(Rd, Re, Ra, Rb, Rc)
ROUND3(Rc, Rd, Re, Ra, Rb)
ROUND3(Rb, Rc, Rd, Re, Ra)
SUB.S $1, Rctr
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
BNE loop3
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
MOVW $0xCA62C1D6, Rconst
MOVW $4, Rctr
loop4: ROUND4(Ra, Rb, Rc, Rd, Re)
ROUND4(Re, Ra, Rb, Rc, Rd)
ROUND4(Rd, Re, Ra, Rb, Rc)
ROUND4(Rc, Rd, Re, Ra, Rb)
ROUND4(Rb, Rc, Rd, Re, Ra)
SUB.S $1, Rctr
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
BNE loop4
// Accumulate - restoring registers from SP+4
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
MOVM.IB (R13), [Rt0,Rt1,Rt2,Rctr,Rw]
ADD Rt0, Ra
ADD Rt1, Rb
ADD Rt2, Rc
ADD Rctr, Rd
ADD Rw, Re
[dev.cc] cmd/asm: make 4(SP) illegal except on 386 Require a name to be specified when referencing the pseudo-stack. If you want a real stack offset, use the hardware stack pointer (e.g., R13 on arm), not SP. Fix affected assembly files. Change-Id: If3545f187a43cdda4acc892000038ec25901132a Reviewed-on: https://go-review.googlesource.com/5120 Run-TryBot: Rob Pike <r@golang.org> Reviewed-by: Russ Cox <rsc@golang.org> Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-17 19:30:27 -07:00
MOVW p_end(R13), Rt0
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
CMP Rt0, Rdata
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
BLO loop
// Save final SHA1 accumulator
[dev.cc] all: edit assembly source for ARM to be more regular Several .s files for ARM had several properties the new assembler will not support. These include: - mentioning SP or PC as a hardware register These are always pseudo-registers except that in some contexts they're not, and it's confusing because the context should not affect which register you mean. Change the references to the hardware registers to be explicit: R13 for SP, R15 for PC. - constant creation using assignment The files say a=b when they could instead say #define a b. There is no reason to have both mechanisms. - R(0) to refer to R0. Some macros use this to a great extent. Again, it's easy just to use a #define to rename a register. Change-Id: I002335ace8e876c5b63c71c2560533eb835346d2 Reviewed-on: https://go-review.googlesource.com/4822 Reviewed-by: Dave Cheney <dave@cheney.net>
2015-02-13 15:21:18 -07:00
MOVW dig+0(FP), Rt0
MOVM.IA [Ra,Rb,Rc,Rd,Re], (Rt0)
An ARM version of sha1block.go with a big improvement in throughput (up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
2014-02-12 11:24:52 -07:00
RET
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