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https://github.com/golang/go
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An ARM version of sha1block.go with a big improvement in throughput
(up to 2.8x). This is a partially unrolled version which performs better for small hashes and only sacrifices a small amount of ultimate speed to a fully unrolled version which uses 5k of code. Code size Before 1636 bytes After 1880 bytes 15% larger Benchmarks on Samsung Exynos 5 ARMv7 Chromebook benchmark old ns/op new ns/op delta BenchmarkHash8Bytes 1907 1136 -40.43% BenchmarkHash1K 20280 7547 -62.79% BenchmarkHash8K 148469 52576 -64.59% benchmark old MB/s new MB/s speedup BenchmarkHash8Bytes 4.19 7.04 1.68x BenchmarkHash1K 50.49 135.68 2.69x BenchmarkHash8K 55.18 155.81 2.82x LGTM=dave, agl R=dave, bradfitz, agl, adg, nick CC=golang-codereviews https://golang.org/cl/56990044
This commit is contained in:
Nick Craig-Wood
Adam Langley
parent
2ea859a779
commit
44c252bda2
@ -2,7 +2,7 @@
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build !amd64,!386
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// +build !amd64,!386,!arm
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// SHA1 block step.
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// In its own file so that a faster assembly or C version
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217
src/pkg/crypto/sha1/sha1block_arm.s
Normal file
217
src/pkg/crypto/sha1/sha1block_arm.s
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@ -0,0 +1,217 @@
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// Copyright 2014 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//
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// ARM version of md5block.go
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#include "../../../cmd/ld/textflag.h"
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// SHA1 block routine. See sha1block.go for Go equivalent.
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//
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// There are 80 rounds of 4 types:
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// - rounds 0-15 are type 1 and load data (ROUND1 macro).
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// - rounds 16-19 are type 1 and do not load data (ROUND1x macro).
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// - rounds 20-39 are type 2 and do not load data (ROUND2 macro).
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// - rounds 40-59 are type 3 and do not load data (ROUND3 macro).
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// - rounds 60-79 are type 4 and do not load data (ROUND4 macro).
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//
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// Each round loads or shuffles the data, then computes a per-round
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// function of b, c, d, and then mixes the result into and rotates the
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// five registers a, b, c, d, e holding the intermediate results.
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//
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// The register rotation is implemented by rotating the arguments to
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// the round macros instead of by explicit move instructions.
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// Register definitions
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data = 0 // Pointer to incoming data
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const = 1 // Current constant for SHA round
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a = 2 // SHA1 accumulator
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b = 3 // SHA1 accumulator
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c = 4 // SHA1 accumulator
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d = 5 // SHA1 accumulator
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e = 6 // SHA1 accumulator
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t0 = 7 // Temporary
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t1 = 8 // Temporary
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// r9, r10 are forbidden
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// r11 is OK provided you check the assembler that no synthetic instructions use it
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t2 = 11 // Temporary
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ctr = 12 // loop counter
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w = 14 // point to w buffer
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// func block(dig *digest, p []byte)
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// 0(FP) is *digest
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// 4(FP) is p.array (struct Slice)
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// 8(FP) is p.len
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//12(FP) is p.cap
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//
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// Stack frame
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p_end = -4 // -4(SP) pointer to the end of data
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p_data = p_end - 4 // -8(SP) current data pointer
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w_buf = p_data - 4*80 // -328(SP) 80 words temporary buffer w uint32[80]
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saved = w_buf - 4*5 // -348(SP) saved sha1 registers a,b,c,d,e - these must be last
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// Total size +4 for saved LR is 352
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// w[i] = p[j]<<24 | p[j+1]<<16 | p[j+2]<<8 | p[j+3]
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// e += w[i]
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#define LOAD(e) \
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MOVBU 2(R(data)), R(t0) ; \
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MOVBU 3(R(data)), R(t1) ; \
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MOVBU 1(R(data)), R(t2) ; \
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ORR R(t0)<<8, R(t1), R(t0) ; \
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MOVBU.P 4(R(data)), R(t1) ; \
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ORR R(t2)<<16, R(t0), R(t0) ; \
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ORR R(t1)<<24, R(t0), R(t0) ; \
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MOVW.P R(t0), 4(R(w)) ; \
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ADD R(t0), R(e), R(e)
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// tmp := w[(i-3)&0xf] ^ w[(i-8)&0xf] ^ w[(i-14)&0xf] ^ w[(i)&0xf]
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// w[i&0xf] = tmp<<1 | tmp>>(32-1)
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// e += w[i&0xf]
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#define SHUFFLE(e) \
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MOVW (-16*4)(R(w)), R(t0) ; \
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MOVW (-14*4)(R(w)), R(t1) ; \
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MOVW (-8*4)(R(w)), R(t2) ; \
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EOR R(t0), R(t1), R(t0) ; \
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MOVW (-3*4)(R(w)), R(t1) ; \
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EOR R(t2), R(t0), R(t0) ; \
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EOR R(t0), R(t1), R(t0) ; \
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MOVW R(t0)@>(32-1), R(t0) ; \
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MOVW.P R(t0), 4(R(w)) ; \
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ADD R(t0), R(e), R(e)
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// t1 = (b & c) | ((~b) & d)
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#define FUNC1(a, b, c, d, e) \
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MVN R(b), R(t1) ; \
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AND R(b), R(c), R(t0) ; \
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AND R(d), R(t1), R(t1) ; \
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ORR R(t0), R(t1), R(t1)
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// t1 = b ^ c ^ d
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#define FUNC2(a, b, c, d, e) \
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EOR R(b), R(c), R(t1) ; \
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EOR R(d), R(t1), R(t1)
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// t1 = (b & c) | (b & d) | (c & d) =
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// t1 = (b & c) | ((b | c) & d)
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#define FUNC3(a, b, c, d, e) \
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ORR R(b), R(c), R(t0) ; \
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AND R(b), R(c), R(t1) ; \
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AND R(d), R(t0), R(t0) ; \
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ORR R(t0), R(t1), R(t1)
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#define FUNC4 FUNC2
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// a5 := a<<5 | a>>(32-5)
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// b = b<<30 | b>>(32-30)
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// e = a5 + t1 + e + const
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#define MIX(a, b, c, d, e) \
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ADD R(t1), R(e), R(e) ; \
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MOVW R(b)@>(32-30), R(b) ; \
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ADD R(a)@>(32-5), R(e), R(e) ; \
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ADD R(const), R(e), R(e)
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#define ROUND1(a, b, c, d, e) \
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LOAD(e) ; \
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FUNC1(a, b, c, d, e) ; \
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MIX(a, b, c, d, e)
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#define ROUND1x(a, b, c, d, e) \
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SHUFFLE(e) ; \
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FUNC1(a, b, c, d, e) ; \
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MIX(a, b, c, d, e)
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#define ROUND2(a, b, c, d, e) \
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SHUFFLE(e) ; \
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FUNC2(a, b, c, d, e) ; \
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MIX(a, b, c, d, e)
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#define ROUND3(a, b, c, d, e) \
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SHUFFLE(e) ; \
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FUNC3(a, b, c, d, e) ; \
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MIX(a, b, c, d, e)
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#define ROUND4(a, b, c, d, e) \
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SHUFFLE(e) ; \
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FUNC4(a, b, c, d, e) ; \
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MIX(a, b, c, d, e)
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// func block(dig *digest, p []byte)
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TEXT ·block(SB), 0, $352-16
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MOVW p+4(FP), R(data) // pointer to the data
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MOVW p_len+8(FP), R(t0) // number of bytes
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ADD R(data), R(t0)
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MOVW R(t0), p_end(SP) // pointer to end of data
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// Load up initial SHA1 accumulator
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MOVW dig+0(FP), R(t0)
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MOVM.IA (R(t0)), [R(a),R(b),R(c),R(d),R(e)]
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loop:
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// Save registers at SP+4 onwards
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MOVM.IB [R(a),R(b),R(c),R(d),R(e)], (R13)
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MOVW $w_buf(SP), R(w)
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MOVW $0x5A827999, R(const)
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MOVW $3, R(ctr)
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loop1: ROUND1(a, b, c, d, e)
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ROUND1(e, a, b, c, d)
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ROUND1(d, e, a, b, c)
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ROUND1(c, d, e, a, b)
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ROUND1(b, c, d, e, a)
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SUB.S $1, R(ctr)
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BNE loop1
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ROUND1(a, b, c, d, e)
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ROUND1x(e, a, b, c, d)
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ROUND1x(d, e, a, b, c)
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ROUND1x(c, d, e, a, b)
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ROUND1x(b, c, d, e, a)
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MOVW $0x6ED9EBA1, R(const)
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MOVW $4, R(ctr)
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loop2: ROUND2(a, b, c, d, e)
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ROUND2(e, a, b, c, d)
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ROUND2(d, e, a, b, c)
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ROUND2(c, d, e, a, b)
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ROUND2(b, c, d, e, a)
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SUB.S $1, R(ctr)
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BNE loop2
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MOVW $0x8F1BBCDC, R(const)
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MOVW $4, R(ctr)
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loop3: ROUND3(a, b, c, d, e)
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ROUND3(e, a, b, c, d)
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ROUND3(d, e, a, b, c)
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ROUND3(c, d, e, a, b)
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ROUND3(b, c, d, e, a)
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SUB.S $1, R(ctr)
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BNE loop3
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MOVW $0xCA62C1D6, R(const)
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MOVW $4, R(ctr)
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loop4: ROUND4(a, b, c, d, e)
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ROUND4(e, a, b, c, d)
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ROUND4(d, e, a, b, c)
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ROUND4(c, d, e, a, b)
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ROUND4(b, c, d, e, a)
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SUB.S $1, R(ctr)
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BNE loop4
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// Accumulate - restoring registers from SP+4
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MOVM.IB (R13), [R(t0),R(t1),R(t2),R(ctr),R(w)]
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ADD R(t0), R(a)
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ADD R(t1), R(b)
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ADD R(t2), R(c)
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ADD R(ctr), R(d)
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ADD R(w), R(e)
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MOVW p_end(SP), R(t0)
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CMP R(t0), R(data)
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BLO loop
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// Save final SHA1 accumulator
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MOVW dig+0(FP), R(t0)
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MOVM.IA [R(a),R(b),R(c),R(d),R(e)], (R(t0))
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RET
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@ -2,7 +2,7 @@
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build amd64 386
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// +build amd64 386 arm
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package sha1
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