Commit Graph

19 Commits

Author SHA1 Message Date
kettenis
7a6863f74a The futex-based implementation of libxshmfence requires atomic operations
that hppa, m88k and sh don't provide.  Since DRI3 requires libxshmfence,
this means we can't enable DRI3 on these platforms.

ok matthieu@
2018-06-28 20:11:32 +00:00
kettenis
c7bc2b344c Enable various bits of DRI3 support.
ok matthieu@
2018-06-26 06:51:17 +00:00
jsg
ff54d44d65 No need to override PTHREADSTUBS_CFLAGS/PTHREADSTUBS_LIBS anymore
as the configure scripts have been changed to avoid pthread-stubs.
2018-02-21 06:01:53 +00:00
jsg
646d14d2d3 Revert to Mesa 13.0.6 again.
Corruption has again been reported on Intel hardware running Xorg with
the modesetting driver (which uses OpenGL based acceleration instead of
SNA acceleration the intel driver defaults to).

Reported in various forms on Sandy Bridge (X220), Ivy Bridge (X230) and
Haswell (X240).  Confirmed to not occur with the intel driver but the
xserver was changed to default to the modesetting driver on >= gen4
hardware (except Ironlake).

One means of triggering this is to open a large pdf with xpdf on an
idle machine and highlight a section of the document.

There have been reports of gpu hangs on gen4 intel hardware
(T500 with GM45, X61 with 965GM) when starting Xorg as well.
2018-01-08 05:41:20 +00:00
jsg
702572c995 Merge Mesa 17.2.8 2017-12-31 07:12:12 +00:00
matthieu
4b98ce0cc0 Remove all references to libpthread-stubs from xenocara.
"looks sane" guenther@.
2017-10-23 16:50:28 +00:00
jsg
ad2ad70ae1 Revert to Mesa 13.0.6 to hopefully address rendering issues a handful of
people have reported with xpdf/fvwm on ivy bridge with modesetting driver.
2017-08-26 16:59:17 +00:00
jsg
754e2ec1d4 Make disabling regenerating source files provided in Mesa distfiles that
require python/bison a configure flag instead of the previous way of
testing whether python was found (which shouldn't be the case in
xenocara even with ports packages installed).

This is required when timestamps change on files causing targets to be
invoked that will break if python and bison aren't available and found
in path by the configure script.
2017-08-26 05:58:10 +00:00
jsg
36c1bd020e Merge Mesa 17.1.6 2017-08-14 09:57:57 +00:00
espie
564a026ce3 add a real dependency on the shadow tree, removes the need to run
make depend

okay matthieu@

(I added a comment explaining why this comes after bsd.xorg.mk)
2017-07-02 09:52:23 +00:00
visa
55a8e552e5 Make X work with radeondrm(4) hardware on loongson.
OK jsg@
2017-05-21 13:18:29 +00:00
stsp
cd197cfa4b Disable the shader cache in Mesa on powerpc. Its implementation uses gcc
atomic builtins on a 64 bit integer which is not supported on 32 bit powerpc.
Makes 3D work again on a PowerBook G4 with an ATI RV350 video card.
tweak and ok jsg@
2017-01-21 11:23:09 +00:00
jsg
e2d9807505 Merge Mesa 13.0.2 2016-12-11 08:53:19 +00:00
jsg
363dd58b73 Merge Mesa 11.2.2 2016-05-29 10:40:19 +00:00
matthieu
688f9b80ed On alpha with -O2 gcc gets an ICE on 2 files.
With help of jsg@
2016-02-20 10:49:47 +00:00
jsg
bf795ce77a Build the gallium software rasteriser (softpipe). This avoids a problem
mpi found where the r300 driver would not load on macppc due to an
undefined drisw_create_screen symbol.

The code related to that symbol was removed sometime after Mesa 11.0
branched.

Initial diff from and ok mpi@
2015-12-20 12:31:01 +00:00
jsg
1ff7fe0da7 Set the configure option to enable floating point textures.
While the i965 driver enables support unconditionally other drivers
such as r600 require this before they will claim to support OpenGL 3.x
2015-12-20 12:15:55 +00:00
kettenis
b31a77d567 On i386, compile with -march=i586. The i965 driver requires 64-bit atomic
operations and older CPUs lack the needed instructions.  The hardware
supported by that driver will never be used together those older CPUs.
This might mean that even the software rasterizer doesn't work anymore on
those.  But they're so slow that you probably wouldn't want to anyway.

ok jsg@
2015-11-26 19:05:49 +00:00
jsg
3204a661ed add a makefile for xenocara 2015-11-22 03:11:30 +00:00