Import libdrm 2.4.65
This commit is contained in:
parent
1cd20ba8aa
commit
0733b38856
@ -22,8 +22,10 @@
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# Authors:
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# Jérôme Glisse <glisse@freedesktop.org>
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include Makefile.sources
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AM_CFLAGS = \
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$(WARN_CFLAGS) -Wno-switch-enum \
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$(WARN_CFLAGS) \
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-I$(top_srcdir) \
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$(PTHREADSTUBS_CFLAGS) \
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-I$(top_srcdir)/include/drm
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@ -33,22 +35,10 @@ libdrm_amdgpu_ladir = $(libdir)
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libdrm_amdgpu_la_LDFLAGS = -version-number 1:0:0 -no-undefined
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libdrm_amdgpu_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@
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libdrm_amdgpu_la_SOURCES = \
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amdgpu.h \
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amdgpu_bo.c \
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amdgpu_cs.c \
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amdgpu_device.c \
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amdgpu_gpu_info.c \
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amdgpu_internal.h \
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amdgpu_vamgr.c \
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util_hash.c \
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util_hash.h \
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util_hash_table.c \
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util_hash_table.h
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libdrm_amdgpu_la_SOURCES = $(LIBDRM_AMDGPU_FILES)
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libdrm_amdgpuincludedir = ${includedir}/libdrm
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libdrm_amdgpuinclude_HEADERS = \
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amdgpu.h
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libdrm_amdgpuinclude_HEADERS = $(LIBDRM_AMDGPU_H_FILES)
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pkgconfigdir = @pkgconfigdir@
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pkgconfig_DATA = libdrm_amdgpu.pc
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14
lib/libdrm/amdgpu/Makefile.sources
Normal file
14
lib/libdrm/amdgpu/Makefile.sources
Normal file
@ -0,0 +1,14 @@
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LIBDRM_AMDGPU_FILES := \
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amdgpu_bo.c \
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amdgpu_cs.c \
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amdgpu_device.c \
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amdgpu_gpu_info.c \
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amdgpu_internal.h \
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amdgpu_vamgr.c \
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util_hash.c \
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util_hash.h \
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util_hash_table.c \
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util_hash_table.h
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LIBDRM_AMDGPU_H_FILES := \
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amdgpu.h
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@ -32,6 +32,9 @@
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#include <pthread.h>
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#include <sched.h>
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#include <sys/ioctl.h>
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#ifdef HAVE_ALLOCA_H
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# include <alloca.h>
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#endif
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#include "xf86drm.h"
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#include "amdgpu_drm.h"
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@ -63,10 +66,6 @@ int amdgpu_cs_ctx_create(amdgpu_device_handle dev,
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gpu_context->dev = dev;
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r = pthread_mutex_init(&gpu_context->sequence_mutex, NULL);
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if (r)
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goto error;
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/* Create the context */
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memset(&args, 0, sizeof(args));
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args.in.op = AMDGPU_CTX_OP_ALLOC_CTX;
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@ -80,7 +79,6 @@ int amdgpu_cs_ctx_create(amdgpu_device_handle dev,
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return 0;
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error:
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pthread_mutex_destroy(&gpu_context->sequence_mutex);
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free(gpu_context);
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return r;
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}
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@ -101,8 +99,6 @@ int amdgpu_cs_ctx_free(amdgpu_context_handle context)
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if (NULL == context)
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return -EINVAL;
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pthread_mutex_destroy(&context->sequence_mutex);
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/* now deal with kernel side */
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memset(&args, 0, sizeof(args));
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args.in.op = AMDGPU_CTX_OP_FREE_CTX;
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@ -200,8 +196,6 @@ static int amdgpu_cs_submit_one(amdgpu_context_handle context,
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chunk_data[i].ib_data.flags = ib->flags;
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}
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pthread_mutex_lock(&context->sequence_mutex);
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if (user_fence) {
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i = cs.in.num_chunks++;
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@ -254,7 +248,6 @@ static int amdgpu_cs_submit_one(amdgpu_context_handle context,
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ibs_request->seq_no = cs.out.handle;
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error_unlock:
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pthread_mutex_unlock(&context->sequence_mutex);
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free(dependencies);
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return r;
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}
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@ -132,6 +132,8 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
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{
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amdgpu_vamgr_deinit(dev->vamgr);
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free(dev->vamgr);
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amdgpu_vamgr_deinit(dev->vamgr_32);
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free(dev->vamgr_32);
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util_hash_table_destroy(dev->bo_flink_names);
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util_hash_table_destroy(dev->bo_handles);
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pthread_mutex_destroy(&dev->bo_table_mutex);
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@ -111,9 +111,6 @@ struct amdgpu_bo_list {
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struct amdgpu_context {
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struct amdgpu_device *dev;
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/** Mutex for accessing fences and to maintain command submissions
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in good sequence. */
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pthread_mutex_t sequence_mutex;
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/* context id*/
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uint32_t id;
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};
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@ -25,6 +25,7 @@ fd_bo_new
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fd_bo_ref
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fd_bo_size
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fd_device_del
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fd_device_fd
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fd_device_new
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fd_device_new_dup
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fd_device_ref
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@ -52,6 +52,9 @@ static struct fd_bo * lookup_bo(void *tbl, uint32_t key)
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if (!drmHashLookup(tbl, key, (void **)&bo)) {
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/* found, incr refcnt and return: */
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bo = fd_bo_ref(bo);
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/* don't break the bucket if this bo was found in one */
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list_delinit(&bo->list);
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}
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return bo;
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}
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@ -223,20 +226,30 @@ out_unlock:
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struct fd_bo *
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fd_bo_from_dmabuf(struct fd_device *dev, int fd)
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{
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struct drm_prime_handle req = {
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.fd = fd,
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};
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int ret, size;
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uint32_t handle;
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struct fd_bo *bo;
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ret = drmIoctl(dev->fd, DRM_IOCTL_PRIME_FD_TO_HANDLE, &req);
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pthread_mutex_lock(&table_lock);
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ret = drmPrimeFDToHandle(dev->fd, fd, &handle);
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if (ret) {
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return NULL;
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}
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/* hmm, would be nice if we had a way to figure out the size.. */
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size = 0;
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bo = lookup_bo(dev->handle_table, handle);
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if (bo)
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goto out_unlock;
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return fd_bo_from_handle(dev, req.handle, size);
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/* lseek() to get bo size */
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size = lseek(fd, 0, SEEK_END);
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lseek(fd, 0, SEEK_CUR);
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bo = bo_from_handle(dev, size, handle);
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out_unlock:
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pthread_mutex_unlock(&table_lock);
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return bo;
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}
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struct fd_bo * fd_bo_from_name(struct fd_device *dev, uint32_t name)
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@ -373,18 +386,15 @@ uint32_t fd_bo_handle(struct fd_bo *bo)
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int fd_bo_dmabuf(struct fd_bo *bo)
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{
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if (bo->fd < 0) {
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struct drm_prime_handle req = {
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.handle = bo->handle,
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.flags = DRM_CLOEXEC,
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};
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int ret;
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int ret, prime_fd;
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ret = drmIoctl(bo->dev->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &req);
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ret = drmPrimeHandleToFD(bo->dev->fd, bo->handle, DRM_CLOEXEC,
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&prime_fd);
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if (ret) {
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return ret;
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}
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bo->fd = req.fd;
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bo->fd = prime_fd;
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}
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return dup(bo->fd);
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}
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@ -160,3 +160,8 @@ void fd_device_del(struct fd_device *dev)
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fd_device_del_impl(dev);
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pthread_mutex_unlock(&table_lock);
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}
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int fd_device_fd(struct fd_device *dev)
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{
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return dev->fd;
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}
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@ -76,6 +76,7 @@ struct fd_device * fd_device_new(int fd);
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struct fd_device * fd_device_new_dup(int fd);
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struct fd_device * fd_device_ref(struct fd_device *dev);
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void fd_device_del(struct fd_device *dev);
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int fd_device_fd(struct fd_device *dev);
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/* pipe functions:
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@ -83,7 +83,7 @@ struct fd_device {
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*/
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void *handle_table, *name_table;
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struct fd_device_funcs *funcs;
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const struct fd_device_funcs *funcs;
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struct fd_bo_bucket cache_bucket[14 * 4];
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int num_buckets;
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@ -107,7 +107,7 @@ struct fd_pipe_funcs {
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struct fd_pipe {
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struct fd_device *dev;
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enum fd_pipe_id id;
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struct fd_pipe_funcs *funcs;
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const struct fd_pipe_funcs *funcs;
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};
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struct fd_ringmarker {
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@ -141,7 +141,7 @@ struct fd_bo {
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int fd; /* dmabuf handle */
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void *map;
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atomic_t refcnt;
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struct fd_bo_funcs *funcs;
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const struct fd_bo_funcs *funcs;
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int bo_reuse;
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struct list_head list; /* bucket-list entry */
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@ -44,7 +44,7 @@ struct fd_ringbuffer {
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int size;
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uint32_t *cur, *end, *start, *last_start;
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struct fd_pipe *pipe;
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struct fd_ringbuffer_funcs *funcs;
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const struct fd_ringbuffer_funcs *funcs;
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uint32_t last_timestamp;
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struct fd_ringbuffer *parent;
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};
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@ -123,7 +123,7 @@ static void kgsl_bo_destroy(struct fd_bo *bo)
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}
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static struct fd_bo_funcs funcs = {
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static const struct fd_bo_funcs funcs = {
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.offset = kgsl_bo_offset,
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.cpu_prep = kgsl_bo_cpu_prep,
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.cpu_fini = kgsl_bo_cpu_fini,
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@ -42,7 +42,7 @@ static void kgsl_device_destroy(struct fd_device *dev)
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free(kgsl_dev);
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}
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static struct fd_device_funcs funcs = {
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static const struct fd_device_funcs funcs = {
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.bo_new_handle = kgsl_bo_new_handle,
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.bo_from_handle = kgsl_bo_from_handle,
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.pipe_new = kgsl_pipe_new,
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@ -108,7 +108,7 @@ static void kgsl_pipe_destroy(struct fd_pipe *pipe)
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free(kgsl_pipe);
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}
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static struct fd_pipe_funcs funcs = {
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static const struct fd_pipe_funcs funcs = {
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.ringbuffer_new = kgsl_ringbuffer_new,
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.get_param = kgsl_pipe_get_param,
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.wait = kgsl_pipe_wait,
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@ -191,7 +191,7 @@ static void kgsl_ringbuffer_destroy(struct fd_ringbuffer *ring)
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free(kgsl_ring);
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}
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static struct fd_ringbuffer_funcs funcs = {
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static const struct fd_ringbuffer_funcs funcs = {
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.hostptr = kgsl_ringbuffer_hostptr,
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.flush = kgsl_ringbuffer_flush,
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.emit_reloc = kgsl_ringbuffer_emit_reloc,
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@ -96,7 +96,7 @@ static void msm_bo_destroy(struct fd_bo *bo)
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}
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static struct fd_bo_funcs funcs = {
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static const struct fd_bo_funcs funcs = {
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.offset = msm_bo_offset,
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.cpu_prep = msm_bo_cpu_prep,
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.cpu_fini = msm_bo_cpu_fini,
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@ -42,7 +42,7 @@ static void msm_device_destroy(struct fd_device *dev)
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free(msm_dev);
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}
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static struct fd_device_funcs funcs = {
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static const struct fd_device_funcs funcs = {
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.bo_new_handle = msm_bo_new_handle,
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.bo_from_handle = msm_bo_from_handle,
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.pipe_new = msm_pipe_new,
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@ -80,7 +80,7 @@ static void msm_pipe_destroy(struct fd_pipe *pipe)
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free(msm_pipe);
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}
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static struct fd_pipe_funcs funcs = {
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static const struct fd_pipe_funcs funcs = {
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.ringbuffer_new = msm_ringbuffer_new,
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.get_param = msm_pipe_get_param,
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.wait = msm_pipe_wait,
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@ -356,7 +356,7 @@ static void msm_ringbuffer_destroy(struct fd_ringbuffer *ring)
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free(msm_ring);
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}
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static struct fd_ringbuffer_funcs funcs = {
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static const struct fd_ringbuffer_funcs funcs = {
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.hostptr = msm_ringbuffer_hostptr,
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.flush = msm_ringbuffer_flush,
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.reset = msm_ringbuffer_reset,
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@ -127,4 +127,97 @@
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#define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) planes */
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#define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) planes */
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/*
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* Format Modifiers:
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*
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* Format modifiers describe, typically, a re-ordering or modification
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* of the data in a plane of an FB. This can be used to express tiled/
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* swizzled formats, or compression, or a combination of the two.
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*
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* The upper 8 bits of the format modifier are a vendor-id as assigned
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* below. The lower 56 bits are assigned as vendor sees fit.
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*/
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/* Vendor Ids: */
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#define DRM_FORMAT_MOD_NONE 0
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#define DRM_FORMAT_MOD_VENDOR_INTEL 0x01
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#define DRM_FORMAT_MOD_VENDOR_AMD 0x02
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#define DRM_FORMAT_MOD_VENDOR_NV 0x03
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#define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04
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#define DRM_FORMAT_MOD_VENDOR_QCOM 0x05
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/* add more to the end as needed */
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#define fourcc_mod_code(vendor, val) \
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((((u64)DRM_FORMAT_MOD_VENDOR_## vendor) << 56) | (val & 0x00ffffffffffffffULL))
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/*
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* Format Modifier tokens:
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*
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* When adding a new token please document the layout with a code comment,
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* similar to the fourcc codes above. drm_fourcc.h is considered the
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* authoritative source for all of these.
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*/
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/* Intel framebuffer modifiers */
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/*
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* Intel X-tiling layout
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*
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* This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
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* in row-major layout. Within the tile bytes are laid out row-major, with
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* a platform-dependent stride. On top of that the memory can apply
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* platform-depending swizzling of some higher address bits into bit6.
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*
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* This format is highly platforms specific and not useful for cross-driver
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* sharing. It exists since on a given platform it does uniquely identify the
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* layout in a simple way for i915-specific userspace.
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*/
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#define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1)
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/*
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* Intel Y-tiling layout
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*
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* This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
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* in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes)
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* chunks column-major, with a platform-dependent height. On top of that the
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* memory can apply platform-depending swizzling of some higher address bits
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* into bit6.
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*
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* This format is highly platforms specific and not useful for cross-driver
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* sharing. It exists since on a given platform it does uniquely identify the
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* layout in a simple way for i915-specific userspace.
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*/
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#define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2)
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/*
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* Intel Yf-tiling layout
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*
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* This is a tiled layout using 4Kb tiles in row-major layout.
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* Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
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* are arranged in four groups (two wide, two high) with column-major layout.
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* Each group therefore consits out of four 256 byte units, which are also laid
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* out as 2x2 column-major.
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* 256 byte units are made out of four 64 byte blocks of pixels, producing
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* either a square block or a 2:1 unit.
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* 64 byte blocks of pixels contain four pixel rows of 16 bytes, where the width
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* in pixel depends on the pixel depth.
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*/
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#define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)
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/*
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* Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
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*
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* Macroblocks are laid in a Z-shape, and each pixel data is following the
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* standard NV12 style.
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* As for NV12, an image is the result of two frame buffers: one for Y,
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* one for the interleaved Cb/Cr components (1/2 the height of the Y buffer).
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* Alignment requirements are (for each buffer):
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* - multiple of 128 pixels for the width
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* - multiple of 32 pixels for the height
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*
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* For more information: see http://linuxtv.org/downloads/v4l-dvb-apis/re32.html
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*/
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#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
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#endif /* DRM_FOURCC_H */
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|
@ -322,7 +322,8 @@ struct drm_mode_fb_cmd {
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__u32 handle;
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};
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#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
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#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
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#define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */
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struct drm_mode_fb_cmd2 {
|
||||
__u32 fb_id;
|
||||
@ -343,10 +344,18 @@ struct drm_mode_fb_cmd2 {
|
||||
* So it would consist of Y as offset[0] and UV as
|
||||
* offset[1]. Note that offset[0] will generally
|
||||
* be 0.
|
||||
*
|
||||
* To accommodate tiled, compressed, etc formats, a per-plane
|
||||
* modifier can be specified. The default value of zero
|
||||
* indicates "native" format as specified by the fourcc.
|
||||
* Vendor specific modifier token. This allows, for example,
|
||||
* different tiling/swizzling pattern on different planes.
|
||||
* See discussion above of DRM_FORMAT_MOD_xxx.
|
||||
*/
|
||||
__u32 handles[4];
|
||||
__u32 pitches[4]; /* pitch for each plane */
|
||||
__u32 offsets[4]; /* offset of each plane */
|
||||
__u64 modifier[4]; /* ie, tiling, compressed (per plane) */
|
||||
};
|
||||
|
||||
#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
|
||||
|
@ -38,7 +38,10 @@ abi16_chan_nv04(struct nouveau_object *obj)
|
||||
{
|
||||
struct nouveau_device *dev = (struct nouveau_device *)obj->parent;
|
||||
struct nv04_fifo *nv04 = obj->data;
|
||||
struct drm_nouveau_channel_alloc req = {nv04->vram, nv04->gart};
|
||||
struct drm_nouveau_channel_alloc req = {
|
||||
.fb_ctxdma_handle = nv04->vram,
|
||||
.tt_ctxdma_handle = nv04->gart
|
||||
};
|
||||
int ret;
|
||||
|
||||
ret = drmCommandWriteRead(dev->fd, DRM_NOUVEAU_CHANNEL_ALLOC,
|
||||
@ -105,7 +108,9 @@ drm_private int
|
||||
abi16_engobj(struct nouveau_object *obj)
|
||||
{
|
||||
struct drm_nouveau_grobj_alloc req = {
|
||||
obj->parent->handle, obj->handle, obj->oclass
|
||||
.channel = obj->parent->handle,
|
||||
.handle = obj->handle,
|
||||
.class = obj->oclass,
|
||||
};
|
||||
struct nouveau_device *dev;
|
||||
int ret;
|
||||
@ -125,7 +130,9 @@ abi16_ntfy(struct nouveau_object *obj)
|
||||
{
|
||||
struct nv04_notify *ntfy = obj->data;
|
||||
struct drm_nouveau_notifierobj_alloc req = {
|
||||
obj->parent->handle, ntfy->object->handle, ntfy->length
|
||||
.channel = obj->parent->handle,
|
||||
.handle = ntfy->object->handle,
|
||||
.size = ntfy->length,
|
||||
};
|
||||
struct nouveau_device *dev;
|
||||
int ret;
|
||||
|
@ -177,7 +177,7 @@ nouveau_device_del(struct nouveau_device **pdev)
|
||||
int
|
||||
nouveau_getparam(struct nouveau_device *dev, uint64_t param, uint64_t *value)
|
||||
{
|
||||
struct drm_nouveau_getparam r = { param, 0 };
|
||||
struct drm_nouveau_getparam r = { .param = param };
|
||||
int fd = dev->fd, ret =
|
||||
drmCommandWriteRead(fd, DRM_NOUVEAU_GETPARAM, &r, sizeof(r));
|
||||
*value = r.value;
|
||||
@ -187,7 +187,7 @@ nouveau_getparam(struct nouveau_device *dev, uint64_t param, uint64_t *value)
|
||||
int
|
||||
nouveau_setparam(struct nouveau_device *dev, uint64_t param, uint64_t value)
|
||||
{
|
||||
struct drm_nouveau_setparam r = { param, value };
|
||||
struct drm_nouveau_setparam r = { .param = param, .value = value };
|
||||
return drmCommandWrite(dev->fd, DRM_NOUVEAU_SETPARAM, &r, sizeof(r));
|
||||
}
|
||||
|
||||
@ -348,7 +348,7 @@ nouveau_bo_del(struct nouveau_bo *bo)
|
||||
{
|
||||
struct nouveau_device_priv *nvdev = nouveau_device(bo->device);
|
||||
struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
|
||||
struct drm_gem_close req = { bo->handle };
|
||||
struct drm_gem_close req = { .handle = bo->handle };
|
||||
|
||||
if (nvbo->head.next) {
|
||||
pthread_mutex_lock(&nvdev->lock);
|
||||
|
@ -186,6 +186,7 @@ static struct omap_bo * bo_from_handle(struct omap_device *dev,
|
||||
}
|
||||
bo->dev = omap_device_ref(dev);
|
||||
bo->handle = handle;
|
||||
bo->fd = -1;
|
||||
atomic_set(&bo->refcnt, 1);
|
||||
/* add ourselves to the handle table: */
|
||||
drmHashInsert(dev->handle_table, handle, bo);
|
||||
|
@ -2,7 +2,7 @@
|
||||
#define RADEON_BO_INT
|
||||
|
||||
struct radeon_bo_manager {
|
||||
struct radeon_bo_funcs *funcs;
|
||||
const struct radeon_bo_funcs *funcs;
|
||||
int fd;
|
||||
};
|
||||
|
||||
|
@ -58,7 +58,7 @@ struct radeon_cs_funcs {
|
||||
};
|
||||
|
||||
struct radeon_cs_manager {
|
||||
struct radeon_cs_funcs *funcs;
|
||||
const struct radeon_cs_funcs *funcs;
|
||||
int fd;
|
||||
int32_t vram_limit, gart_limit;
|
||||
int32_t vram_write_used, gart_write_used;
|
||||
|
@ -33,6 +33,8 @@ check_PROGRAMS = \
|
||||
dristat \
|
||||
drmstat
|
||||
|
||||
dristat_LDADD = -lm
|
||||
|
||||
if HAVE_NOUVEAU
|
||||
SUBDIRS += nouveau
|
||||
endif
|
||||
|
@ -58,14 +58,30 @@ int drm_amdgpu[MAX_CARDS_SUPPORTED];
|
||||
|
||||
/** The table of all known test suites to run */
|
||||
static CU_SuiteInfo suites[] = {
|
||||
{ "Basic Tests", suite_basic_tests_init,
|
||||
suite_basic_tests_clean, basic_tests },
|
||||
{ "BO Tests", suite_bo_tests_init,
|
||||
suite_bo_tests_clean, bo_tests },
|
||||
{ "CS Tests", suite_cs_tests_init,
|
||||
suite_cs_tests_clean, cs_tests },
|
||||
{ "VCE Tests", suite_vce_tests_init,
|
||||
suite_vce_tests_clean, vce_tests },
|
||||
{
|
||||
.pName = "Basic Tests",
|
||||
.pInitFunc = suite_basic_tests_init,
|
||||
.pCleanupFunc = suite_basic_tests_clean,
|
||||
.pTests = basic_tests,
|
||||
},
|
||||
{
|
||||
.pName = "BO Tests",
|
||||
.pInitFunc = suite_bo_tests_init,
|
||||
.pCleanupFunc = suite_bo_tests_clean,
|
||||
.pTests = bo_tests,
|
||||
},
|
||||
{
|
||||
.pName = "CS Tests",
|
||||
.pInitFunc = suite_cs_tests_init,
|
||||
.pCleanupFunc = suite_cs_tests_clean,
|
||||
.pTests = cs_tests,
|
||||
},
|
||||
{
|
||||
.pName = "VCE Tests",
|
||||
.pInitFunc = suite_vce_tests_init,
|
||||
.pCleanupFunc = suite_vce_tests_clean,
|
||||
.pTests = vce_tests,
|
||||
},
|
||||
CU_SUITE_INFO_NULL,
|
||||
};
|
||||
|
||||
|
@ -28,6 +28,9 @@
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <unistd.h>
|
||||
#ifdef HAVE_ALLOCA_H
|
||||
# include <alloca.h>
|
||||
#endif
|
||||
|
||||
#include "CUnit/Basic.h"
|
||||
|
||||
|
@ -266,7 +266,7 @@ static void amdgpu_cs_uvd_decode(void)
|
||||
r = amdgpu_bo_cpu_map(buf_handle, (void **)&ptr);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
memcpy(ptr, uvd_decode_msg, sizeof(uvd_create_msg));
|
||||
memcpy(ptr, uvd_decode_msg, sizeof(uvd_decode_msg));
|
||||
if (family_id >= AMDGPU_FAMILY_VI)
|
||||
ptr[0x10] = 7;
|
||||
|
||||
@ -362,7 +362,7 @@ static void amdgpu_cs_uvd_destroy(void)
|
||||
r = amdgpu_bo_cpu_map(buf_handle, &msg);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
memcpy(msg, uvd_destroy_msg, sizeof(uvd_create_msg));
|
||||
memcpy(msg, uvd_destroy_msg, sizeof(uvd_destroy_msg));
|
||||
if (family_id >= AMDGPU_FAMILY_VI)
|
||||
((uint8_t*)msg)[0x10] = 7;
|
||||
|
||||
|
@ -24,7 +24,7 @@
|
||||
#ifndef _UVD_MESSAGES_H_
|
||||
#define _UVD_MESSAGES_H_
|
||||
|
||||
static uint8_t uvd_create_msg[] = {
|
||||
static const uint8_t uvd_create_msg[] = {
|
||||
0xe4,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x44,0x40,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x03,0x00,0x00,
|
||||
0xe0,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0xf9,0xf2,0x00,0x00,0x00,0x00,0x00,
|
||||
@ -250,7 +250,7 @@ static uint8_t uvd_create_msg[] = {
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
};
|
||||
|
||||
static uint8_t uvd_bitstream[] ={
|
||||
static const uint8_t uvd_bitstream[] ={
|
||||
0x00,0x00,0x01,0x25,0xb8,0x20,0x20,0x21,0x44,0xc5,0x00,0x01,0x57,0x9b,0xef,0xbe,
|
||||
0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,
|
||||
0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,
|
||||
@ -341,7 +341,7 @@ static uint8_t uvd_bitstream[] ={
|
||||
0xeb,0xae,0xba,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
};
|
||||
|
||||
static uint8_t uvd_decode_msg[] = {
|
||||
static const uint8_t uvd_decode_msg[] = {
|
||||
0xe4,0x0d,0x00,0x00,0x01,0x00,0x00,0x00,0x03,0x00,0x44,0x40,0x01,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x60,0x03,0x00,0x00,0xe0,0x01,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x80,0xf9,0xf2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
@ -567,7 +567,7 @@ static uint8_t uvd_decode_msg[] = {
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
};
|
||||
|
||||
static uint8_t uvd_destroy_msg[] = {
|
||||
static const uint8_t uvd_destroy_msg[] = {
|
||||
0xe4,0x0d,0x00,0x00,0x02,0x00,0x00,0x00,0x03,0x00,0x44,0x40,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
@ -793,7 +793,7 @@ static uint8_t uvd_destroy_msg[] = {
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
};
|
||||
|
||||
static uint8_t uvd_it_scaling_table[] = {
|
||||
static const uint8_t uvd_it_scaling_table[] = {
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
|
@ -24,7 +24,7 @@
|
||||
#ifndef _vce_ib_h_
|
||||
#define _vce_ib_h_
|
||||
|
||||
static uint32_t vce_session[3] = {
|
||||
static const uint32_t vce_session[] = {
|
||||
0x0000000c,
|
||||
0x00000001,
|
||||
0x400c0001,
|
||||
@ -41,7 +41,7 @@ static uint32_t vce_taskinfo[8] = {
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static uint32_t vce_create[12] = {
|
||||
static const uint32_t vce_create[] = {
|
||||
0x00000030,
|
||||
0x01000001,
|
||||
0x00000000,
|
||||
@ -56,7 +56,7 @@ static uint32_t vce_create[12] = {
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static uint32_t vce_rate_ctrl[28] = {
|
||||
static const uint32_t vce_rate_ctrl[] = {
|
||||
0x00000070,
|
||||
0x04000005,
|
||||
0x00000000,
|
||||
@ -87,13 +87,13 @@ static uint32_t vce_rate_ctrl[28] = {
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static uint32_t vce_config_ext[3] = {
|
||||
static const uint32_t vce_config_ext[] = {
|
||||
0x0000000c,
|
||||
0x04000001,
|
||||
0x00000003,
|
||||
};
|
||||
|
||||
static uint32_t vce_motion_est[26] = {
|
||||
static const uint32_t vce_motion_est[] = {
|
||||
0x00000068,
|
||||
0x04000007,
|
||||
0x00000001,
|
||||
@ -122,7 +122,7 @@ static uint32_t vce_motion_est[26] = {
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static uint32_t vce_rdo[19] = {
|
||||
static const uint32_t vce_rdo[] = {
|
||||
0x0000004c,
|
||||
0x04000008,
|
||||
0x00000000,
|
||||
@ -144,7 +144,7 @@ static uint32_t vce_rdo[19] = {
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static uint32_t vce_pic_ctrl[29] = {
|
||||
static const uint32_t vce_pic_ctrl[] = {
|
||||
0x00000074,
|
||||
0x04000002,
|
||||
0x00000000,
|
||||
@ -176,7 +176,7 @@ static uint32_t vce_pic_ctrl[29] = {
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static uint32_t vce_feedback[5] = {
|
||||
static const uint32_t vce_feedback[] = {
|
||||
0x00000014,
|
||||
0x05000005,
|
||||
0x00000000,
|
||||
@ -184,14 +184,14 @@ static uint32_t vce_feedback[5] = {
|
||||
0x00000001,
|
||||
};
|
||||
|
||||
static uint32_t vce_context_buffer[4] = {
|
||||
static const uint32_t vce_context_buffer[] = {
|
||||
0x00000010,
|
||||
0x05000001,
|
||||
0x00000000,
|
||||
0xffffffff,
|
||||
};
|
||||
|
||||
static uint32_t vce_bs_buffer[5] = {
|
||||
static const uint32_t vce_bs_buffer[] = {
|
||||
0x00000014,
|
||||
0x05000004,
|
||||
0x00000000,
|
||||
@ -199,7 +199,7 @@ static uint32_t vce_bs_buffer[5] = {
|
||||
0x00154000,
|
||||
};
|
||||
|
||||
static uint32_t vce_aux_buffer[18] = {
|
||||
static const uint32_t vce_aux_buffer[] = {
|
||||
0x00000048,
|
||||
0x05000002,
|
||||
0x0000f000,
|
||||
@ -311,7 +311,7 @@ static uint32_t vce_encode[88] = {
|
||||
0x00000000,
|
||||
};
|
||||
|
||||
static uint32_t vce_destroy[2] = {
|
||||
static const uint32_t vce_destroy[] = {
|
||||
0x00000008,
|
||||
0x02000001,
|
||||
};
|
||||
|
@ -70,7 +70,7 @@ static int cursor_running;
|
||||
*/
|
||||
|
||||
struct cursor_step {
|
||||
void (*run)(struct cursor *cursor, struct cursor_step *step);
|
||||
void (*run)(struct cursor *cursor, const struct cursor_step *step);
|
||||
uint32_t msec;
|
||||
uint32_t repeat;
|
||||
int arg;
|
||||
@ -78,7 +78,7 @@ struct cursor_step {
|
||||
|
||||
static uint32_t indx, count;
|
||||
|
||||
static void set_cursor(struct cursor *cursor, struct cursor_step *step)
|
||||
static void set_cursor(struct cursor *cursor, const struct cursor_step *step)
|
||||
{
|
||||
int enabled = (step->arg ^ count) & 0x1;
|
||||
uint32_t handle = 0;
|
||||
@ -91,7 +91,7 @@ static void set_cursor(struct cursor *cursor, struct cursor_step *step)
|
||||
drmModeSetCursor(cursor->fd, cursor->crtc_id, handle, cursor->w, cursor->h);
|
||||
}
|
||||
|
||||
static void move_cursor(struct cursor *cursor, struct cursor_step *step)
|
||||
static void move_cursor(struct cursor *cursor, const struct cursor_step *step)
|
||||
{
|
||||
int x = cursor->x;
|
||||
int y = cursor->y;
|
||||
@ -126,7 +126,7 @@ static void move_cursor(struct cursor *cursor, struct cursor_step *step)
|
||||
drmModeMoveCursor(cursor->fd, cursor->crtc_id, x, y);
|
||||
}
|
||||
|
||||
static struct cursor_step steps[] = {
|
||||
static const struct cursor_step steps[] = {
|
||||
{ set_cursor, 10, 0, 1 }, /* enable */
|
||||
{ move_cursor, 1, 100, 1 },
|
||||
{ move_cursor, 1, 10, 10 },
|
||||
@ -145,7 +145,7 @@ static struct cursor_step steps[] = {
|
||||
static void *cursor_thread_func(void *data)
|
||||
{
|
||||
while (cursor_running) {
|
||||
struct cursor_step *step = &steps[indx % ARRAY_SIZE(steps)];
|
||||
const struct cursor_step *step = &steps[indx % ARRAY_SIZE(steps)];
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ncursors; i++) {
|
||||
|
@ -589,7 +589,6 @@ static struct resources *get_resources(struct device *dev)
|
||||
|
||||
#define get_resource(_res, __res, type, Type) \
|
||||
do { \
|
||||
int i; \
|
||||
for (i = 0; i < (int)(_res)->__res->count_##type##s; ++i) { \
|
||||
(_res)->type##s[i].type = \
|
||||
drmModeGet##Type(dev->fd, (_res)->__res->type##s[i]); \
|
||||
@ -616,7 +615,6 @@ static struct resources *get_resources(struct device *dev)
|
||||
|
||||
#define get_properties(_res, __res, type, Type) \
|
||||
do { \
|
||||
int i; \
|
||||
for (i = 0; i < (int)(_res)->__res->count_##type##s; ++i) { \
|
||||
struct type *obj = &res->type##s[i]; \
|
||||
unsigned int j; \
|
||||
@ -1281,7 +1279,7 @@ static void test_page_flip(struct device *dev, struct pipe_arg *pipes, unsigned
|
||||
evctx.version = DRM_EVENT_CONTEXT_VERSION;
|
||||
evctx.vblank_handler = NULL;
|
||||
evctx.page_flip_handler = page_flip_handler;
|
||||
|
||||
|
||||
while (1) {
|
||||
#if 0
|
||||
struct pollfd pfd[2];
|
||||
@ -1301,7 +1299,6 @@ static void test_page_flip(struct device *dev, struct pipe_arg *pipes, unsigned
|
||||
#else
|
||||
struct timeval timeout = { .tv_sec = 3, .tv_usec = 0 };
|
||||
fd_set fds;
|
||||
int ret;
|
||||
|
||||
FD_ZERO(&fds);
|
||||
FD_SET(0, &fds);
|
||||
@ -1627,7 +1624,7 @@ int main(int argc, char **argv)
|
||||
if (parse_connector(&pipe_args[count], optarg) < 0)
|
||||
usage(argv[0]);
|
||||
|
||||
count++;
|
||||
count++;
|
||||
break;
|
||||
case 'C':
|
||||
test_cursor = 1;
|
||||
|
@ -177,7 +177,6 @@ int main(int argc, char **argv)
|
||||
while (1) {
|
||||
struct timeval timeout = { .tv_sec = 3, .tv_usec = 0 };
|
||||
fd_set fds;
|
||||
int ret;
|
||||
|
||||
FD_ZERO(&fds);
|
||||
FD_SET(0, &fds);
|
||||
|
Loading…
Reference in New Issue
Block a user