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5ld: stoped generating 64-bit eor

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R=rsc
CC=golang-dev
https://golang.org/cl/4182049
This commit is contained in:
Ken Thompson 2011-02-11 13:22:35 -08:00
parent 9b85d499af
commit ca5179d3f6
1 changed files with 16 additions and 7 deletions
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23
src/cmd/5l/asm.c
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@ -1470,15 +1470,24 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na
o1 |= (p->scond & C_SCOND) << 28; o1 |= (p->scond & C_SCOND) << 28;
break; break;
case 80: /* fmov zfcon,freg */ case 80: /* fmov zfcon,freg */
if((p->scond & C_SCOND) != C_SCOND_NONE) if(p->as == AMOVD) {
diag("floating point cannot be conditional"); // cant happen o1 = 0xeeb00b00; // VMOV imm 64
o1 = 0xf3000110; // EOR 64 o2 = oprrr(ASUBD, p->scond);
} else {
// always clears the double float register o1 = 0x0eb00a00; // VMOV imm 32
o2 = oprrr(ASUBF, p->scond);
}
v = 0x70; // 1.0
r = p->to.reg; r = p->to.reg;
o1 |= r << 0;
// movf $1.0, r
o1 |= (p->scond & C_SCOND) << 28;
o1 |= r << 12; o1 |= r << 12;
o1 |= r << 16; o1 |= (v&0xf) << 0;
o1 |= (v&0xf0) << 12;
// subf r,r,r
o2 |= r | (r<<16) | (r<<12);
break; break;
case 81: /* fmov sfcon,freg */ case 81: /* fmov sfcon,freg */
o1 = 0x0eb00a00; // VMOV imm 32 o1 = 0x0eb00a00; // VMOV imm 32