From ca5179d3f6889185f2aa3fb985f34a963015d133 Mon Sep 17 00:00:00 2001
From: Ken Thompson <ken@golang.org>
Date: Fri, 11 Feb 2011 13:22:35 -0800
Subject: [PATCH] 5ld: stoped generating 64-bit eor

R=rsc
CC=golang-dev
https://golang.org/cl/4182049
---
 src/cmd/5l/asm.c | 23 ++++++++++++++++-------
 1 file changed, 16 insertions(+), 7 deletions(-)

diff --git a/src/cmd/5l/asm.c b/src/cmd/5l/asm.c
index de6b89cfe8..7163997c0f 100644
--- a/src/cmd/5l/asm.c
+++ b/src/cmd/5l/asm.c
@@ -1470,15 +1470,24 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na
 		o1 |= (p->scond & C_SCOND) << 28;
 		break;
 	case 80:	/* fmov zfcon,freg */
-		if((p->scond & C_SCOND) != C_SCOND_NONE)
-			diag("floating point cannot be conditional");	// cant happen
-		o1 = 0xf3000110;	// EOR 64
-
-		// always clears the double float register
+		if(p->as == AMOVD) {
+			o1 = 0xeeb00b00;	// VMOV imm 64
+			o2 = oprrr(ASUBD, p->scond);
+		} else {
+			o1 = 0x0eb00a00;	// VMOV imm 32
+			o2 = oprrr(ASUBF, p->scond);
+		}
+		v = 0x70;	// 1.0
 		r = p->to.reg;
-		o1 |= r << 0;
+
+		// movf $1.0, r
+		o1 |= (p->scond & C_SCOND) << 28;
 		o1 |= r << 12;
-		o1 |= r << 16;
+		o1 |= (v&0xf) << 0;
+		o1 |= (v&0xf0) << 12;
+
+		// subf r,r,r
+		o2 |= r | (r<<16) | (r<<12);
 		break;
 	case 81:	/* fmov sfcon,freg */
 		o1 = 0x0eb00a00;		// VMOV imm 32