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https://github.com/golang/go
synced 2024-11-12 10:30:23 -07:00
fix 386 build - register allocation and shift bug
R=ken OCL=35140 CL=35142
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parent
e7f9452da5
commit
b71c484c91
@ -47,7 +47,7 @@ mfree(Node *n)
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void
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cgen(Node *n, Node *res)
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{
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Node *nl, *nr, *r, n1, n2, f0, f1;
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Node *nl, *nr, *r, n1, n2, nt, f0, f1;
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Prog *p1, *p2, *p3;
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int a;
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@ -136,7 +136,7 @@ cgen(Node *n, Node *res)
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tempfree(&n1);
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return;
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}
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// 64-bit ops are hard on 32-bit machine.
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if(is64(n->type) || is64(res->type) || n->left != N && is64(n->left->type)) {
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switch(n->op) {
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@ -350,13 +350,16 @@ sbop: // symmetric binary
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abop: // asymmetric binary
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if(nl->ullman >= nr->ullman) {
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regalloc(&n1, nl->type, res);
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cgen(nl, &n1);
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tempalloc(&nt, nl->type);
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cgen(nl, &nt);
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mgen(nr, &n2, N);
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regalloc(&n1, nl->type, res);
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gmove(&nt, &n1);
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gins(a, &n2, &n1);
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gmove(&n1, res);
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mfree(&n2);
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regfree(&n1);
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mfree(&n2);
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tempfree(&nt);
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} else {
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regalloc(&n2, nr->type, res);
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cgen(nr, &n2);
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@ -529,7 +532,8 @@ agen(Node *n, Node *res)
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nodconst(&n2, types[TUINT32], v);
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gins(optoas(OCMP, types[TUINT32]), &n1, &n2);
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p1 = gbranch(optoas(OGT, types[TUINT32]), T);
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ginscall(throwindex, 0);
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//ginscall(throwindex, 0);
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gins(AINT, nodintconst(3), N);
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patch(p1, pc);
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}
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@ -575,7 +579,8 @@ agen(Node *n, Node *res)
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nodconst(&n1, types[TUINT32], nl->type->bound);
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gins(optoas(OCMP, types[TUINT32]), &n2, &n1);
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p1 = gbranch(optoas(OLT, types[TUINT32]), T);
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ginscall(throwindex, 0);
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//ginscall(throwindex, 0);
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gins(AINT, nodintconst(3), N);
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patch(p1, pc);
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}
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@ -661,8 +666,13 @@ agen(Node *n, Node *res)
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void
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igen(Node *n, Node *a, Node *res)
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{
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Node n1;
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tempalloc(&n1, types[tptr]);
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agen(n, &n1);
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regalloc(a, types[tptr], res);
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agen(n, a);
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gmove(&n1, a);
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tempfree(&n1);
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a->op = OINDREG;
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a->type = n->type;
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}
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@ -834,7 +844,7 @@ bgen(Node *n, int true, Prog *to)
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regfree(&n1);
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break;
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}
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if(isinter(nl->type)) {
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// front end shold only leave cmp to literal nil
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if((a != OEQ && a != ONE) || nr->op != OLITERAL) {
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@ -650,8 +650,8 @@ cgen_shift(int op, Node *nl, Node *nr, Node *res)
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memset(&oldcx, 0, sizeof oldcx);
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nodreg(&cx, types[TUINT32], D_CX);
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if(reg[D_CX] > 0 && !samereg(&cx, res)) {
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regalloc(&oldcx, types[TUINT32], N);
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if(reg[D_CX] > 1 && !samereg(&cx, res)) {
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tempalloc(&oldcx, types[TUINT32]);
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gmove(&cx, &oldcx);
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}
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@ -671,7 +671,7 @@ cgen_shift(int op, Node *nl, Node *nr, Node *res)
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}
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// test and fix up large shifts
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gins(optoas(OCMP, types[TUINT32]), &n1, ncon(w));
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gins(optoas(OCMP, nr->type), &n1, ncon(w));
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p1 = gbranch(optoas(OLT, types[TUINT32]), T);
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if(op == ORSH && issigned[nl->type->etype]) {
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gins(a, ncon(w-1), &n2);
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@ -683,7 +683,7 @@ cgen_shift(int op, Node *nl, Node *nr, Node *res)
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if(oldcx.op != 0) {
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gmove(&oldcx, &cx);
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regfree(&oldcx);
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tempfree(&oldcx);
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}
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gmove(&n2, res);
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