From b71c484c914a0ddaac68f354a7fc17740e269d66 Mon Sep 17 00:00:00 2001 From: Russ Cox Date: Wed, 30 Sep 2009 08:56:01 -0700 Subject: [PATCH] fix 386 build - register allocation and shift bug R=ken OCL=35140 CL=35142 --- src/cmd/8g/cgen.c | 28 +++++++++++++++++++--------- src/cmd/8g/ggen.c | 8 ++++---- 2 files changed, 23 insertions(+), 13 deletions(-) diff --git a/src/cmd/8g/cgen.c b/src/cmd/8g/cgen.c index 6c96aad3e3..a3e877621d 100644 --- a/src/cmd/8g/cgen.c +++ b/src/cmd/8g/cgen.c @@ -47,7 +47,7 @@ mfree(Node *n) void cgen(Node *n, Node *res) { - Node *nl, *nr, *r, n1, n2, f0, f1; + Node *nl, *nr, *r, n1, n2, nt, f0, f1; Prog *p1, *p2, *p3; int a; @@ -136,7 +136,7 @@ cgen(Node *n, Node *res) tempfree(&n1); return; } - + // 64-bit ops are hard on 32-bit machine. if(is64(n->type) || is64(res->type) || n->left != N && is64(n->left->type)) { switch(n->op) { @@ -350,13 +350,16 @@ sbop: // symmetric binary abop: // asymmetric binary if(nl->ullman >= nr->ullman) { - regalloc(&n1, nl->type, res); - cgen(nl, &n1); + tempalloc(&nt, nl->type); + cgen(nl, &nt); mgen(nr, &n2, N); + regalloc(&n1, nl->type, res); + gmove(&nt, &n1); gins(a, &n2, &n1); gmove(&n1, res); - mfree(&n2); regfree(&n1); + mfree(&n2); + tempfree(&nt); } else { regalloc(&n2, nr->type, res); cgen(nr, &n2); @@ -529,7 +532,8 @@ agen(Node *n, Node *res) nodconst(&n2, types[TUINT32], v); gins(optoas(OCMP, types[TUINT32]), &n1, &n2); p1 = gbranch(optoas(OGT, types[TUINT32]), T); - ginscall(throwindex, 0); + //ginscall(throwindex, 0); + gins(AINT, nodintconst(3), N); patch(p1, pc); } @@ -575,7 +579,8 @@ agen(Node *n, Node *res) nodconst(&n1, types[TUINT32], nl->type->bound); gins(optoas(OCMP, types[TUINT32]), &n2, &n1); p1 = gbranch(optoas(OLT, types[TUINT32]), T); - ginscall(throwindex, 0); + //ginscall(throwindex, 0); + gins(AINT, nodintconst(3), N); patch(p1, pc); } @@ -661,8 +666,13 @@ agen(Node *n, Node *res) void igen(Node *n, Node *a, Node *res) { + Node n1; + + tempalloc(&n1, types[tptr]); + agen(n, &n1); regalloc(a, types[tptr], res); - agen(n, a); + gmove(&n1, a); + tempfree(&n1); a->op = OINDREG; a->type = n->type; } @@ -834,7 +844,7 @@ bgen(Node *n, int true, Prog *to) regfree(&n1); break; } - + if(isinter(nl->type)) { // front end shold only leave cmp to literal nil if((a != OEQ && a != ONE) || nr->op != OLITERAL) { diff --git a/src/cmd/8g/ggen.c b/src/cmd/8g/ggen.c index e0cd8f394c..3f535cfa05 100644 --- a/src/cmd/8g/ggen.c +++ b/src/cmd/8g/ggen.c @@ -650,8 +650,8 @@ cgen_shift(int op, Node *nl, Node *nr, Node *res) memset(&oldcx, 0, sizeof oldcx); nodreg(&cx, types[TUINT32], D_CX); - if(reg[D_CX] > 0 && !samereg(&cx, res)) { - regalloc(&oldcx, types[TUINT32], N); + if(reg[D_CX] > 1 && !samereg(&cx, res)) { + tempalloc(&oldcx, types[TUINT32]); gmove(&cx, &oldcx); } @@ -671,7 +671,7 @@ cgen_shift(int op, Node *nl, Node *nr, Node *res) } // test and fix up large shifts - gins(optoas(OCMP, types[TUINT32]), &n1, ncon(w)); + gins(optoas(OCMP, nr->type), &n1, ncon(w)); p1 = gbranch(optoas(OLT, types[TUINT32]), T); if(op == ORSH && issigned[nl->type->etype]) { gins(a, ncon(w-1), &n2); @@ -683,7 +683,7 @@ cgen_shift(int op, Node *nl, Node *nr, Node *res) if(oldcx.op != 0) { gmove(&oldcx, &cx); - regfree(&oldcx); + tempfree(&oldcx); } gmove(&n2, res);