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[dev.ssa] cmd/compile: don't sink spills that satisfy merge edges in SSA

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If a spill is used to satisfy a merge edge (in shuffle), don't sink
it out of loop.

This is found in the following code (on ARM) where there is a stack
Phi (v268) inside a loop (b36 -> ... -> b47 -> b38 -> b36).

(before shuffle)
  b36: <- b34 b38
    ...
    v268 = Phi <int> v410 v360 : autotmp_198[int]
    ...
    ... -> b47
  b47: <- b44
    ...
    v360 = ... : R6
    v230 = StoreReg <int> v360 : autotmp_198[int]
    v261 = CMPconst <flags> [0] v360
    EQ v261 -> b49 b38 (unlikely)
  b38: <- b47
    ...
    Plain -> b36

During shuffle, v230 (as spill of v360) is found to satisfy v268, but
it didn't record its use in shuffle, and v230 is sunk out of the loop
(to b49), which leads to bad value in v268.

This seems never happened on AMD64 (in make.bash), until 4 registers
are removed.

Change-Id: I01dfc28ae461e853b36977c58bcfc0669e556660
Reviewed-on: https://go-review.googlesource.com/24858
Reviewed-by: David Chase <drchase@google.com>
This commit is contained in:
Cherry Zhang 2016-07-10 23:34:46 -06:00
parent 8cc3f4a17e
commit 7bd88a651d
1 changed files with 3 additions and 0 deletions
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3
src/cmd/compile/internal/ssa/regalloc.go
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@ -1818,6 +1818,9 @@ func (e *edgeState) processDest(loc Location, vid ID, splice **Value) bool {
(*splice).Uses-- (*splice).Uses--
*splice = occupant.c *splice = occupant.c
occupant.c.Uses++ occupant.c.Uses++
if occupant.c.Op == OpStoreReg {
e.s.lateSpillUse(vid)
}
} }
// Note: if splice==nil then c will appear dead. This is // Note: if splice==nil then c will appear dead. This is
// non-SSA formed code, so be careful after this pass not to run // non-SSA formed code, so be careful after this pass not to run