From 7bd88a651d0d9f8b314989475b337a0edf225bd1 Mon Sep 17 00:00:00 2001 From: Cherry Zhang Date: Sun, 10 Jul 2016 23:34:46 -0600 Subject: [PATCH] [dev.ssa] cmd/compile: don't sink spills that satisfy merge edges in SSA If a spill is used to satisfy a merge edge (in shuffle), don't sink it out of loop. This is found in the following code (on ARM) where there is a stack Phi (v268) inside a loop (b36 -> ... -> b47 -> b38 -> b36). (before shuffle) b36: <- b34 b38 ... v268 = Phi v410 v360 : autotmp_198[int] ... ... -> b47 b47: <- b44 ... v360 = ... : R6 v230 = StoreReg v360 : autotmp_198[int] v261 = CMPconst [0] v360 EQ v261 -> b49 b38 (unlikely) b38: <- b47 ... Plain -> b36 During shuffle, v230 (as spill of v360) is found to satisfy v268, but it didn't record its use in shuffle, and v230 is sunk out of the loop (to b49), which leads to bad value in v268. This seems never happened on AMD64 (in make.bash), until 4 registers are removed. Change-Id: I01dfc28ae461e853b36977c58bcfc0669e556660 Reviewed-on: https://go-review.googlesource.com/24858 Reviewed-by: David Chase --- src/cmd/compile/internal/ssa/regalloc.go | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/cmd/compile/internal/ssa/regalloc.go b/src/cmd/compile/internal/ssa/regalloc.go index 9f0d13b29a..eba90fd051 100644 --- a/src/cmd/compile/internal/ssa/regalloc.go +++ b/src/cmd/compile/internal/ssa/regalloc.go @@ -1818,6 +1818,9 @@ func (e *edgeState) processDest(loc Location, vid ID, splice **Value) bool { (*splice).Uses-- *splice = occupant.c occupant.c.Uses++ + if occupant.c.Op == OpStoreReg { + e.s.lateSpillUse(vid) + } } // Note: if splice==nil then c will appear dead. This is // non-SSA formed code, so be careful after this pass not to run