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internal/cpu: fix wrong cache line size of riscv64

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All of riscv CPU using 64B for cache-line size.
i.e. U540 of Hifive Unleashed (https://www.sifive.com/boards/hifive-unleashed)

Change-Id: I0d72d88ac026f45383c3b3eb3a77233d3c2e4004
Reviewed-on: https://go-review.googlesource.com/c/go/+/526659
Run-TryBot: M Zhuo <mzh@golangcn.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Heschi Kreinick <heschi@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
This commit is contained in:
Meng Zhuo 2023-09-08 17:53:34 +08:00 committed by M Zhuo
parent 8221f90f13
commit 5e31f78c8a
1 changed files with 1 additions and 1 deletions
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2
src/internal/cpu/cpu_riscv64.go
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@ -4,7 +4,7 @@
package cpu
const CacheLinePadSize = 32
const CacheLinePadSize = 64
func doinit() {
}