runtime/internal/atomic: add memory barrier for mips Cas on failure

Add a memory barrier on the failure case of the
compare-and-swap for mips, this avoids potential
race conditions.

For #63506

src/runtime/internal/atomic/atomic_mipsx.go

@@ -48,11 +48,6 @@ func unlock() {
 	spinUnlock(&lock.state)
 }
 
-//go:nosplit
-func unlockNoFence() {
-	lock.state = 0
-}
-
 //go:nosplit
 func Xadd64(addr *uint64, delta int64) (new uint64) {
 	lockAndCheck(addr)
@@ -85,7 +80,7 @@ func Cas64(addr *uint64, old, new uint64) (swapped bool) {
 		return true
 	}
 
-	unlockNoFence()
+	unlock()
 	return false
 }
 

src/runtime/internal/atomic/atomic_mipsx.s

@@ -28,6 +28,7 @@ try_cas:
 	MOVB	R3, ret+12(FP)
 	RET
 cas_fail:
+	SYNC
 	MOVB	R0, ret+12(FP)
 	RET