2009-12-17 17:08:42 -07:00
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// Copyright 2009 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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2010-10-25 18:55:50 -06:00
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// Software floating point interpretaton of ARM 7500 FP instructions.
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// The interpretation is not bit compatible with the 7500.
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// It uses true little-endian doubles, while the 7500 used mixed-endian.
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2009-12-17 17:08:42 -07:00
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#include "runtime.h"
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2010-12-09 15:45:27 -07:00
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#define CPSR 14
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#define FLAGS_N (1 << 31)
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#define FLAGS_Z (1 << 30)
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#define FLAGS_C (1 << 29)
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#define FLAGS_V (1 << 28)
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void runtime·abort(void);
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static uint32 trace = 0;
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2010-04-15 03:43:49 -06:00
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static void
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fabort(void)
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{
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if (1) {
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runtime: ,s/[a-zA-Z0-9_]+/runtime·&/g, almost
Prefix all external symbols in runtime by runtime·,
to avoid conflicts with possible symbols of the same
name in linked-in C libraries. The obvious conflicts
are printf, malloc, and free, but hide everything to
avoid future pain.
The symbols left alone are:
** known to cgo **
_cgo_free
_cgo_malloc
libcgo_thread_start
initcgo
ncgocall
** known to linker **
_rt0_$GOARCH
_rt0_$GOARCH_$GOOS
text
etext
data
end
pclntab
epclntab
symtab
esymtab
** known to C compiler **
_divv
_modv
_div64by32
etc (arch specific)
Tested on darwin/386, darwin/amd64, linux/386, linux/amd64.
Built (but not tested) for freebsd/386, freebsd/amd64, linux/arm, windows/386.
R=r, PeterGo
CC=golang-dev
https://golang.org/cl/2899041
2010-11-04 12:00:19 -06:00
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runtime·printf("Unsupported floating point instruction\n");
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runtime·abort();
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2010-04-15 03:43:49 -06:00
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}
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}
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2010-12-09 15:45:27 -07:00
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static void
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putf(uint32 reg, uint32 val)
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{
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m->freglo[reg] = val;
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}
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2010-04-15 03:43:49 -06:00
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2010-12-09 15:45:27 -07:00
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static void
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putd(uint32 reg, uint64 val)
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2010-04-15 03:43:49 -06:00
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{
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2010-12-09 15:45:27 -07:00
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m->freglo[reg] = (uint32)val;
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m->freghi[reg] = (uint32)(val>>32);
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2010-04-15 03:43:49 -06:00
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}
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static uint64
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getd(uint32 reg)
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{
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2010-12-09 15:45:27 -07:00
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return (uint64)m->freglo[reg] | ((uint64)m->freghi[reg]<<32);
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2010-04-15 03:43:49 -06:00
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}
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static void
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2010-07-20 06:53:16 -06:00
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fprint(void)
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2009-12-17 17:08:42 -07:00
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{
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uint32 i;
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2010-12-09 15:45:27 -07:00
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for (i = 0; i < 16; i++) {
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runtime·printf("\tf%d:\t%X %X\n", i, m->freghi[i], m->freglo[i]);
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2010-04-15 03:43:49 -06:00
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}
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}
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static uint32
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d2f(uint64 d)
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2010-04-15 03:43:49 -06:00
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{
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2010-10-25 18:55:50 -06:00
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uint32 x;
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2010-12-09 15:45:27 -07:00
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runtime: ,s/[a-zA-Z0-9_]+/runtime·&/g, almost
Prefix all external symbols in runtime by runtime·,
to avoid conflicts with possible symbols of the same
name in linked-in C libraries. The obvious conflicts
are printf, malloc, and free, but hide everything to
avoid future pain.
The symbols left alone are:
** known to cgo **
_cgo_free
_cgo_malloc
libcgo_thread_start
initcgo
ncgocall
** known to linker **
_rt0_$GOARCH
_rt0_$GOARCH_$GOOS
text
etext
data
end
pclntab
epclntab
symtab
esymtab
** known to C compiler **
_divv
_modv
_div64by32
etc (arch specific)
Tested on darwin/386, darwin/amd64, linux/386, linux/amd64.
Built (but not tested) for freebsd/386, freebsd/amd64, linux/arm, windows/386.
R=r, PeterGo
CC=golang-dev
https://golang.org/cl/2899041
2010-11-04 12:00:19 -06:00
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runtime·f64to32c(d, &x);
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return x;
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2010-04-15 03:43:49 -06:00
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}
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static uint64
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f2d(uint32 f)
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2010-04-15 03:43:49 -06:00
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{
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uint64 x;
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2010-04-15 03:43:49 -06:00
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2010-12-09 15:45:27 -07:00
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runtime·f32to64c(f, &x);
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return x;
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2010-04-15 03:43:49 -06:00
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}
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2010-12-09 15:45:27 -07:00
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static uint32
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fstatus(bool nan, int32 cmp)
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2010-07-20 06:53:16 -06:00
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{
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2010-12-09 15:45:27 -07:00
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if(nan)
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return FLAGS_C | FLAGS_V;
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if(cmp == 0)
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return FLAGS_Z | FLAGS_C;
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if(cmp < 0)
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return FLAGS_N;
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return FLAGS_C;
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2010-07-20 06:53:16 -06:00
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}
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2010-04-15 03:43:49 -06:00
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2010-12-09 15:45:27 -07:00
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// returns number of words that the fp instruction
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// is occupying, 0 if next instruction isn't float.
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2010-04-15 03:43:49 -06:00
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static uint32
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stepflt(uint32 *pc, uint32 *regs)
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{
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2010-12-09 15:45:27 -07:00
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uint32 i, regd, regm, regn;
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2011-04-17 12:16:26 -06:00
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int32 delta;
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2010-12-09 15:45:27 -07:00
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uint32 *addr;
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uint64 uval;
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int64 sval;
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bool nan, ok;
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int32 cmp;
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2010-10-18 10:24:59 -06:00
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2009-12-17 17:08:42 -07:00
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i = *pc;
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2010-04-05 13:51:09 -06:00
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2010-12-09 15:45:27 -07:00
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if(trace)
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runtime·printf("stepflt %p %x\n", pc, i);
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2009-12-17 17:08:42 -07:00
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2010-12-09 15:45:27 -07:00
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// special cases
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2010-10-18 11:24:19 -06:00
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if((i&0xfffff000) == 0xe59fb000) {
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// load r11 from pc-relative address.
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// might be part of a floating point move
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// (or might not, but no harm in simulating
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// one instruction too many).
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2010-12-09 15:45:27 -07:00
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addr = (uint32*)((uint8*)pc + (i&0xfff) + 8);
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regs[11] = addr[0];
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if(trace)
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runtime·printf("*** cpu R[%d] = *(%p) %x\n",
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11, addr, regs[11]);
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2010-10-18 11:24:19 -06:00
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return 1;
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2009-12-17 17:08:42 -07:00
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}
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2010-10-25 18:55:50 -06:00
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if(i == 0xe08bb00d) {
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2011-04-17 12:16:26 -06:00
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// add sp to r11.
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2010-10-25 18:55:50 -06:00
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// might be part of a large stack offset address
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// (or might not, but again no harm done).
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regs[11] += regs[13];
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2010-12-09 15:45:27 -07:00
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if(trace)
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runtime·printf("*** cpu R[%d] += R[%d] %x\n",
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11, 13, regs[11]);
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return 1;
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}
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if(i == 0xeef1fa10) {
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regs[CPSR] = (regs[CPSR]&0x0fffffff) | m->fflag;
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if(trace)
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runtime·printf("*** fpsr R[CPSR] = F[CPSR] %x\n", regs[CPSR]);
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2010-10-25 18:55:50 -06:00
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return 1;
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}
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2011-04-17 12:16:26 -06:00
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if((i&0xff000000) == 0xea000000) {
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// unconditional branch
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// can happen in the middle of floating point
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// if the linker decides it is time to lay down
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// a sequence of instruction stream constants.
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delta = i&0xffffff;
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delta = (delta<<8) >> 8; // sign extend
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if(trace)
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runtime·printf("*** cpu PC += %x\n", (delta+2)*4);
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return delta+2;
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}
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2010-12-09 15:45:27 -07:00
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goto stage1;
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stage1: // load/store regn is cpureg, regm is 8bit offset
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regd = i>>12 & 0xf;
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regn = i>>16 & 0xf;
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regm = (i & 0xff) << 2; // PLUS or MINUS ??
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switch(i & 0xfff00f00) {
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default:
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goto stage2;
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case 0xed900a00: // single load
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addr = (uint32*)(regs[regn] + regm);
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m->freglo[regd] = addr[0];
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if(trace)
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runtime·printf("*** load F[%d] = %x\n",
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regd, m->freglo[regd]);
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break;
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case 0xed900b00: // double load
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addr = (uint32*)(regs[regn] + regm);
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m->freglo[regd] = addr[0];
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m->freghi[regd] = addr[1];
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if(trace)
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runtime·printf("*** load D[%d] = %x-%x\n",
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regd, m->freghi[regd], m->freglo[regd]);
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break;
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case 0xed800a00: // single store
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addr = (uint32*)(regs[regn] + regm);
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addr[0] = m->freglo[regd];
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if(trace)
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runtime·printf("*** *(%p) = %x\n",
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addr, addr[0]);
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break;
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case 0xed800b00: // double store
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addr = (uint32*)(regs[regn] + regm);
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addr[0] = m->freglo[regd];
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addr[1] = m->freghi[regd];
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if(trace)
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runtime·printf("*** *(%p) = %x-%x\n",
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addr, addr[1], addr[0]);
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break;
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}
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return 1;
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stage2: // regd, regm, regn are 4bit variables
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regm = i>>0 & 0xf;
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switch(i & 0xfff00ff0) {
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default:
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goto stage3;
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case 0xf3000110: // veor
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m->freglo[regd] = m->freglo[regm]^m->freglo[regn];
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m->freghi[regd] = m->freghi[regm]^m->freghi[regn];
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if(trace)
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runtime·printf("*** veor D[%d] = %x-%x\n",
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regd, m->freghi[regd], m->freglo[regd]);
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break;
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case 0xeeb00b00: // D[regd] = const(regn,regm)
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regn = (regn<<4) | regm;
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regm = 0x40000000UL;
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if(regn & 0x80)
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regm |= 0x80000000UL;
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if(regn & 0x40)
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regm ^= 0x7fc00000UL;
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regm |= (regn & 0x3f) << 16;
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m->freglo[regd] = 0;
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m->freghi[regd] = regm;
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if(trace)
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runtime·printf("*** immed D[%d] = %x-%x\n",
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regd, m->freghi[regd], m->freglo[regd]);
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break;
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case 0xeeb00a00: // F[regd] = const(regn,regm)
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regn = (regn<<4) | regm;
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regm = 0x40000000UL;
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if(regn & 0x80)
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regm |= 0x80000000UL;
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if(regn & 0x40)
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regm ^= 0x7e000000UL;
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regm |= (regn & 0x3f) << 19;
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m->freglo[regd] = regm;
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if(trace)
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runtime·printf("*** immed D[%d] = %x\n",
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regd, m->freglo[regd]);
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break;
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case 0xee300b00: // D[regd] = D[regn]+D[regm]
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runtime·fadd64c(getd(regn), getd(regm), &uval);
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putd(regd, uval);
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if(trace)
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runtime·printf("*** add D[%d] = D[%d]+D[%d] %x-%x\n",
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regd, regn, regm, m->freghi[regd], m->freglo[regd]);
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break;
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case 0xee300a00: // F[regd] = F[regn]+F[regm]
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runtime·fadd64c(f2d(m->freglo[regn]), f2d(m->freglo[regm]), &uval);
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m->freglo[regd] = d2f(uval);
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if(trace)
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runtime·printf("*** add F[%d] = F[%d]+F[%d] %x\n",
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regd, regn, regm, m->freglo[regd]);
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break;
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case 0xee300b40: // D[regd] = D[regn]-D[regm]
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runtime·fsub64c(getd(regn), getd(regm), &uval);
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putd(regd, uval);
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if(trace)
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runtime·printf("*** sub D[%d] = D[%d]-D[%d] %x-%x\n",
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regd, regn, regm, m->freghi[regd], m->freglo[regd]);
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break;
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case 0xee300a40: // F[regd] = F[regn]-F[regm]
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runtime·fsub64c(f2d(m->freglo[regn]), f2d(m->freglo[regm]), &uval);
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m->freglo[regd] = d2f(uval);
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if(trace)
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runtime·printf("*** sub F[%d] = F[%d]-F[%d] %x\n",
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regd, regn, regm, m->freglo[regd]);
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break;
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case 0xee200b00: // D[regd] = D[regn]*D[regm]
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runtime·fmul64c(getd(regn), getd(regm), &uval);
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putd(regd, uval);
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if(trace)
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runtime·printf("*** mul D[%d] = D[%d]*D[%d] %x-%x\n",
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regd, regn, regm, m->freghi[regd], m->freglo[regd]);
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break;
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case 0xee200a00: // F[regd] = F[regn]*F[regm]
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runtime·fmul64c(f2d(m->freglo[regn]), f2d(m->freglo[regm]), &uval);
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m->freglo[regd] = d2f(uval);
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if(trace)
|
|
|
|
runtime·printf("*** mul F[%d] = F[%d]*F[%d] %x\n",
|
|
|
|
regd, regn, regm, m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xee800b00: // D[regd] = D[regn]/D[regm]
|
|
|
|
runtime·fdiv64c(getd(regn), getd(regm), &uval);
|
|
|
|
putd(regd, uval);
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** div D[%d] = D[%d]/D[%d] %x-%x\n",
|
|
|
|
regd, regn, regm, m->freghi[regd], m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xee800a00: // F[regd] = F[regn]/F[regm]
|
|
|
|
runtime·fdiv64c(f2d(m->freglo[regn]), f2d(m->freglo[regm]), &uval);
|
|
|
|
m->freglo[regd] = d2f(uval);
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** div F[%d] = F[%d]/F[%d] %x\n",
|
|
|
|
regd, regn, regm, m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xee000b10: // S[regn] = R[regd] (MOVW) (regm ignored)
|
|
|
|
m->freglo[regn] = regs[regd];
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** cpy S[%d] = R[%d] %x\n",
|
|
|
|
regn, regd, m->freglo[regn]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xee100b10: // R[regd] = S[regn] (MOVW) (regm ignored)
|
|
|
|
regs[regd] = m->freglo[regn];
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** cpy R[%d] = S[%d] %x\n",
|
|
|
|
regd, regn, regs[regd]);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
stage3: // regd, regm are 4bit variables
|
|
|
|
switch(i & 0xffff0ff0) {
|
|
|
|
default:
|
|
|
|
goto done;
|
|
|
|
|
|
|
|
case 0xeeb00a40: // F[regd] = F[regm] (MOVF)
|
|
|
|
m->freglo[regd] = m->freglo[regm];
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** F[%d] = F[%d] %x\n",
|
|
|
|
regd, regm, m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeeb00b40: // D[regd] = D[regm] (MOVD)
|
|
|
|
m->freglo[regd] = m->freglo[regm];
|
|
|
|
m->freghi[regd] = m->freghi[regm];
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** D[%d] = D[%d] %x-%x\n",
|
|
|
|
regd, regm, m->freghi[regd], m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeeb40bc0: // D[regd] :: D[regm] (CMPD)
|
|
|
|
runtime·fcmp64c(getd(regd), getd(regm), &cmp, &nan);
|
|
|
|
m->fflag = fstatus(nan, cmp);
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** cmp D[%d]::D[%d] %x\n",
|
|
|
|
regd, regm, m->fflag);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeeb40ac0: // F[regd] :: F[regm] (CMPF)
|
|
|
|
runtime·fcmp64c(f2d(m->freglo[regd]), f2d(m->freglo[regm]), &cmp, &nan);
|
|
|
|
m->fflag = fstatus(nan, cmp);
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** cmp F[%d]::F[%d] %x\n",
|
|
|
|
regd, regm, m->fflag);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeeb70ac0: // D[regd] = F[regm] (MOVFD)
|
|
|
|
putd(regd, f2d(m->freglo[regm]));
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** f2d D[%d]=F[%d] %x-%x\n",
|
|
|
|
regd, regm, m->freghi[regd], m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeeb70bc0: // F[regd] = D[regm] (MOVDF)
|
|
|
|
m->freglo[regd] = d2f(getd(regm));
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** d2f F[%d]=D[%d] %x-%x\n",
|
|
|
|
regd, regm, m->freghi[regd], m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeebd0ac0: // S[regd] = F[regm] (MOVFW)
|
|
|
|
runtime·f64tointc(f2d(m->freglo[regm]), &sval, &ok);
|
|
|
|
if(!ok || (int32)sval != sval)
|
|
|
|
sval = 0;
|
|
|
|
m->freglo[regd] = sval;
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** fix S[%d]=F[%d] %x\n",
|
|
|
|
regd, regm, m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeebc0ac0: // S[regd] = F[regm] (MOVFW.U)
|
|
|
|
runtime·f64tointc(f2d(m->freglo[regm]), &sval, &ok);
|
|
|
|
if(!ok || (uint32)sval != sval)
|
|
|
|
sval = 0;
|
|
|
|
m->freglo[regd] = sval;
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** fix unsigned S[%d]=F[%d] %x\n",
|
|
|
|
regd, regm, m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeebd0bc0: // S[regd] = D[regm] (MOVDW)
|
|
|
|
runtime·f64tointc(getd(regm), &sval, &ok);
|
|
|
|
if(!ok || (int32)sval != sval)
|
|
|
|
sval = 0;
|
|
|
|
m->freglo[regd] = sval;
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** fix S[%d]=D[%d] %x\n",
|
|
|
|
regd, regm, m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeebc0bc0: // S[regd] = D[regm] (MOVDW.U)
|
|
|
|
runtime·f64tointc(getd(regm), &sval, &ok);
|
|
|
|
if(!ok || (uint32)sval != sval)
|
|
|
|
sval = 0;
|
|
|
|
m->freglo[regd] = sval;
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** fix unsigned S[%d]=D[%d] %x\n",
|
|
|
|
regd, regm, m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeeb80ac0: // D[regd] = S[regm] (MOVWF)
|
|
|
|
cmp = m->freglo[regm];
|
|
|
|
if(cmp < 0) {
|
|
|
|
runtime·fintto64c(-cmp, &uval);
|
|
|
|
putf(regd, d2f(uval));
|
|
|
|
m->freglo[regd] ^= 0x80000000;
|
|
|
|
} else {
|
|
|
|
runtime·fintto64c(cmp, &uval);
|
|
|
|
putf(regd, d2f(uval));
|
|
|
|
}
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** float D[%d]=S[%d] %x-%x\n",
|
|
|
|
regd, regm, m->freghi[regd], m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeeb80a40: // D[regd] = S[regm] (MOVWF.U)
|
|
|
|
runtime·fintto64c(m->freglo[regm], &uval);
|
|
|
|
putf(regd, d2f(uval));
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** float unsigned D[%d]=S[%d] %x-%x\n",
|
|
|
|
regd, regm, m->freghi[regd], m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeeb80bc0: // D[regd] = S[regm] (MOVWD)
|
|
|
|
cmp = m->freglo[regm];
|
|
|
|
if(cmp < 0) {
|
|
|
|
runtime·fintto64c(-cmp, &uval);
|
|
|
|
putd(regd, uval);
|
|
|
|
m->freghi[regd] ^= 0x80000000;
|
|
|
|
} else {
|
|
|
|
runtime·fintto64c(cmp, &uval);
|
|
|
|
putd(regd, uval);
|
|
|
|
}
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** float D[%d]=S[%d] %x-%x\n",
|
|
|
|
regd, regm, m->freghi[regd], m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0xeeb80b40: // D[regd] = S[regm] (MOVWD.U)
|
|
|
|
runtime·fintto64c(m->freglo[regm], &uval);
|
|
|
|
putd(regd, uval);
|
|
|
|
|
|
|
|
if(trace)
|
|
|
|
runtime·printf("*** float unsigned D[%d]=S[%d] %x-%x\n",
|
|
|
|
regd, regm, m->freghi[regd], m->freglo[regd]);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 1;
|
2009-12-17 17:08:42 -07:00
|
|
|
|
2010-12-09 15:45:27 -07:00
|
|
|
done:
|
|
|
|
if((i&0xff000000) == 0xee000000 ||
|
|
|
|
(i&0xff000000) == 0xed000000) {
|
|
|
|
runtime·printf("stepflt %p %x\n", pc, i);
|
|
|
|
fabort();
|
|
|
|
}
|
2009-12-17 17:08:42 -07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#pragma textflag 7
|
|
|
|
uint32*
|
runtime: ,s/[a-zA-Z0-9_]+/runtime·&/g, almost
Prefix all external symbols in runtime by runtime·,
to avoid conflicts with possible symbols of the same
name in linked-in C libraries. The obvious conflicts
are printf, malloc, and free, but hide everything to
avoid future pain.
The symbols left alone are:
** known to cgo **
_cgo_free
_cgo_malloc
libcgo_thread_start
initcgo
ncgocall
** known to linker **
_rt0_$GOARCH
_rt0_$GOARCH_$GOOS
text
etext
data
end
pclntab
epclntab
symtab
esymtab
** known to C compiler **
_divv
_modv
_div64by32
etc (arch specific)
Tested on darwin/386, darwin/amd64, linux/386, linux/amd64.
Built (but not tested) for freebsd/386, freebsd/amd64, linux/arm, windows/386.
R=r, PeterGo
CC=golang-dev
https://golang.org/cl/2899041
2010-11-04 12:00:19 -06:00
|
|
|
runtime·_sfloat2(uint32 *lr, uint32 r0)
|
2009-12-17 17:08:42 -07:00
|
|
|
{
|
|
|
|
uint32 skip;
|
2010-04-05 13:51:09 -06:00
|
|
|
|
2010-12-09 15:45:27 -07:00
|
|
|
skip = stepflt(lr, &r0);
|
2011-04-17 12:16:26 -06:00
|
|
|
if(skip == 0) {
|
|
|
|
runtime·printf("sfloat2 %p %x\n", lr, *lr);
|
2010-12-09 15:45:27 -07:00
|
|
|
fabort(); // not ok to fail first instruction
|
2011-04-17 12:16:26 -06:00
|
|
|
}
|
2010-12-09 15:45:27 -07:00
|
|
|
|
|
|
|
lr += skip;
|
2010-11-10 16:23:20 -07:00
|
|
|
while(skip = stepflt(lr, &r0))
|
2009-12-17 17:08:42 -07:00
|
|
|
lr += skip;
|
|
|
|
return lr;
|
|
|
|
}
|