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runtime: fix arm softfloat again for R12
Missed a case, so now generalized. R=ken2 CC=golang-dev https://golang.org/cl/2540042
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9cc8e9ef48
commit
2012604002
@ -449,7 +449,7 @@ loadstore(uint32 *pc, uint32 *regs)
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isload = i>>20&1;
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p = i>>24&1;
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ud = i>>23&1;
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tlen = i>>(22 - 1)&1 | i>>15&1;
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tlen = i>>(22 - 1)&1 | i>>15&1; // NOTE(rsc): should this say i>>(22-1)&2 (not &1)?
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wb = i>>21&1;
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reg = i>>16 &0xf;
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freg = i>>12 &0x7;
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@ -497,33 +497,6 @@ ret:
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fabort();
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}
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static void
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loadconst(uint32 *pc, uint32 *regs)
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{
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uint32 offset;
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uint32 *addr;
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if ((*pc & 0xfffff000) != 0xe59fb000 || (*(pc+1) & 0xffff8fff) != 0xed9b0100)
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goto undef;
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offset = *pc & 0xfff;
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addr = (uint32*)((uint8*)pc + offset + 8);
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//printf("DEBUG: addr %p *addr %x final %p\n", addr, *addr, *addr + regs[12]);
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regs[11] = *addr;
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loadstore(pc + 1, regs);
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goto ret;
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undef:
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doabort = 1;
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ret:
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if (trace || doabort) {
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printf(" %p coproc const %x %x %x\n", pc, *pc, *(pc+1), *(pc+2));
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}
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if (doabort)
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fabort();
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}
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static void
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fltfix(uint32 *pc, uint32 *regs)
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{
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@ -622,12 +595,13 @@ stepflt(uint32 *pc, uint32 *regs)
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return 1;
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}
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// lookahead for virtual instructions that span multiple arm instructions
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c = ((*pc & 0x0f000000) >> 20) |
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((*(pc + 1) & 0x0f000000) >> 24);
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if(c == 0x5d) { // 0101 1101
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loadconst(pc, regs);
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return 2;
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if((i&0xfffff000) == 0xe59fb000) {
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// load r11 from pc-relative address.
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// might be part of a floating point move
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// (or might not, but no harm in simulating
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// one instruction too many).
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regs[11] = *(uint32*)((uint8*)pc + (i&0xfff) + 8);
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return 1;
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}
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return 0;
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