773 lines
31 KiB
C
773 lines
31 KiB
C
/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_sli.c,v 1.6 2000/12/15 15:19:35 dawes Exp $ */
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "xf86.h"
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#include "xf86_OSproc.h"
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#include "xf86Pci.h"
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#include "tdfx.h"
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#define AACLKOUTDEL 0x2
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#define CFGSWAPALGORITHM 0x1
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/* #define RD_ABORT_ERROR */
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#define H3VDD
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Bool TDFXDisableSLI(TDFXPtr pTDFX)
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{
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int i;
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int v;
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for (i=0; i<pTDFX->numChips; i++) {
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v=pciReadLong(pTDFX->PciTag[i], CFG_INIT_ENABLE);
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pciWriteLong(pTDFX->PciTag[i], CFG_INIT_ENABLE,
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v&~(CFG_SNOOP_MEMBASE0 | CFG_SNOOP_EN | CFG_SNOOP_MEMBASE0_EN |
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CFG_SNOOP_MEMBASE1_EN | CFG_SNOOP_SLAVE |
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CFG_SNOOP_FBIINIT_WR_EN | CFG_SWAP_ALGORITHM |
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CFG_SWAP_QUICK));
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v=pciReadLong(pTDFX->PciTag[i], CFG_SLI_LFB_CTRL);
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pciWriteLong(pTDFX->PciTag[i], CFG_SLI_LFB_CTRL,
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v&~(CFG_SLI_LFB_CPU_WR_EN | CFG_SLI_LFB_DPTCH_WR_EN |
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CFG_SLI_RD_EN));
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#ifdef H3VDD
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pTDFX->writeChipLong(pTDFX, i, SST_3D_SLICTRL, 0);
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pTDFX->writeChipLong(pTDFX, i, SST_3D_AACTRL, 0);
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#endif
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v=pciReadLong(pTDFX->PciTag[i], CFG_AA_LFB_CTRL);
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pciWriteLong(pTDFX->PciTag[i], CFG_AA_LFB_CTRL,
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v&~(CFG_AA_LFB_CPU_WR_EN | CFG_AA_LFB_DPTCH_WR_EN |
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CFG_AA_LFB_RD_EN));
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v=pciReadLong(pTDFX->PciTag[i], CFG_SLI_AA_MISC);
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pciWriteLong(pTDFX->PciTag[i], CFG_SLI_AA_MISC,
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(v&~CFG_VGA_VSYNC_OFFSET) |
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(0 << CFG_VGA_VSYNC_OFFSET_PIXELS_SHIFT) |
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(0 << CFG_VGA_VSYNC_OFFSET_CHARS_SHIFT) |
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(0 << CFG_VGA_VSYNC_OFFSET_HXTRA_SHIFT));
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0, 0);
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1, 0);
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2, 0);
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if (pTDFX->numChips>1) {
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v=pTDFX->readChipLong(pTDFX, i, PCIINIT0);
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pTDFX->writeChipLong(pTDFX, i, PCIINIT0,
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(v&~(SST_PCI_DISABLE_IO|SST_PCI_DISABLE_MEM|
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SST_PCI_RETRY_INTERVAL)) |
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(0<<SST_PCI_RETRY_INTERVAL_SHIFT) |
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SST_PCI_FORCE_FB_HIGH);
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} else {
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v=pTDFX->readChipLong(pTDFX, i, PCIINIT0);
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pTDFX->writeChipLong(pTDFX, i, PCIINIT0,
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(v&~(SST_PCI_DISABLE_IO|SST_PCI_DISABLE_MEM|
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SST_PCI_RETRY_INTERVAL)) |
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(0<<SST_PCI_RETRY_INTERVAL_SHIFT));
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}
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#if 0
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if (i>0) {
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pTDFX->writeChipLong(pTDFX, i, DACMODE,
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SST_DAC_DPMS_ON_VSYNC | SST_DAC_DPMS_ON_HSYNC);
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v=pTDFX->readChipLong(pTDFX, i, VIDPROCCFG);
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pTDFX->writeChipLong(pTDFX, i, VIDPROCCFG, v&~SST_VIDEO_PROCESSOR_EN);
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}
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#endif
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}
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return TRUE;
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}
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Bool TDFXSetupSLI(ScrnInfoPtr pScrn, Bool sliEnable, int aaSamples)
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{
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TDFXPtr pTDFX;
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int i, sliLines, sliLinesLog2, nChipsLog2, v;
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int sli_renderMask, sli_compareMask, sli_scanMask;
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int sliAnalog, dwFormat;
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pTDFX=TDFXPTR(pScrn);
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if (pScrn->depth == 24 || pScrn->depth==32) {
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if ((aaSamples == 4) && (pTDFX->numChips>1)) {
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pTDFX->pixelFormat=GR_PIXFMT_AA_4_ARGB_8888;
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} else if (aaSamples >= 2) {
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pTDFX->pixelFormat=GR_PIXFMT_AA_2_ARGB_8888;
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} else {
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pTDFX->pixelFormat=GR_PIXFMT_ARGB_8888;
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}
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} else if (pScrn->depth == 16) {
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if ((aaSamples == 4) && (pTDFX->numChips>1)) {
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pTDFX->pixelFormat=GR_PIXFMT_AA_4_RGB_565;
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} else if (aaSamples >= 2) {
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pTDFX->pixelFormat=GR_PIXFMT_AA_2_RGB_565;
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} else {
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pTDFX->pixelFormat=GR_PIXFMT_RGB_565;
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}
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} else if (pScrn->depth == 8) {
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pTDFX->pixelFormat=GR_PIXFMT_I_8;
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}
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if (!sliEnable && !aaSamples) { /* Turn off */
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return TDFXDisableSLI(pTDFX);
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}
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if (pScrn->virtualY>768) sliLinesLog2=5;
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else sliLinesLog2=4;
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sliLines=1<<sliLinesLog2;
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if (pScrn->virtualY*pScrn->virtualX>1600*1024) sliAnalog=1;
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else sliAnalog=0;
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/* XXX We need to avoid SLI in double scan modes somehow */
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switch (pTDFX->numChips) {
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case 1:
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nChipsLog2=0;
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break;
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case 2:
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nChipsLog2=1;
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break;
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case 4:
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nChipsLog2=2;
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break;
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default:
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return FALSE;
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/* XXX Huh? Unsupported configuration */
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}
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for (i=0; i<pTDFX->numChips; i++) {
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/* Do we want to set these differently for a VIA board? */
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v=pTDFX->readChipLong(pTDFX, i, PCIINIT0);
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v=(v&~(SST_PCI_RETRY_INTERVAL|SST_PCI_FORCE_FB_HIGH)) |
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SST_PCI_READ_WS | SST_PCI_WRITE_WS |
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SST_PCI_DISABLE_IO | SST_PCI_DISABLE_MEM |
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(5<<SST_PCI_RETRY_INTERVAL_SHIFT);
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pTDFX->writeChipLong(pTDFX, i, PCIINIT0,
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(v&~(SST_PCI_RETRY_INTERVAL|SST_PCI_FORCE_FB_HIGH)) |
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SST_PCI_READ_WS | SST_PCI_WRITE_WS |
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SST_PCI_DISABLE_IO | SST_PCI_DISABLE_MEM |
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(5<<SST_PCI_RETRY_INTERVAL_SHIFT));
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v=pTDFX->readChipLong(pTDFX, i, TMUGBEINIT);
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pTDFX->writeChipLong(pTDFX, i, TMUGBEINIT,
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(v&~(SST_AA_CLK_DELAY | SST_AA_CLK_INVERT)) |
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(AACLKOUTDEL<<SST_AA_CLK_DELAY_SHIFT) |
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SST_AA_CLK_INVERT);
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if (pTDFX->numChips>1) {
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v=pciReadLong(pTDFX->PciTag[i], CFG_INIT_ENABLE);
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pciWriteLong(pTDFX->PciTag[i], CFG_INIT_ENABLE, v |
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(CFGSWAPALGORITHM << CFG_SWAPBUFFER_ALGORITHM_SHIFT) |
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CFG_SWAP_ALGORITHM | ((!i)? CFG_SWAP_MASTER : 0));
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if (!i) {
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v=pciReadLong(pTDFX->PciTag[i], CFG_INIT_ENABLE);
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pciWriteLong(pTDFX->PciTag[i], CFG_INIT_ENABLE,
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v | CFG_SNOOP_EN);
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v=pciReadLong(pTDFX->PciTag[i], CFG_PCI_DECODE);
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} else {
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v=pciReadLong(pTDFX->PciTag[i], CFG_INIT_ENABLE);
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v=(v & ~CFG_SNOOP_MEMBASE0) | CFG_SNOOP_EN |
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CFG_SNOOP_MEMBASE0_EN | CFG_SNOOP_MEMBASE1_EN |
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CFG_SNOOP_SLAVE | CFG_SNOOP_FBIINIT_WR_EN |
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(((pTDFX->MMIOAddr[0]>>22)&0x3ff)<<CFG_SNOOP_MEMBASE0_SHIFT) |
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((pTDFX->numChips>2)? CFG_SWAP_QUICK : 0);
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pciWriteLong(pTDFX->PciTag[i], CFG_INIT_ENABLE, v);
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v=pciReadLong(pTDFX->PciTag[i], CFG_PCI_DECODE);
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v=(v & ~CFG_SNOOP_MEMBASE1) |
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((pTDFX->LinearAddr[0]>>22)&0x3ff)<<CFG_SNOOP_MEMBASE1_SHIFT;
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pciWriteLong(pTDFX->PciTag[i], CFG_PCI_DECODE, v);
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}
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}
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if (sliEnable && aaSamples<4) {
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/* SLI is on and we're using less than 4 AA samples */
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sli_renderMask = (pTDFX->numChips-1) << sliLinesLog2;
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sli_compareMask = i << sliLinesLog2;
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sli_scanMask = sliLines - 1;
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v = (sli_renderMask << CFG_SLI_LFB_RENDERMASK_SHIFT) |
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(sli_compareMask << CFG_SLI_LFB_COMPAREMASK_SHIFT) |
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(sli_scanMask << CFG_SLI_LFB_SCANMASK_SHIFT) |
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(nChipsLog2 << CFG_SLI_LFB_NUMCHIPS_LOG2_SHIFT) |
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CFG_SLI_LFB_CPU_WR_EN | CFG_SLI_LFB_DPTCH_WR_EN;
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#ifndef RD_ABORT_ERROR
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v|=CFG_SLI_RD_EN;
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#endif
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pciWriteLong(pTDFX->PciTag[i], CFG_SLI_LFB_CTRL, v);
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#ifdef H3VDD
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pTDFX->writeChipLong(pTDFX, i, SST_3D_SLICTRL,
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(sli_renderMask << SLICTL_3D_RENDERMASK_SHIFT) |
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(sli_compareMask << SLICTL_3D_COMPAREMASK_SHIFT) |
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(sli_scanMask << SLICTL_3D_SCANMASK_SHIFT) |
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(nChipsLog2 << SLICTL_3D_NUMCHIPS_LOG2_SHIFT) |
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SLICTL_3D_EN);
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#endif
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} else if (!sliEnable && aaSamples) {
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/* SLI is off and AA is on */
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sli_renderMask = 0;
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sli_compareMask = 0;
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sli_scanMask = 0;
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pciWriteLong(pTDFX->PciTag[i], CFG_SLI_LFB_CTRL,
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(sli_renderMask << CFG_SLI_LFB_RENDERMASK_SHIFT) |
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(sli_compareMask << CFG_SLI_LFB_COMPAREMASK_SHIFT) |
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(sli_scanMask << CFG_SLI_LFB_SCANMASK_SHIFT) |
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(0x0 << CFG_SLI_LFB_NUMCHIPS_LOG2_SHIFT));
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#ifdef H3VDD
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pTDFX->writeChipLong(pTDFX, i, SST_3D_SLICTRL,
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(sli_renderMask << SLICTL_3D_RENDERMASK_SHIFT) |
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(sli_compareMask << SLICTL_3D_COMPAREMASK_SHIFT) |
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(sli_scanMask << SLICTL_3D_SCANMASK_SHIFT) |
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(0 << SLICTL_3D_NUMCHIPS_LOG2_SHIFT));
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#endif
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} else {
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/* SLI is on && aaSamples=4 */
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sli_renderMask = ((pTDFX->numChips>>1)-1) << sliLinesLog2;
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sli_compareMask = (i>>1) << sliLinesLog2;
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sli_scanMask = sliLines - 1;
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v = (sli_renderMask << CFG_SLI_LFB_RENDERMASK_SHIFT) |
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(sli_compareMask << CFG_SLI_LFB_COMPAREMASK_SHIFT) |
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(sli_scanMask << CFG_SLI_LFB_SCANMASK_SHIFT) |
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((nChipsLog2-1) << CFG_SLI_LFB_NUMCHIPS_LOG2_SHIFT) |
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CFG_SLI_LFB_CPU_WR_EN | CFG_SLI_LFB_DPTCH_WR_EN;
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#ifndef RD_ABORT_ERROR
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v|=CFG_SLI_RD_EN;
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#endif
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pciWriteLong(pTDFX->PciTag[i], CFG_SLI_LFB_CTRL, v);
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#ifdef H3VDD
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pTDFX->writeChipLong(pTDFX, i, SST_3D_SLICTRL,
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(sli_renderMask << SLICTL_3D_RENDERMASK_SHIFT) |
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(sli_compareMask << SLICTL_3D_COMPAREMASK_SHIFT) |
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(sli_scanMask << SLICTL_3D_SCANMASK_SHIFT) |
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((nChipsLog2-1) << SLICTL_3D_NUMCHIPS_LOG2_SHIFT) |
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SLICTL_3D_EN);
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#endif
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}
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TDFXSetLFBConfig(pTDFX);
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if (pTDFX->cpp==2) dwFormat = CFG_AA_LFB_RD_FORMAT_16BPP;
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else dwFormat = CFG_AA_LFB_RD_FORMAT_32BPP;
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if (pTDFX->numChips==2 && !sliEnable && aaSamples==2)
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dwFormat|=CFG_AA_LFB_RD_DIVIDE_BY_4;
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/* Thess are wrong, because we don't know where the secondary buffers
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are located */
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pTDFX->writeChipLong(pTDFX, i, CFG_AA_LFB_CTRL,
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(pScrn->videoRam<<10 /* 2nd buf */ << CFG_AA_BASEADDR_SHIFT) |
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CFG_AA_LFB_CPU_WR_EN | CFG_AA_LFB_DPTCH_WR_EN |
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CFG_AA_LFB_RD_EN | dwFormat |
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((aaSamples==4)?CFG_AA_LFB_RD_DIVIDE_BY_4:0));
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pTDFX->writeChipLong(pTDFX, i, CFG_AA_ZBUFF_APERTURE,
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((pTDFX->depthOffset>>12)<<CFG_AA_DEPTH_BUFFER_BEG_SHIFT) |
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((pScrn->videoRam>>2)<<CFG_AA_DEPTH_BUFFER_END_SHIFT));
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if (pTDFX->numChips>1 && i && (aaSamples || sliEnable)) {
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int vsyncOffsetPixels, vsyncOffsetChars, vsyncOffsetHXtra;
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if (aaSamples || (pTDFX->numChips==4 && sliEnable && aaSamples==4 &&
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sliAnalog && i==3)) {
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vsyncOffsetPixels=7;
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vsyncOffsetChars=4;
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vsyncOffsetHXtra=0;
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} else {
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vsyncOffsetPixels=7;
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vsyncOffsetChars=5;
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vsyncOffsetHXtra=0;
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}
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v=pciReadLong(pTDFX->PciTag[i], CFG_SLI_AA_MISC);
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pciWriteLong(pTDFX->PciTag[i], CFG_SLI_AA_MISC,
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(v&~CFG_VGA_VSYNC_OFFSET) |
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(vsyncOffsetPixels << CFG_VGA_VSYNC_OFFSET_PIXELS_SHIFT) |
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(vsyncOffsetChars << CFG_VGA_VSYNC_OFFSET_CHARS_SHIFT) |
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(vsyncOffsetHXtra <<
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CFG_VGA_VSYNC_OFFSET_HXTRA_SHIFT));
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}
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if (pTDFX->numChips==1 && aaSamples) {
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/* 1 chip 2 AA */
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
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CFG_ENHANCED_VIDEO_EN |
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CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
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CFG_VIDEO_OTHERMUX_SEL_PIPE<<CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT |
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CFG_DIVIDE_VIDEO_BY_2);
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
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0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT |
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0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT |
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0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT |
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0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT);
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
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0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT |
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0xff << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT);
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} else if (pTDFX->numChips==2 && !sliEnable && aaSamples==4 &&
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!sliAnalog) {
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/* 2 chips 4 digital AA */
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if (!i) {
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
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CFG_ENHANCED_VIDEO_EN |
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CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
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(CFG_VIDEO_OTHERMUX_SEL_PIPE_PLUS_AAFIFO <<
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CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
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CFG_DIVIDE_VIDEO_BY_4);
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
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(0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
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(0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
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(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
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(0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
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(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
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(0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
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} else {
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
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(CFG_ENHANCED_VIDEO_EN |
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CFG_ENHANCED_VIDEO_SLV |
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CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
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(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
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CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
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CFG_DIVIDE_VIDEO_BY_1));
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
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(0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
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(0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
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(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
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(0xff << CFG_SLI_COMPAREMASK_CRT_SHIFT));
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
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(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
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(0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
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}
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} else if (pTDFX->numChips==2 && !sliEnable && aaSamples==4 && sliAnalog) {
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/* 2 chips 4 analog AA */
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if (!i) {
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
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(CFG_ENHANCED_VIDEO_EN |
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CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
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(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
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CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
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CFG_DIVIDE_VIDEO_BY_4));
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} else {
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
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CFG_ENHANCED_VIDEO_EN |
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CFG_ENHANCED_VIDEO_SLV |
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CFG_DAC_HSYNC_TRISTATE |
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CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
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(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
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CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
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CFG_DIVIDE_VIDEO_BY_4);
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
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(0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
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(0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
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(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
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(0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
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pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
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(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
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(0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
}
|
|
} else if (pTDFX->numChips==2 && sliEnable && !aaSamples && !sliAnalog) {
|
|
/* 2 chips 2 digital SLI */
|
|
if (!i) {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
(CFG_ENHANCED_VIDEO_EN |
|
|
(CFG_VIDEO_OTHERMUX_SEL_AAFIFO <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_1));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
((0x0<<sliLinesLog2) << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
((0x1<<sliLinesLog2) << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
} else {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_ENHANCED_VIDEO_SLV |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_1);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0xff << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
((i<<sliLinesLog2) <<
|
|
CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
}
|
|
} else if (pTDFX->numChips>=2 && sliEnable && !aaSamples && sliAnalog) {
|
|
/* 2 or 4 chips 2/4 analog SLI */
|
|
if (!i) {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_1);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0xff << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
} else {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_ENHANCED_VIDEO_SLV |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_1);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
((i<<sliLinesLog2) <<
|
|
CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0xff << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
}
|
|
} else if (pTDFX->numChips==2 && sliEnable && aaSamples==2 && !sliAnalog) {
|
|
/* 2 chips 2 AA 2 digital SLI */
|
|
if (!i) {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
|
|
(CFG_VIDEO_OTHERMUX_SEL_AAFIFO <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_2);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
((0x1<<sliLinesLog2) <<
|
|
CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
} else {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_ENHANCED_VIDEO_SLV |
|
|
CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_1);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0xff << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
((i<<sliLinesLog2) <<
|
|
CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
}
|
|
} else if (pTDFX->numChips==2 && !sliEnable && aaSamples==2 && !sliAnalog) {
|
|
/* 2 chips 2 digital AA */
|
|
if (!i) {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE_PLUS_AAFIFO <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_2);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
} else {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_ENHANCED_VIDEO_SLV |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_1);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0xff << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
}
|
|
} else if (pTDFX->numChips==2 && !sliEnable && aaSamples==2 && sliAnalog) {
|
|
/* 2 chips 2 analog AA */
|
|
if (!i) {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_2);
|
|
} else {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_ENHANCED_VIDEO_SLV |
|
|
CFG_DAC_HSYNC_TRISTATE |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_2);
|
|
}
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
} else if (pTDFX->numChips>=2 && sliEnable && aaSamples==2 && sliAnalog) {
|
|
/* 2 or 4 chips 2 AA 2 or 4 analog SLI */
|
|
if (!i) {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_2);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0xff << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
} else {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_ENHANCED_VIDEO_SLV |
|
|
CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_2);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0xff << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
}
|
|
} else if (pTDFX->numChips==4 && sliEnable && !aaSamples && !sliAnalog) {
|
|
/* 4 chips 4 digital SLI */
|
|
if (!i) {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
(CFG_VIDEO_OTHERMUX_SEL_AAFIFO <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_SLI_AAFIFO_COMPARE_INV |
|
|
CFG_DIVIDE_VIDEO_BY_1);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
((0x0<<sliLinesLog2) <<
|
|
CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
} else {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_ENHANCED_VIDEO_SLV |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_1);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0xff << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
}
|
|
} else if (pTDFX->numChips==4 && sliEnable && aaSamples==2 && !sliAnalog) {
|
|
/* 4 chips 2 AA 4 digital SLI */
|
|
if (!i) {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
|
|
(CFG_VIDEO_OTHERMUX_SEL_AAFIFO <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_SLI_AAFIFO_COMPARE_INV |
|
|
CFG_DIVIDE_VIDEO_BY_2);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
((0x0<<sliLinesLog2) << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
} else {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_ENHANCED_VIDEO_SLV |
|
|
CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_1);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
(0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
(0xff << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(((pTDFX->numChips-1)<<sliLinesLog2) <<
|
|
CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
}
|
|
} else if (pTDFX->numChips==4 && sliEnable && aaSamples==4 && !sliAnalog) {
|
|
/* 4 chips 4 AA 2 digital SLI */
|
|
if (!i) {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE_PLUS_AAFIFO <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_4);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
((0x0<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
((0x0<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
} else if (i==1 || i==3) {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_ENHANCED_VIDEO_SLV |
|
|
CFG_DAC_HSYNC_TRISTATE |
|
|
CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_1);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
((((i+1)>>2)<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
((0x0<<sliLinesLog2) << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
((0xff<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
} else {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_ENHANCED_VIDEO_SLV |
|
|
CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE_PLUS_AAFIFO <<
|
|
CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_4);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
((0x1<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
((0x1<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0xff << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
}
|
|
} else if (pTDFX->numChips==4 && sliEnable && aaSamples==4 && sliAnalog) {
|
|
/* 4 chips 4 AA 2 analog SLI */
|
|
if (!i) {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_4);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
((0x0<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
((0x0<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
} else if (i==1 || i==3) {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_ENHANCED_VIDEO_SLV |
|
|
CFG_DAC_HSYNC_TRISTATE |
|
|
CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_4);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
((((i+1)>>2)<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
((((i+1)>>2)<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
} else {
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
CFG_ENHANCED_VIDEO_EN |
|
|
CFG_ENHANCED_VIDEO_SLV |
|
|
CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
|
|
(CFG_VIDEO_OTHERMUX_SEL_PIPE <<
|
|
CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
|
|
CFG_DIVIDE_VIDEO_BY_4);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
|
|
((0x1<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
|
|
((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_CRT_SHIFT) |
|
|
((0x1<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
|
|
(0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
|
|
(0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
|
|
}
|
|
}
|
|
if (pTDFX->numChips==4 && sliEnable && aaSamples==4 && i==3) {
|
|
v=pciReadLong(pTDFX->PciTag[i], CFG_SLI_AA_MISC);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_SLI_AA_MISC,
|
|
v | CFG_AA_LFB_RD_SLV_WAIT);
|
|
}
|
|
if (i) {
|
|
v=pciReadLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0);
|
|
pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
|
|
v|CFG_VIDPLL_SEL);
|
|
v=pTDFX->readChipLong(pTDFX, i, MISCINIT1);
|
|
pTDFX->writeChipLong(pTDFX, i, MISCINIT1, v|SST_POWERDOWN_DAC);
|
|
}
|
|
}
|
|
return TRUE;
|
|
}
|