275 lines
11 KiB
C
275 lines
11 KiB
C
#ifndef _I915_PROGRAM_H
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#define _I915_PROGRAM_H
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#define REG_TYPE_R 0 /* temporary regs, no need to
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* dcl, must be written before
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* read -- Preserved between
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* phases.
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*/
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#define REG_TYPE_T 1 /* Interpolated values, must be
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* dcl'ed before use.
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*
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* 0..7: texture coord,
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* 8: diffuse spec,
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* 9: specular color,
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* 10: fog parameter in w.
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*/
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#define REG_TYPE_CONST 2 /* Restriction: only one const
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* can be referenced per
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* instruction, though it may be
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* selected for multiple inputs.
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* Constants not initialized
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* default to zero.
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*/
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#define REG_TYPE_S 3 /* sampler */
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#define REG_TYPE_OC 4 /* output color (rgba) */
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#define REG_TYPE_OD 5 /* output depth (w), xyz are
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* temporaries. If not written,
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* interpolated depth is used?
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*/
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#define REG_TYPE_U 6 /* unpreserved temporaries */
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#define REG_TYPE_MASK 0x7
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#define REG_NR_MASK 0xf
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/* REG_TYPE_T:
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*/
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#define T_TEX0 0
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#define T_TEX1 1
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#define T_TEX2 2
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#define T_TEX3 3
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#define T_TEX4 4
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#define T_TEX5 5
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#define T_TEX6 6
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#define T_TEX7 7
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#define T_DIFFUSE 8
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#define T_SPECULAR 9
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#define T_FOG_W 10 /* interpolated fog is in W coord */
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/* Arithmetic instructions */
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/* .replicate_swizzle == selection and replication of a particular
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* scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww
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*/
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#define A0_NOP (0x0<<24) /* no operation */
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#define A0_ADD (0x1<<24) /* dst = src0 + src1 */
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#define A0_MOV (0x2<<24) /* dst = src0 */
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#define A0_MUL (0x3<<24) /* dst = src0 * src1 */
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#define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */
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#define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
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#define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */
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#define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */
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#define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */
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#define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */
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#define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
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#define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */
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#define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
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#define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */
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#define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */
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#define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */
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#define A0_FLR (0x10<<24) /* dst = floor(src0) */
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#define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */
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#define A0_TRC (0x12<<24) /* dst = int(src0) */
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#define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */
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#define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */
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#define A0_DEST_SATURATE (1<<22)
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#define A0_DEST_TYPE_SHIFT 19
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/* Allow: R, OC, OD, U */
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#define A0_DEST_NR_SHIFT 14
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/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
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#define A0_DEST_CHANNEL_X (1<<10)
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#define A0_DEST_CHANNEL_Y (2<<10)
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#define A0_DEST_CHANNEL_Z (4<<10)
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#define A0_DEST_CHANNEL_W (8<<10)
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#define A0_DEST_CHANNEL_ALL (0xf<<10)
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#define A0_DEST_CHANNEL_SHIFT 10
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#define A0_SRC0_TYPE_SHIFT 7
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#define A0_SRC0_NR_SHIFT 2
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#define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y)
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#define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z)
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#define SRC_X 0
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#define SRC_Y 1
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#define SRC_Z 2
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#define SRC_W 3
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#define SRC_ZERO 4
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#define SRC_ONE 5
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#define A1_SRC0_CHANNEL_X_NEGATE (1<<31)
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#define A1_SRC0_CHANNEL_X_SHIFT 28
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#define A1_SRC0_CHANNEL_Y_NEGATE (1<<27)
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#define A1_SRC0_CHANNEL_Y_SHIFT 24
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#define A1_SRC0_CHANNEL_Z_NEGATE (1<<23)
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#define A1_SRC0_CHANNEL_Z_SHIFT 20
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#define A1_SRC0_CHANNEL_W_NEGATE (1<<19)
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#define A1_SRC0_CHANNEL_W_SHIFT 16
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#define A1_SRC1_TYPE_SHIFT 13
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#define A1_SRC1_NR_SHIFT 8
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#define A1_SRC1_CHANNEL_X_NEGATE (1<<7)
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#define A1_SRC1_CHANNEL_X_SHIFT 4
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#define A1_SRC1_CHANNEL_Y_NEGATE (1<<3)
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#define A1_SRC1_CHANNEL_Y_SHIFT 0
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#define A2_SRC1_CHANNEL_Z_NEGATE (1<<31)
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#define A2_SRC1_CHANNEL_Z_SHIFT 28
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#define A2_SRC1_CHANNEL_W_NEGATE (1<<27)
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#define A2_SRC1_CHANNEL_W_SHIFT 24
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#define A2_SRC2_TYPE_SHIFT 21
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#define A2_SRC2_NR_SHIFT 16
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#define A2_SRC2_CHANNEL_X_NEGATE (1<<15)
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#define A2_SRC2_CHANNEL_X_SHIFT 12
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#define A2_SRC2_CHANNEL_Y_NEGATE (1<<11)
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#define A2_SRC2_CHANNEL_Y_SHIFT 8
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#define A2_SRC2_CHANNEL_Z_NEGATE (1<<7)
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#define A2_SRC2_CHANNEL_Z_SHIFT 4
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#define A2_SRC2_CHANNEL_W_NEGATE (1<<3)
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#define A2_SRC2_CHANNEL_W_SHIFT 0
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/* Declaration instructions */
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#define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib)
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* register or an s (sampler)
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* register. */
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#define D0_SAMPLE_TYPE_SHIFT 22
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#define D0_SAMPLE_TYPE_2D (0x0<<22)
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#define D0_SAMPLE_TYPE_CUBE (0x1<<22)
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#define D0_SAMPLE_TYPE_VOLUME (0x2<<22)
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#define D0_SAMPLE_TYPE_MASK (0x3<<22)
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#define D0_TYPE_SHIFT 19
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/* Allow: T, S */
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#define D0_NR_SHIFT 14
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/* Allow T: 0..10, S: 0..15 */
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#define D0_CHANNEL_X (1<<10)
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#define D0_CHANNEL_Y (2<<10)
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#define D0_CHANNEL_Z (4<<10)
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#define D0_CHANNEL_W (8<<10)
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#define D0_CHANNEL_ALL (0xf<<10)
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#define D0_CHANNEL_NONE (0<<10)
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#define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y)
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#define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z)
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/* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse
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* or specular declarations.
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*
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* For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw)
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*
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* Must be zero for S (sampler) dcls
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*/
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#define D1_MBZ 0
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#define D2_MBZ 0
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/* Texture instructions */
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#define T0_TEXLD (0x15<<24) /* Sample texture using predeclared
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* sampler and address, and output
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* filtered texel data to destination
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* register */
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#define T0_TEXLDP (0x16<<24) /* Same as texld but performs a
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* perspective divide of the texture
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* coordinate .xyz values by .w before
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* sampling. */
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#define T0_TEXLDB (0x17<<24) /* Same as texld but biases the
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* computed LOD by w. Only S4.6 two's
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* comp is used. This implies that a
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* float to fixed conversion is
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* done. */
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#define T0_TEXKILL (0x18<<24) /* Does not perform a sampling
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* operation. Simply kills the pixel
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* if any channel of the address
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* register is < 0.0. */
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#define T0_DEST_TYPE_SHIFT 19
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/* Allow: R, OC, OD, U */
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/* Note: U (unpreserved) regs do not retain their values between
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* phases (cannot be used for feedback)
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*
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* Note: oC and OD registers can only be used as the destination of a
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* texture instruction once per phase (this is an implementation
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* restriction).
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*/
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#define T0_DEST_NR_SHIFT 14
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/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
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#define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */
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#define T0_SAMPLER_NR_MASK (0xf<<0)
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#define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */
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/* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */
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#define T1_ADDRESS_REG_NR_SHIFT 17
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#define T2_MBZ 0
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/* Having zero and one in here makes the definition of swizzle a lot
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* easier.
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*/
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#define UREG_TYPE_SHIFT 29
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#define UREG_NR_SHIFT 24
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#define UREG_CHANNEL_X_NEGATE_SHIFT 23
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#define UREG_CHANNEL_X_SHIFT 20
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#define UREG_CHANNEL_Y_NEGATE_SHIFT 19
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#define UREG_CHANNEL_Y_SHIFT 16
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#define UREG_CHANNEL_Z_NEGATE_SHIFT 15
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#define UREG_CHANNEL_Z_SHIFT 12
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#define UREG_CHANNEL_W_NEGATE_SHIFT 11
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#define UREG_CHANNEL_W_SHIFT 8
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#define UREG_CHANNEL_ZERO_NEGATE_MBZ 5
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#define UREG_CHANNEL_ZERO_SHIFT 4
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#define UREG_CHANNEL_ONE_NEGATE_MBZ 1
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#define UREG_CHANNEL_ONE_SHIFT 0
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#define UREG_BAD 0xffffffff /* not a valid ureg */
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#define X SRC_X
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#define Y SRC_Y
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#define Z SRC_Z
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#define W SRC_W
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#define ZERO SRC_ZERO
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#define ONE SRC_ONE
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/* Construct a ureg:
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*/
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#define UREG(type, nr) (((type) << UREG_TYPE_SHIFT) | \
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((nr) << UREG_NR_SHIFT) | \
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(X << UREG_CHANNEL_X_SHIFT) | \
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(Y << UREG_CHANNEL_Y_SHIFT) | \
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(Z << UREG_CHANNEL_Z_SHIFT) | \
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(W << UREG_CHANNEL_W_SHIFT) | \
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(ZERO << UREG_CHANNEL_ZERO_SHIFT) | \
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(ONE << UREG_CHANNEL_ONE_SHIFT))
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#define GET_CHANNEL_SRC( reg, channel ) ((reg<<(channel*4)) & (0xf<<20))
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#define CHANNEL_SRC( src, channel ) (src>>(channel*4))
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#define GET_UREG_TYPE(reg) (((reg) >> UREG_TYPE_SHIFT) & REG_TYPE_MASK)
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#define GET_UREG_NR(reg) (((reg) >> UREG_NR_SHIFT) & REG_NR_MASK)
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#define UREG_XYZW_CHANNEL_MASK 0x00ffff00
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#define A0_DEST(reg) (((reg) & UREG_TYPE_NR_MASK) >> UREG_A0_DEST_SHIFT_LEFT)
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#define D0_DEST(reg) (((reg) & UREG_TYPE_NR_MASK) >> UREG_A0_DEST_SHIFT_LEFT)
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#define T0_DEST(reg) (((reg) & UREG_TYPE_NR_MASK) >> UREG_A0_DEST_SHIFT_LEFT)
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#define A0_SRC0(reg) (((reg) & UREG_MASK) >> UREG_A0_SRC0_SHIFT_LEFT)
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#define A1_SRC0(reg) (((reg) & UREG_MASK) << UREG_A1_SRC0_SHIFT_RIGHT)
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#define A1_SRC1(reg) (((reg) & UREG_MASK) >> UREG_A1_SRC1_SHIFT_LEFT)
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#define A2_SRC1(reg) (((reg) & UREG_MASK) << UREG_A2_SRC1_SHIFT_RIGHT)
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#define A2_SRC2(reg) (((reg) & UREG_MASK) >> UREG_A2_SRC2_SHIFT_LEFT)
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/* These are special, and don't have swizzle/negate bits.
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*/
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#define T0_SAMPLER( reg ) (GET_UREG_NR(reg) << T0_SAMPLER_NR_SHIFT)
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#define T1_ADDRESS_REG( reg ) ((GET_UREG_NR(reg) << T1_ADDRESS_REG_NR_SHIFT) | \
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(GET_UREG_TYPE(reg) << T1_ADDRESS_REG_TYPE_SHIFT))
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/* Macros for translating UREG's into the various register fields used
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* by the I915 programmable unit.
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*/
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#define UREG_A0_DEST_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_DEST_TYPE_SHIFT)
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#define UREG_A0_SRC0_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_SRC0_TYPE_SHIFT)
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#define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
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#define UREG_A1_SRC1_SHIFT_LEFT (UREG_TYPE_SHIFT - A1_SRC1_TYPE_SHIFT)
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#define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
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#define UREG_A2_SRC2_SHIFT_LEFT (UREG_TYPE_SHIFT - A2_SRC2_TYPE_SHIFT)
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#define UREG_MASK 0xffffff00
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#define UREG_TYPE_NR_MASK ((REG_TYPE_MASK << UREG_TYPE_SHIFT) | \
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(REG_NR_MASK << UREG_NR_SHIFT))
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#endif
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