88 lines
4.3 KiB
Plaintext
88 lines
4.3 KiB
Plaintext
/*
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* Copyright © 2009 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Author:
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* Zou Nan hai <nanhai.zou@intel.com>
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* Yan Li <li.l.yan@intel.com>
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* Liu Xi bin<xibin.liu@intel.com>
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*/
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/* GRF allocation:
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g1~g30: constant buffer
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g1~g2:intra IQ matrix
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g3~g4:non intra IQ matrix
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g5~g20:IDCT table
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g31: thread payload
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g58~g81:reference data
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g82: thread payload backup
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g83~g106:IDCT data
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g115: message descriptor for reading reference data */
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mov (1) g115.8<1>UD 0x01FUD {align1};
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send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1};
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add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1};
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send (16) 0 g42.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1};
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add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1};
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send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1};
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add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1};
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send (16) 0 g46.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1};
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add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1};
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mov (1) g115.8<1>UD 0x07001FUD {align1};
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send (16) 0 g48.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1};
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add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1};
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mov (1) g115.8<1>UD 0x1FUD {align1};
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send (16) 0 g56.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1};
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add (16) g32.0<1>UW g40.0<16,16,1>UB g42.0<16,16,1>UB {align1};
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add (16) g33.0<1>UW g42.0<16,16,1>UB g44.0<16,16,1>UB {align1};
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add (16) g34.0<1>UW g44.0<16,16,1>UB g46.0<16,16,1>UB {align1};
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add (16) g35.0<1>UW g46.0<16,16,1>UB g48.0<16,16,1>UB {align1};
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add (16) g36.0<1>UW g48.0<16,16,1>UB g50.0<16,16,1>UB {align1};
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add (16) g37.0<1>UW g50.0<16,16,1>UB g52.0<16,16,1>UB {align1};
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add (16) g38.0<1>UW g52.0<16,16,1>UB g54.0<16,16,1>UB {align1};
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add (16) g39.0<1>UW g54.0<16,16,1>UB g56.0<16,16,1>UB {align1};
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add (16) g32.0<1>UW g32.0<16,16,1>UW g40.1<16,16,1>UB {align1};
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add (16) g33.0<1>UW g33.0<16,16,1>UW g42.1<16,16,1>UB {align1};
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add (16) g34.0<1>UW g34.0<16,16,1>UW g44.1<16,16,1>UB {align1};
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add (16) g35.0<1>UW g35.0<16,16,1>UW g46.1<16,16,1>UB {align1};
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add (16) g36.0<1>UW g36.0<16,16,1>UW g48.1<16,16,1>UB {align1};
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add (16) g37.0<1>UW g37.0<16,16,1>UW g50.1<16,16,1>UB {align1};
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add (16) g38.0<1>UW g38.0<16,16,1>UW g52.1<16,16,1>UB {align1};
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add (16) g39.0<1>UW g39.0<16,16,1>UW g54.1<16,16,1>UB {align1};
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add (16) g32.0<1>UW g32.0<16,16,1>UW g42.1<16,16,1>UB {align1};
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add (16) g33.0<1>UW g33.0<16,16,1>UW g44.1<16,16,1>UB {align1};
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add (16) g34.0<1>UW g34.0<16,16,1>UW g46.1<16,16,1>UB {align1};
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add (16) g35.0<1>UW g35.0<16,16,1>UW g48.1<16,16,1>UB {align1};
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add (16) g36.0<1>UW g36.0<16,16,1>UW g50.1<16,16,1>UB {align1};
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add (16) g37.0<1>UW g37.0<16,16,1>UW g52.1<16,16,1>UB {align1};
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add (16) g38.0<1>UW g38.0<16,16,1>UW g54.1<16,16,1>UB {align1};
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add (16) g39.0<1>UW g39.0<16,16,1>UW g56.1<16,16,1>UB {align1};
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shr (16) g32.0<1>UW g32.0<16,16,1>UW 2UW {align1};
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shr (16) g33.0<1>UW g33.0<16,16,1>UW 2UW {align1};
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shr (16) g34.0<1>UW g34.0<16,16,1>UW 2UW {align1};
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shr (16) g35.0<1>UW g35.0<16,16,1>UW 2UW {align1};
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shr (16) g36.0<1>UW g36.0<16,16,1>UW 2UW {align1};
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shr (16) g37.0<1>UW g37.0<16,16,1>UW 2UW {align1};
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shr (16) g38.0<1>UW g38.0<16,16,1>UW 2UW {align1};
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shr (16) g39.0<1>UW g39.0<16,16,1>UW 2UW {align1};
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