54 lines
2.5 KiB
Plaintext
54 lines
2.5 KiB
Plaintext
/* GRF allocation:
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g1~g30: constant buffer
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g1~g2:intra IQ matrix
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g3~g4:non intra IQ matrix
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g5~g20:IDCT table
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g31: thread payload
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g58~g81:reference data
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g82: thread payload backup
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g83~g106:IDCT data
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g115: message descriptor for reading reference data */
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mov (1) g115.8<1>UD 0x07000FUD {align1};
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send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U
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send (16) 0 g45.0<1>UW g115<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V
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mov (1) g115.8<1>UD 0x01000FUD {align1};
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add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1};
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send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 1 {align1};//U
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send (16) 0 g49.0<1>UW g115<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 1 {align1};//V
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//U
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add (16) g32.0<1>UW g40.0<16,8,1>UB g41.0<16,8,1>UB {align1};
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add (16) g33.0<1>UW g41.0<16,8,1>UB g42.0<16,8,1>UB {align1};
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add (16) g34.0<1>UW g42.0<16,8,1>UB g43.0<16,8,1>UB {align1};
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add (16) g35.0<1>UW g43.0<16,8,1>UB g44.0<16,8,1>UB {align1};
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add (16) g32.0<1>UW g32.0<16,8,1>UW g40.1<16,8,1>UB {align1};
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add (16) g33.0<1>UW g33.0<16,8,1>UW g41.1<16,8,1>UB {align1};
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add (16) g34.0<1>UW g34.0<16,8,1>UW g42.1<16,8,1>UB {align1};
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add (16) g35.0<1>UW g35.0<16,8,1>UW g43.1<16,8,1>UB {align1};
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add (16) g32.0<1>UW g32.0<16,8,1>UW g41.1<16,8,1>UB {align1};
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add (16) g33.0<1>UW g33.0<16,8,1>UW g42.1<16,8,1>UB {align1};
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add (16) g34.0<1>UW g34.0<16,8,1>UW g43.1<16,8,1>UB {align1};
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add (16) g35.0<1>UW g35.0<16,8,1>UW g44.1<16,8,1>UB {align1};
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//V
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add (16) g36.0<1>UW g45.0<16,8,1>UB g46.0<16,8,1>UB {align1};
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add (16) g37.0<1>UW g46.0<16,8,1>UB g47.0<16,8,1>UB {align1};
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add (16) g38.0<1>UW g47.0<16,8,1>UB g48.0<16,8,1>UB {align1};
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add (16) g39.0<1>UW g48.0<16,8,1>UB g49.0<16,8,1>UB {align1};
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add (16) g36.0<1>UW g36.0<16,8,1>UW g45.1<16,8,1>UB {align1};
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add (16) g37.0<1>UW g37.0<16,8,1>UW g46.1<16,8,1>UB {align1};
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add (16) g38.0<1>UW g38.0<16,8,1>UW g47.1<16,8,1>UB {align1};
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add (16) g39.0<1>UW g39.0<16,8,1>UW g48.1<16,8,1>UB {align1};
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add (16) g36.0<1>UW g36.0<16,8,1>UW g46.1<16,8,1>UB {align1};
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add (16) g37.0<1>UW g37.0<16,8,1>UW g47.1<16,8,1>UB {align1};
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add (16) g38.0<1>UW g38.0<16,8,1>UW g48.1<16,8,1>UB {align1};
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add (16) g39.0<1>UW g39.0<16,8,1>UW g49.1<16,8,1>UB {align1};
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shr (32) g32.0<1>UW g32.0<16,16,1>UW 2UW {align1 compr};
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shr (32) g34.0<1>UW g34.0<16,16,1>UW 2UW {align1 compr};
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shr (32) g36.0<1>UW g36.0<16,16,1>UW 2UW {align1 compr};
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shr (32) g38.0<1>UW g38.0<16,16,1>UW 2UW {align1 compr};
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