785 lines
22 KiB
C
785 lines
22 KiB
C
/*
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* Copyright 1997 through 2004 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that copyright
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* notice and this permission notice appear in supporting documentation, and
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* that the name of Marc Aurele La France not be used in advertising or
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* publicity pertaining to distribution of the software without specific,
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* written prior permission. Marc Aurele La France makes no representations
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* about the suitability of this software for any purpose. It is provided
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* "as-is" without express or implied warranty.
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*
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* MARC AURELE LA FRANCE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO
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* EVENT SHALL MARC AURELE LA FRANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <string.h>
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#include <ctype.h>
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#include <stdint.h>
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#include "ati.h"
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#include "atichip.h"
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#include "atidac.h"
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#include "atimach64io.h"
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#include "atiprint.h"
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#include "atiwonderio.h"
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/*
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* ATIPrintBIOS --
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*
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* Display various parts of the BIOS when the server is invoked with -verbose.
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*/
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void
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ATIPrintBIOS
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(
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const CARD8 *BIOS,
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const unsigned int Length /* A multiple of 512 */
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)
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{
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unsigned char *Char = NULL;
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unsigned int Index;
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unsigned char Printable[17];
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if (xf86GetVerbosity() <= 4)
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return;
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(void)memset(Printable, 0, SizeOf(Printable));
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xf86ErrorFVerb(5, "\n BIOS image:");
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for (Index = 0; Index < Length; Index++)
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{
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if (!(Index & (4U - 1U)))
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{
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if (!(Index & (16U - 1U)))
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{
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if (Printable[0])
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xf86ErrorFVerb(5, " |%s|", Printable);
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Char = Printable;
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xf86ErrorFVerb(5, "\n 0x%08X: ", Index);
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}
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xf86ErrorFVerb(5, " ");
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}
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xf86ErrorFVerb(5, "%02X", BIOS[Index]);
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if (isprint(BIOS[Index]))
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*Char++ = BIOS[Index];
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else
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*Char++ = '.';
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}
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xf86ErrorFVerb(5, " |%s|\n", Printable);
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}
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#ifndef AVOID_CPIO
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/*
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* ATIPrintIndexedRegisters --
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*
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* Display a set of indexed byte-size registers when the server is invoked with
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* -verbose.
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*/
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static void
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ATIPrintIndexedRegisters
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(
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const unsigned long Port,
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const CARD8 StartIndex,
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const CARD8 EndIndex,
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const char *Name,
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const unsigned long GenS1
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)
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{
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int Index;
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xf86ErrorFVerb(4, "\n %s register values:", Name);
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for (Index = StartIndex; Index < EndIndex; Index++)
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{
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if (!(Index & (4U - 1U)))
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{
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if (!(Index & (16U - 1U)))
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xf86ErrorFVerb(4, "\n 0x%02X: ", Index);
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xf86ErrorFVerb(4, " ");
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}
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if (Port == ATTRX)
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(void)inb(GenS1); /* Reset flip-flop */
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xf86ErrorFVerb(4, "%02X", GetReg(Port, Index));
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}
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if (Port == ATTRX)
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{
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(void)inb(GenS1); /* Reset flip-flop */
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outb(ATTRX, 0x20U); /* Turn on PAS bit */
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}
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xf86ErrorFVerb(4, "\n");
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}
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#endif /* AVOID_CPIO */
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/*
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* ATIMach64PrintRegisters --
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*
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* Display a Mach64's main register bank when the server is invoked with
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* -verbose.
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*/
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static void
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ATIMach64PrintRegisters
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(
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ATIPtr pATI,
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CARD8 *crtc,
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const char *Description
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)
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{
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CARD32 IOValue;
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CARD8 dac_read, dac_mask, dac_data, dac_write;
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int Index, Limit;
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#ifndef AVOID_CPIO
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int Step;
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#endif /* AVOID_CPIO */
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xf86ErrorFVerb(4, "\n Mach64 %s register values:", Description);
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#ifdef AVOID_CPIO
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if (pATI->pBlock[1])
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Limit = DWORD_SELECT;
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else
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Limit = MM_IO_SELECT;
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for (Index = 0; Index <= Limit; Index += UnitOf(MM_IO_SELECT))
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{
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if (!(Index & SetBits(3, MM_IO_SELECT)))
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xf86ErrorFVerb(4, "\n 0x%04X: ", Index);
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if (Index == (DAC_REGS & DWORD_SELECT))
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{
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dac_read = in8(DAC_REGS + 3);
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DACDelay;
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dac_mask = in8(DAC_REGS + 2);
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DACDelay;
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dac_data = in8(DAC_REGS + 1);
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DACDelay;
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dac_write = in8(DAC_REGS + 0);
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DACDelay;
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xf86ErrorFVerb(4, " %02X%02X%02X%02X",
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dac_read, dac_mask, dac_data, dac_write);
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out8(DAC_REGS + 2, dac_mask);
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DACDelay;
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out8(DAC_REGS + 3, dac_read);
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DACDelay;
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}
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else
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{
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IOValue = inm(Index);
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if ((Index == (CRTC_GEN_CNTL & DWORD_SELECT)) &&
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(IOValue & CRTC_EXT_DISP_EN))
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*crtc = ATI_CRTC_MACH64;
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xf86ErrorFVerb(4, " %08lX", (unsigned long)IOValue);
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}
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}
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#else /* AVOID_CPIO */
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Limit = ATIIOPort(IOPortTag(0x1FU, 0x3FU));
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Step = ATIIOPort(IOPortTag(0x01U, 0x01U)) - pATI->CPIOBase;
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for (Index = pATI->CPIOBase; Index <= Limit; Index += Step)
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{
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if (!(((Index - pATI->CPIOBase) / Step) & 0x03U))
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xf86ErrorFVerb(4, "\n 0x%04X: ", Index);
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if (Index == (int)ATIIOPort(DAC_REGS))
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{
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dac_read = in8(DAC_REGS + 3);
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DACDelay;
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dac_mask = in8(DAC_REGS + 2);
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DACDelay;
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dac_data = in8(DAC_REGS + 1);
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DACDelay;
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dac_write = in8(DAC_REGS + 0);
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DACDelay;
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xf86ErrorFVerb(4, " %02X%02X%02X%02X",
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dac_read, dac_mask, dac_data, dac_write);
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out8(DAC_REGS + 2, dac_mask);
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DACDelay;
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out8(DAC_REGS + 3, dac_read);
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DACDelay;
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}
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else
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{
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IOValue = inl(Index);
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if ((Index == (int)ATIIOPort(CRTC_GEN_CNTL)) &&
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(IOValue & CRTC_EXT_DISP_EN))
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*crtc = ATI_CRTC_MACH64;
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xf86ErrorFVerb(4, " %08lX", (unsigned long)IOValue);
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}
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}
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#endif /* AVOID_CPIO */
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xf86ErrorFVerb(4, "\n");
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}
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/*
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* ATIMach64PrintPLLRegisters --
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*
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* Display an integrated Mach64's PLL registers when the server is invoked with
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* -verbose.
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*/
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static void
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ATIMach64PrintPLLRegisters
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(
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ATIPtr pATI
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)
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{
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int Index, Limit;
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CARD8 PLLReg[MaxBits(PLL_ADDR) + 1];
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for (Limit = 0; Limit < SizeOf(PLLReg); Limit++)
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PLLReg[Limit] = ATIMach64GetPLLReg(Limit);
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/* Determine how many PLL registers there really are */
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while ((Limit = Limit >> 1))
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for (Index = 0; Index < Limit; Index++)
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if (PLLReg[Index] != PLLReg[Index + Limit])
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goto FoundLimit;
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FoundLimit:
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Limit <<= 1;
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xf86ErrorFVerb(4, "\n Mach64 PLL register values:");
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for (Index = 0; Index < Limit; Index++)
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{
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if (!(Index & 3))
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{
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if (!(Index & 15))
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xf86ErrorFVerb(4, "\n 0x%02X: ", Index);
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xf86ErrorFVerb(4, " ");
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}
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xf86ErrorFVerb(4, "%02X", PLLReg[Index]);
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}
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xf86ErrorFVerb(4, "\n");
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}
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/*
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* ATIRGB514PrintRegisters --
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*
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* Display IBM RGB 514 registers when the server is invoked with -verbose.
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*/
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static void
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ATIRGB514PrintRegisters
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(
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ATIPtr pATI
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)
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{
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CARD32 crtc_gen_cntl, dac_cntl;
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CARD8 index_lo, index_hi, index_ctl;
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int Index;
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/* Temporarily switch to Mach64 CRTC */
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crtc_gen_cntl = inr(CRTC_GEN_CNTL);
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if (!(crtc_gen_cntl & CRTC_EXT_DISP_EN))
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outr(CRTC_GEN_CNTL, crtc_gen_cntl | CRTC_EXT_DISP_EN);
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/* Temporarily switch to IBM RGB 514 registers */
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dac_cntl = inr(DAC_CNTL);
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outr(DAC_CNTL, (dac_cntl & ~DAC_EXT_SEL_RS3) | DAC_EXT_SEL_RS2);
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index_lo = in8(M64_DAC_WRITE);
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index_hi = in8(M64_DAC_DATA);
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index_ctl = in8(M64_DAC_READ);
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out8(M64_DAC_WRITE, 0x00U);
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out8(M64_DAC_DATA, 0x00U);
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out8(M64_DAC_READ, 0x01U); /* Auto-increment */
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xf86ErrorFVerb(4, "\n IBM RGB 514 registers:");
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for (Index = 0; Index < 0x0800; Index++)
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{
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if (!(Index & 3))
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{
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if (!(Index & 15))
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{
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xf86ErrorFVerb(4, "\n 0x%04X: ", Index);
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/* Need to rewrite index every so often... */
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if ((Index == 0x0100) || (Index == 0x0500))
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{
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out8(M64_DAC_WRITE, 0x00U);
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out8(M64_DAC_DATA, Index >> 8);
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}
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}
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xf86ErrorFVerb(4, " ");
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}
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xf86ErrorFVerb(4, "%02X", in8(M64_DAC_MASK));
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}
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/* Restore registers */
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out8(M64_DAC_WRITE, index_lo);
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out8(M64_DAC_DATA, index_hi);
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out8(M64_DAC_READ, index_ctl);
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outr(DAC_CNTL, dac_cntl);
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if (!(crtc_gen_cntl & CRTC_EXT_DISP_EN))
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outr(CRTC_GEN_CNTL, crtc_gen_cntl);
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xf86ErrorFVerb(4, "\n");
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}
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/*
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* ATIPrintRegisters --
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*
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* Display various registers when the server is invoked with -verbose.
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*/
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void
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ATIPrintRegisters
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(
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ATIPtr pATI
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)
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{
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int Index;
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CARD32 lcd_index, tv_out_index, lcd_gen_ctrl;
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CARD8 dac_read, dac_mask, dac_write;
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CARD8 crtc;
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#ifndef AVOID_CPIO
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CARD8 genmo;
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crtc = ATI_CRTC_VGA;
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if (pATI->VGAAdapter)
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{
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xf86ErrorFVerb(4, "\n Miscellaneous output register value: 0x%02X.\n",
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genmo = inb(R_GENMO));
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if (genmo & 0x01U)
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{
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if (pATI->Chip == ATI_CHIP_264LT)
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{
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lcd_gen_ctrl = inr(LCD_GEN_CTRL);
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outr(LCD_GEN_CTRL, lcd_gen_ctrl & ~SHADOW_RW_EN);
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ATIPrintIndexedRegisters(CRTX(ColourIOBase), 0, 64,
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"Non-shadow colour CRT controller", 0);
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outr(LCD_GEN_CTRL, lcd_gen_ctrl | SHADOW_RW_EN);
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ATIPrintIndexedRegisters(CRTX(ColourIOBase), 0, 64,
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"Shadow colour CRT controller", 0);
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outr(LCD_GEN_CTRL, lcd_gen_ctrl);
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}
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else if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
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(pATI->Chip == ATI_CHIP_264XL) ||
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(pATI->Chip == ATI_CHIP_MOBILITY))
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{
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lcd_index = inr(LCD_INDEX);
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lcd_gen_ctrl = ATIMach64GetLCDReg(LCD_GEN_CNTL);
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ATIMach64PutLCDReg(LCD_GEN_CNTL,
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lcd_gen_ctrl & ~(CRTC_RW_SELECT | SHADOW_RW_EN));
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ATIPrintIndexedRegisters(CRTX(ColourIOBase), 0, 64,
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"Non-shadow colour CRT controller", 0);
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ATIMach64PutLCDReg(LCD_GEN_CNTL,
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(lcd_gen_ctrl & ~CRTC_RW_SELECT) | SHADOW_RW_EN);
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ATIPrintIndexedRegisters(CRTX(ColourIOBase), 0, 64,
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"Shadow colour CRT controller", 0);
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ATIMach64PutLCDReg(LCD_GEN_CNTL, lcd_gen_ctrl);
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outr(LCD_INDEX, lcd_index);
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}
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else
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{
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ATIPrintIndexedRegisters(CRTX(ColourIOBase), 0, 64,
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"Colour CRT controller", 0);
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}
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ATIPrintIndexedRegisters(ATTRX, 0, 32, "Attribute controller",
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GENS1(ColourIOBase));
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}
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else
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{
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if (pATI->Chip == ATI_CHIP_264LT)
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{
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lcd_gen_ctrl = inr(LCD_GEN_CTRL);
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outr(LCD_GEN_CTRL, lcd_gen_ctrl & ~SHADOW_RW_EN);
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ATIPrintIndexedRegisters(CRTX(MonochromeIOBase), 0, 64,
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"Non-shadow monochrome CRT controller", 0);
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outr(LCD_GEN_CTRL, lcd_gen_ctrl | SHADOW_RW_EN);
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ATIPrintIndexedRegisters(CRTX(MonochromeIOBase), 0, 64,
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"Shadow monochrome CRT controller", 0);
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outr(LCD_GEN_CTRL, lcd_gen_ctrl);
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}
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else if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
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(pATI->Chip == ATI_CHIP_264XL) ||
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(pATI->Chip == ATI_CHIP_MOBILITY))
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{
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lcd_index = inr(LCD_INDEX);
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lcd_gen_ctrl = ATIMach64GetLCDReg(LCD_GEN_CNTL);
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ATIMach64PutLCDReg(LCD_GEN_CNTL,
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lcd_gen_ctrl & ~(CRTC_RW_SELECT | SHADOW_RW_EN));
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ATIPrintIndexedRegisters(CRTX(MonochromeIOBase), 0, 64,
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"Non-shadow monochrome CRT controller", 0);
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ATIMach64PutLCDReg(LCD_GEN_CNTL,
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(lcd_gen_ctrl & ~CRTC_RW_SELECT) | SHADOW_RW_EN);
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ATIPrintIndexedRegisters(CRTX(MonochromeIOBase), 0, 64,
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"Shadow monochrome CRT controller", 0);
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ATIMach64PutLCDReg(LCD_GEN_CNTL, lcd_gen_ctrl);
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outr(LCD_INDEX, lcd_index);
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}
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else
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{
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ATIPrintIndexedRegisters(CRTX(MonochromeIOBase), 0, 64,
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"Monochrome CRT controller", 0);
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}
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ATIPrintIndexedRegisters(ATTRX, 0, 32, "Attribute controller",
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GENS1(MonochromeIOBase));
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}
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ATIPrintIndexedRegisters(GRAX, 0, 16, "Graphics controller", 0);
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ATIPrintIndexedRegisters(SEQX, 0, 8, "Sequencer", 0);
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if (pATI->CPIO_VGAWonder)
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ATIPrintIndexedRegisters(pATI->CPIO_VGAWonder, 0x80U, 0xC0U,
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"ATI extended VGA", 0);
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}
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#endif /* AVOID_CPIO */
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if (pATI->Chip == ATI_CHIP_264LT)
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{
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lcd_gen_ctrl = inr(LCD_GEN_CTRL);
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outr(LCD_GEN_CTRL, lcd_gen_ctrl & ~SHADOW_RW_EN);
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ATIMach64PrintRegisters(pATI, &crtc, "non-shadow");
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outr(LCD_GEN_CTRL, lcd_gen_ctrl | SHADOW_RW_EN);
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ATIMach64PrintRegisters(pATI, &crtc, "shadow");
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outr(LCD_GEN_CTRL, lcd_gen_ctrl);
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ATIMach64PrintPLLRegisters(pATI);
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}
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else if ((pATI->Chip == ATI_CHIP_264LTPRO) ||
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(pATI->Chip == ATI_CHIP_264XL) ||
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(pATI->Chip == ATI_CHIP_MOBILITY))
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{
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lcd_index = inr(LCD_INDEX);
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lcd_gen_ctrl = ATIMach64GetLCDReg(LCD_GEN_CNTL);
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ATIMach64PutLCDReg(LCD_GEN_CNTL,
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lcd_gen_ctrl & ~(CRTC_RW_SELECT | SHADOW_RW_EN));
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ATIMach64PrintRegisters(pATI, &crtc, "non-shadow");
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ATIMach64PutLCDReg(LCD_GEN_CNTL,
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(lcd_gen_ctrl & ~CRTC_RW_SELECT) | SHADOW_RW_EN);
|
|
ATIMach64PrintRegisters(pATI, &crtc, "shadow");
|
|
|
|
if (pATI->Chip != ATI_CHIP_264XL)
|
|
{
|
|
ATIMach64PutLCDReg(LCD_GEN_CNTL, lcd_gen_ctrl | CRTC_RW_SELECT);
|
|
ATIMach64PrintRegisters(pATI, &crtc, "secondary");
|
|
}
|
|
|
|
ATIMach64PutLCDReg(LCD_GEN_CNTL, lcd_gen_ctrl);
|
|
|
|
ATIMach64PrintPLLRegisters(pATI);
|
|
|
|
xf86ErrorFVerb(4, "\n LCD register values:");
|
|
for (Index = 0; Index < 64; Index++)
|
|
{
|
|
if (!(Index & 3))
|
|
xf86ErrorFVerb(4, "\n 0x%02X: ", Index);
|
|
xf86ErrorFVerb(4, " %08X", ATIMach64GetLCDReg(Index));
|
|
}
|
|
|
|
outr(LCD_INDEX, lcd_index);
|
|
|
|
tv_out_index = inr(TV_OUT_INDEX);
|
|
|
|
xf86ErrorFVerb(4, "\n\n TV_OUT register values:");
|
|
for (Index = 0; Index < 256; Index++)
|
|
{
|
|
if (!(Index & 3))
|
|
xf86ErrorFVerb(4, "\n 0x%02X: ", Index);
|
|
xf86ErrorFVerb(4, " %08X", ATIMach64GetTVReg(Index));
|
|
}
|
|
|
|
outr(TV_OUT_INDEX, tv_out_index);
|
|
|
|
xf86ErrorFVerb(4, "\n");
|
|
}
|
|
else
|
|
{
|
|
|
|
#ifdef AVOID_CPIO
|
|
|
|
ATIMach64PrintRegisters(pATI, &crtc, "MMIO");
|
|
|
|
#else /* AVOID_CPIO */
|
|
|
|
ATIMach64PrintRegisters(pATI, &crtc,
|
|
(pATI->CPIODecoding == SPARSE_IO) ? "sparse" : "block");
|
|
|
|
#endif /* AVOID_CPIO */
|
|
|
|
if (pATI->Chip >= ATI_CHIP_264CT)
|
|
ATIMach64PrintPLLRegisters(pATI);
|
|
|
|
if (pATI->DAC == ATI_DAC_IBMRGB514)
|
|
ATIRGB514PrintRegisters(pATI);
|
|
}
|
|
|
|
#ifdef AVOID_CPIO
|
|
|
|
dac_read = in8(M64_DAC_READ);
|
|
DACDelay;
|
|
dac_write = in8(M64_DAC_WRITE);
|
|
DACDelay;
|
|
dac_mask = in8(M64_DAC_MASK);
|
|
DACDelay;
|
|
|
|
xf86ErrorFVerb(4, "\n"
|
|
" DAC read index: 0x%02X\n"
|
|
" DAC write index: 0x%02X\n"
|
|
" DAC mask: 0x%02X\n\n"
|
|
" DAC colour lookup table:",
|
|
dac_read, dac_write, dac_mask);
|
|
|
|
out8(M64_DAC_MASK, 0xFFU);
|
|
DACDelay;
|
|
out8(M64_DAC_READ, 0x00U);
|
|
DACDelay;
|
|
|
|
for (Index = 0; Index < 256; Index++)
|
|
{
|
|
if (!(Index & 3))
|
|
xf86ErrorFVerb(4, "\n 0x%02X:", Index);
|
|
xf86ErrorFVerb(4, " %02X", in8(M64_DAC_DATA));
|
|
DACDelay;
|
|
xf86ErrorFVerb(4, " %02X", in8(M64_DAC_DATA));
|
|
DACDelay;
|
|
xf86ErrorFVerb(4, " %02X", in8(M64_DAC_DATA));
|
|
DACDelay;
|
|
}
|
|
|
|
out8(M64_DAC_MASK, dac_mask);
|
|
DACDelay;
|
|
out8(M64_DAC_READ, dac_read);
|
|
DACDelay;
|
|
|
|
#else /* AVOID_CPIO */
|
|
|
|
ATISetDACIOPorts(pATI, crtc);
|
|
|
|
dac_read = inb(pATI->CPIO_DAC_READ);
|
|
DACDelay;
|
|
dac_write = inb(pATI->CPIO_DAC_WRITE);
|
|
DACDelay;
|
|
dac_mask = inb(pATI->CPIO_DAC_MASK);
|
|
DACDelay;
|
|
|
|
xf86ErrorFVerb(4, "\n"
|
|
" DAC read index: 0x%02X\n"
|
|
" DAC write index: 0x%02X\n"
|
|
" DAC mask: 0x%02X\n\n"
|
|
" DAC colour lookup table:",
|
|
dac_read, dac_write, dac_mask);
|
|
|
|
outb(pATI->CPIO_DAC_MASK, 0xFFU);
|
|
DACDelay;
|
|
outb(pATI->CPIO_DAC_READ, 0x00U);
|
|
DACDelay;
|
|
|
|
for (Index = 0; Index < 256; Index++)
|
|
{
|
|
if (!(Index & 3))
|
|
xf86ErrorFVerb(4, "\n 0x%02X:", Index);
|
|
xf86ErrorFVerb(4, " %02X", inb(pATI->CPIO_DAC_DATA));
|
|
DACDelay;
|
|
xf86ErrorFVerb(4, " %02X", inb(pATI->CPIO_DAC_DATA));
|
|
DACDelay;
|
|
xf86ErrorFVerb(4, " %02X", inb(pATI->CPIO_DAC_DATA));
|
|
DACDelay;
|
|
}
|
|
|
|
outb(pATI->CPIO_DAC_MASK, dac_mask);
|
|
DACDelay;
|
|
outb(pATI->CPIO_DAC_READ, dac_read);
|
|
DACDelay;
|
|
|
|
#endif /* AVOID_CPIO */
|
|
|
|
{
|
|
xf86ErrorFVerb(4, "\n\n PCI configuration register values:");
|
|
for (Index = 0; Index < 256; Index+= 4)
|
|
{
|
|
pciVideoPtr pVideo = pATI->PCIInfo;
|
|
uint32_t data;
|
|
|
|
PCI_READ_LONG(pVideo, &data, Index);
|
|
|
|
if (!(Index & 15))
|
|
xf86ErrorFVerb(4, "\n 0x%02X: ", Index);
|
|
xf86ErrorFVerb(4, " 0x%08X", data);
|
|
}
|
|
}
|
|
|
|
xf86ErrorFVerb(4, "\n");
|
|
|
|
#ifndef AVOID_CPIO
|
|
|
|
if (pATI->pBank)
|
|
xf86ErrorFVerb(4, "\n Banked aperture at 0x%0lX.",
|
|
(unsigned long)pATI->pBank);
|
|
else
|
|
xf86ErrorFVerb(4, "\n No banked aperture.");
|
|
|
|
#endif /* AVOID_CPIO */
|
|
|
|
if (pATI->pMemory)
|
|
{
|
|
xf86ErrorFVerb(4, "\n Linear aperture at %p.\n", pATI->pMemory);
|
|
}
|
|
|
|
if (pATI->pBlock[0])
|
|
{
|
|
xf86ErrorFVerb(4, " Block 0 aperture at %p.\n", pATI->pBlock[0]);
|
|
if (inr(CONFIG_CHIP_ID) == pATI->config_chip_id)
|
|
xf86ErrorFVerb(4, " MMIO registers are correctly mapped.\n");
|
|
else
|
|
xf86ErrorFVerb(4, " MMIO mapping is in error!\n");
|
|
if (pATI->pBlock[1])
|
|
xf86ErrorFVerb(4, " Block 1 aperture at %p.\n",
|
|
pATI->pBlock[1]);
|
|
}
|
|
else
|
|
{
|
|
xf86ErrorFVerb(4, " No MMIO aperture.\n");
|
|
}
|
|
|
|
if (pATI->pCursorImage)
|
|
xf86ErrorFVerb(4, " Hardware cursor image aperture at %p.\n",
|
|
pATI->pCursorImage);
|
|
else
|
|
xf86ErrorFVerb(4, " No hardware cursor image aperture.\n");
|
|
|
|
xf86ErrorFVerb(4, "\n");
|
|
}
|
|
|
|
/*
|
|
* A table to associate mode attributes with character strings.
|
|
*/
|
|
static const SymTabRec ModeAttributeNames[] =
|
|
{
|
|
{V_PHSYNC, "+hsync"},
|
|
{V_NHSYNC, "-hsync"},
|
|
{V_PVSYNC, "+vsync"},
|
|
{V_NVSYNC, "-vsync"},
|
|
{V_PCSYNC, "+csync"},
|
|
{V_NCSYNC, "-csync"},
|
|
{V_INTERLACE, "interlace"},
|
|
{V_DBLSCAN, "doublescan"},
|
|
{V_CSYNC, "composite"},
|
|
{V_DBLCLK, "dblclk"},
|
|
{V_CLKDIV2, "clkdiv2"},
|
|
{0, NULL}
|
|
};
|
|
|
|
/*
|
|
* ATIPrintMode --
|
|
*
|
|
* This function displays a mode's timing information.
|
|
*/
|
|
void
|
|
ATIPrintMode
|
|
(
|
|
DisplayModePtr pMode
|
|
)
|
|
{
|
|
const SymTabRec *pSymbol = ModeAttributeNames;
|
|
int flags = pMode->Flags;
|
|
double mClock, hSync, vRefresh;
|
|
|
|
mClock = (double)pMode->SynthClock;
|
|
if (pMode->HSync > 0.0)
|
|
hSync = pMode->HSync;
|
|
else
|
|
hSync = mClock / pMode->HTotal;
|
|
if (pMode->VRefresh > 0.0)
|
|
{
|
|
vRefresh = pMode->VRefresh;
|
|
}
|
|
else
|
|
{
|
|
vRefresh = (hSync * 1000.0) / pMode->VTotal;
|
|
if (flags & V_INTERLACE)
|
|
vRefresh *= 2.0;
|
|
if (flags & V_DBLSCAN)
|
|
vRefresh /= 2.0;
|
|
if (pMode->VScan > 1)
|
|
vRefresh /= pMode->VScan;
|
|
}
|
|
|
|
xf86ErrorFVerb(4, " Dot clock: %7.3f MHz\n", mClock / 1000.0);
|
|
xf86ErrorFVerb(4, " Horizontal sync: %7.3f kHz\n", hSync);
|
|
xf86ErrorFVerb(4, " Vertical refresh: %7.3f Hz (%s)\n", vRefresh,
|
|
(flags & V_INTERLACE) ? "I" : "NI");
|
|
if ((pMode->ClockIndex >= 0) && (pMode->ClockIndex < MAXCLOCKS))
|
|
xf86ErrorFVerb(4, " Clock index: %d\n", pMode->ClockIndex);
|
|
xf86ErrorFVerb(4, " Horizontal timings: %4d %4d %4d %4d\n"
|
|
" Vertical timings: %4d %4d %4d %4d\n",
|
|
pMode->HDisplay, pMode->HSyncStart, pMode->HSyncEnd, pMode->HTotal,
|
|
pMode->VDisplay, pMode->VSyncStart, pMode->VSyncEnd, pMode->VTotal);
|
|
|
|
if (flags & V_HSKEW)
|
|
{
|
|
flags &= ~V_HSKEW;
|
|
xf86ErrorFVerb(4, " Horizontal skew: %4d\n", pMode->HSkew);
|
|
}
|
|
|
|
if (pMode->VScan >= 1)
|
|
xf86ErrorFVerb(4, " Vertical scan: %4d\n", pMode->VScan);
|
|
|
|
xf86ErrorFVerb(4, " Flags: ");
|
|
for (; pSymbol->token; pSymbol++)
|
|
{
|
|
if (flags & pSymbol->token)
|
|
{
|
|
xf86ErrorFVerb(4, " %s", pSymbol->name);
|
|
flags &= ~pSymbol->token;
|
|
if (!flags)
|
|
break;
|
|
}
|
|
}
|
|
|
|
xf86ErrorFVerb(4, "\n");
|
|
}
|