73d1e76463
Tested by todd. ok Matthieu.
972 lines
31 KiB
C
972 lines
31 KiB
C
/*
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* 2D Acceleration for SiS 315 and Xabre series
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* Definitions for the SIS engine communication.
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*
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* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1) Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2) Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3) The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Author: Thomas Winischhofer <thomas@winischhofer.net>
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*
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* 2003/08/18: Added VRAM queue support
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*
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*/
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/* SiS315 and 330 engine commands */
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#define BITBLT 0x00000000 /* Blit */
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#define COLOREXP 0x00000001 /* Color expand */
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#define ENCOLOREXP 0x00000002 /* Enhanced color expand (315 only?) */
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#define MULTIPLE_SCANLINE 0x00000003 /* 315 only, not 330 */
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#define LINE 0x00000004 /* Draw line */
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#define TRAPAZOID_FILL 0x00000005 /* Fill trapezoid */
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#define TRANSPARENT_BITBLT 0x00000006 /* Transparent Blit */
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#define ALPHA_BLEND 0x00000007 /* Alpha blended BitBlt */
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#define A3D_FUNCTION 0x00000008 /* 3D command ? */
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#define CLEAR_Z_BUFFER 0x00000009 /* ? */
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#define GRADIENT_FILL 0x0000000A /* Gradient fill */
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#define STRETCH_BITBLT 0x0000000B /* Stretched BitBlit */
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#define YUVRGB_BLIT_325 0x0000000C
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#define YUVRGB_BLIT_330 0x00000003
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/* Command bits */
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/* Source selection */
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#define SRCVIDEO 0x00000000 /* source is video RAM */
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#define SRCSYSTEM 0x00000010 /* source is system memory */
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#define SRCCPUBLITBUF SRCSYSTEM /* source is CPU-driven BitBuffer (for color expand) */
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#define SRCAGP 0x00000020 /* source is AGP memory (?) */
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/* Pattern source selection */
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#define PATFG 0x00000000 /* foreground color */
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#define PATPATREG 0x00000040 /* pattern in pattern buffer (0x8300) */
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#define PATMONO 0x00000080 /* mono pattern */
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/* Clipping flags */
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#define NOCLIP 0x00000000
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#define NOMERGECLIP 0x04000000
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#define CLIPENABLE 0x00040000
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#define CLIPWITHOUTMERGE 0x04040000
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/* Subfunctions for BitBlt: Transparency */
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#define OPAQUE 0x00000000
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#define TRANSPARENT 0x00100000
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/* Subfunctions for Alpha Blended BitBlt */
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#define A_CONSTANTALPHA 0x00000000
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#define A_PERPIXELALPHA 0x00080000
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#define A_NODESTALPHA 0x00100000
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#define A_3DFULLSCENE 0x00180000
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/* Destination */
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#define DSTAGP 0x02000000
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#define DSTVIDEO 0x00000000
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/* Subfunctions for Color/Enhanced Color Expansion */
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#define COLOR_TO_MONO 0x00100000
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#define AA_TEXT 0x00200000
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/* Line */
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#define LINE_STYLE 0x00800000
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#define NO_RESET_COUNTER 0x00400000
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#define NO_LAST_PIXEL 0x00200000
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/* Trapezoid (315 only?) */
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#define T_XISMAJORL 0x00800000 /* X axis is driving axis (left) */
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#define T_XISMAJORR 0x08000000 /* X axis is driving axis (right) */
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#define T_L_Y_INC 0x00000020 /* left edge direction Y */
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#define T_L_X_INC 0x00000010 /* left edge direction X */
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#define T_R_Y_INC 0x00400000 /* right edge direction Y */
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#define T_R_X_INC 0x00200000 /* right edge direction X */
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/* YUV to RGB blit */
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#define YUV_FORMAT_YUY2 0x00000000
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#define YUV_FORMAT_YVYU 0x00002000
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#define YUV_FORMAT_UYVY 0x00004000
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#define YUV_FORMAT_VYUY 0x00006000
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#define YUV_FORMAT_NV12 0x00008000 /* Only supported one */
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#define YUV_FORMAT_NV21 0x0000A000
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#define YUV_CMD_YUV 0x00800000
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/* Scanline trigger (315 only, not 330) */
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#define SCANLINE_TR_CRT1 0x00000000
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#define SCANLINE_TR_CRT2 0x01000000
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#define SCANLINE_TRIGGER_ENABLE 0x80000000
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/* Some general registers */
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#define SRC_ADDR 0x8200
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#define SRC_PITCH 0x8204
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#define AGP_BASE 0x8206 /* color-depth dependent value */
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#define SRC_Y 0x8208
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#define SRC_X 0x820A
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#define DST_Y 0x820C
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#define DST_X 0x820E
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#define DST_ADDR 0x8210
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#define DST_PITCH 0x8214
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#define DST_HEIGHT 0x8216
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#define RECT_WIDTH 0x8218
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#define RECT_HEIGHT 0x821A
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#define PAT_FGCOLOR 0x821C
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#define PAT_BGCOLOR 0x8220
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#define SRC_FGCOLOR 0x8224
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#define SRC_BGCOLOR 0x8228
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#define MONO_MASK 0x822C
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#define LEFT_CLIP 0x8234
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#define TOP_CLIP 0x8236
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#define RIGHT_CLIP 0x8238
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#define BOTTOM_CLIP 0x823A
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#define COMMAND_READY 0x823C
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#define FIRE_TRIGGER 0x8240
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#define PATTERN_REG 0x8300 /* 384 bytes pattern buffer */
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/* Line registers */
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#define LINE_X0 SRC_Y
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#define LINE_X1 DST_Y
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#define LINE_Y0 SRC_X
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#define LINE_Y1 DST_X
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#define LINE_COUNT RECT_WIDTH
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#define LINE_STYLE_PERIOD RECT_HEIGHT
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#define LINE_STYLE_0 MONO_MASK
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#define LINE_STYLE_1 0x8230
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#define LINE_XN PATTERN_REG
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#define LINE_YN PATTERN_REG+2
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/* Transparent bitblit registers */
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#define TRANS_DST_KEY_HIGH PAT_FGCOLOR
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#define TRANS_DST_KEY_LOW PAT_BGCOLOR
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#define TRANS_SRC_KEY_HIGH SRC_FGCOLOR
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#define TRANS_SRC_KEY_LOW SRC_BGCOLOR
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#define ALPHA_ALPHA PAT_FGCOLOR
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/* Trapezoid registers */
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#define TRAP_YH SRC_Y /* 0x8208 */
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#define TRAP_LR DST_Y /* 0x820C */
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#define TRAP_DL 0x8244
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#define TRAP_DR 0x8248
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#define TRAP_EL 0x824C
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#define TRAP_ER 0x8250
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/* Queue */
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#define Q_BASE_ADDR 0x85C0 /* Base address of software queue */
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#define Q_WRITE_PTR 0x85C4 /* Current write pointer */
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#define Q_READ_PTR 0x85C8 /* Current read pointer */
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#define Q_STATUS 0x85CC /* queue status */
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/* VRAM queue operation command header definitions */
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#define SIS_SPKC_HEADER 0x16800000L
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#define SIS_BURST_HEADER0 0x568A0000L
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#define SIS_BURST_HEADER1 0x62100000L
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#define SIS_PACKET_HEARER0 0x968A0000L
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#define SIS_PACKET_HEADER1 0x62100000L
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#define SIS_NIL_CMD 0x168F0000L
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#define SIS_PACKET12_HEADER0 0x968A000CL
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#define SIS_PACKET12_HEADER1 0x62100010L
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#define SIS_PACKET12_LENGTH 80
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/* Macros to do useful things with the SiS315/330 BitBLT engine */
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/* Q_STATUS:
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bit 31 = 1: All engines idle and all queues empty
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bit 30 = 1: Hardware Queue (=HW CQ, 2D queue, 3D queue) empty
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bit 29 = 1: 2D engine is idle
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bit 28 = 1: 3D engine is idle
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bit 27 = 1: HW command queue empty
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bit 26 = 1: 2D queue empty
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bit 25 = 1: 3D queue empty
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bit 24 = 1: SW command queue empty
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bits 23:16: 2D counter 3
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bits 15:8: 2D counter 2
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bits 7:0: 2D counter 1
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*/
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/* As sis_dri.c and dual head mode relocate the cmd-q len to the sarea/entity,
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* don't use it directly here */
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#define CmdQueLen (*(pSiS->cmdQueueLenPtr))
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#define SiSQEmpty \
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{ \
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while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x0400) != 0x0400) {}; \
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while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x0400) != 0x0400) {}; \
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}
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#define SiSResetCmd pSiS->CommandReg = 0;
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#define SiSSetupCMDFlag(flags) pSiS->CommandReg |= (flags);
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/* --- VRAM mode --- */
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#define SiSGetSwWP() (CARD32)(*(pSiS->cmdQ_SharedWritePort))
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#define SiSGetHwRP() (CARD32)(SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR))
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#define SiSFlushCmdBuf \
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if(pSiS->NeedFlush) { \
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CARD32 ttt = ((SiSGetSwWP()) - 4) & pSiS->cmdQueueSizeMask; \
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pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
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dummybuf = SIS_RQINDEX(0); \
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}
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#define SiSSyncWP \
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SiSFlushCmdBuf; \
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SIS_MMIO_OUT32(pSiS->IOBase, Q_WRITE_PTR, (CARD32)(*(pSiS->cmdQ_SharedWritePort)));
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#define SiSSetHwWP(p) \
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*(pSiS->cmdQ_SharedWritePort) = (p); \
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SIS_MMIO_OUT32(pSiS->IOBase, Q_WRITE_PTR, (p));
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#define SiSSetSwWP(p) *(pSiS->cmdQ_SharedWritePort) = (p);
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#define SiSCheckQueue(amount)
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#if 0
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{ \
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CARD32 mcurrent, i=0, ttt = SiSGetSwWP(); \
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if((ttt + amount) >= pSiS->cmdQueueSize) { \
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do { \
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mcurrent = SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR); \
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i++; \
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} while((mcurrent > ttt) || (mcurrent < ((ttt + amount) & pSiS->cmdQueueSizeMask))); \
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} else { \
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do { \
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mcurrent = SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR); \
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i++; \
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} while((mcurrent > ttt) && (mcurrent < (ttt + amount))); \
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} \
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}
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#endif
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#define SiSUpdateQueue \
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SiSWriteQueue(tt); \
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ttt += 16; \
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ttt &= pSiS->cmdQueueSizeMask; \
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if(!ttt) { \
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while(SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR) < pSiS->cmdQueueSize_div4) {} \
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} else if(ttt == pSiS->cmdQueueSize_div4) { \
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CARD32 temppp; \
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do { \
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temppp = SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR); \
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} while(temppp >= ttt && temppp <= pSiS->cmdQueueSize_div2); \
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} else if(ttt == pSiS->cmdQueueSize_div2) { \
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CARD32 temppp; \
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do { \
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temppp = SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR); \
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} while(temppp >= ttt && temppp <= pSiS->cmdQueueSize_4_3); \
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} else if(ttt == pSiS->cmdQueueSize_4_3) { \
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while(SIS_MMIO_IN32(pSiS->IOBase, Q_READ_PTR) > ttt) {} \
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}
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/* Write-updates MUST be 128bit aligned. */
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#define SiSNILandUpdateSWQueue \
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SIS_WQINDEX(2) = (CARD32)(SIS_NIL_CMD); \
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SIS_WQINDEX(3) = (CARD32)(SIS_NIL_CMD); \
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SiSUpdateQueue; \
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SiSSetSwWP(ttt);
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#ifdef SISVRAMQ
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#define SiSIdle \
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{ \
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while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000) {}; \
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while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000) {}; \
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while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000) {}; \
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while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000) {}; \
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}
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#define SiSSetupSRCDSTBase(srcbase,dstbase) \
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{ \
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CARD32 ttt = SiSGetSwWP(); \
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pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
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SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + SRC_ADDR); \
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SIS_WQINDEX(1) = (CARD32)(srcbase); \
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SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + DST_ADDR); \
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SIS_WQINDEX(3) = (CARD32)(dstbase); \
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SiSUpdateQueue \
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SiSSetSwWP(ttt); \
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}
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#define SiSSetupSRCDSTXY(sx,sy,dx,dy) \
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{ \
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CARD32 ttt = SiSGetSwWP(); \
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pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
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SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + SRC_Y); \
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SIS_WQINDEX(1) = (CARD32)(((sx)<<16) | (sy)); \
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SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + DST_Y); \
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SIS_WQINDEX(3) = (CARD32)(((dx)<<16) | (dy)); \
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SiSUpdateQueue \
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SiSSetSwWP(ttt); \
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}
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#define SiSSetupDSTXYRect(x,y,w,h) \
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{ \
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CARD32 ttt = SiSGetSwWP(); \
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pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
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SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + DST_Y); \
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SIS_WQINDEX(1) = (CARD32)(((x)<<16) | (y)); \
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SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + RECT_WIDTH); \
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SIS_WQINDEX(3) = (CARD32)(((h)<<16) | (w)); \
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SiSUpdateQueue \
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SiSSetSwWP(ttt); \
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}
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#define SiSSetupSRCPitchDSTRect(pitch,x,y) \
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{ \
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CARD32 ttt = SiSGetSwWP(); \
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pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
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SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + SRC_PITCH); \
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SIS_WQINDEX(1) = (CARD32)(pitch); \
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SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + DST_PITCH); \
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SIS_WQINDEX(3) = (CARD32)(((y)<<16) | (x)); \
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SiSUpdateQueue \
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SiSSetSwWP(ttt); \
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}
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#define SiSSetupSRCBase(base) \
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{ \
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CARD32 ttt = SiSGetSwWP(); \
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pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
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SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + SRC_ADDR); \
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SIS_WQINDEX(1) = (CARD32)(base); \
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SiSNILandUpdateSWQueue \
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}
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#define SiSSetupSRCPitch(pitch) \
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{ \
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CARD32 ttt = SiSGetSwWP(); \
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pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
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SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + SRC_PITCH); \
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SIS_WQINDEX(1) = (CARD32)(pitch); \
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SiSNILandUpdateSWQueue \
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}
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#define SiSSetupSRCXY(x,y) \
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{ \
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CARD32 ttt = SiSGetSwWP(); \
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pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
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SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + SRC_Y); \
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SIS_WQINDEX(1) = (CARD32)(((x)<<16) | (y)); \
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SiSNILandUpdateSWQueue \
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}
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#define SiSSetupDSTBase(base) \
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{ \
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CARD32 ttt = SiSGetSwWP(); \
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pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
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SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + DST_ADDR); \
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SIS_WQINDEX(1) = (CARD32)(base); \
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SiSNILandUpdateSWQueue \
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}
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#define SiSSetupDSTXY(x,y) \
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{ \
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CARD32 ttt = SiSGetSwWP(); \
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pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
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SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + DST_Y); \
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SIS_WQINDEX(1) = (CARD32)(((x)<<16) | (y)); \
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SiSNILandUpdateSWQueue \
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}
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#define SiSSetupDSTRect(x,y) \
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{ \
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CARD32 ttt = SiSGetSwWP(); \
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pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
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SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + DST_PITCH); \
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SIS_WQINDEX(1) = (CARD32)(((y)<<16) | (x)); \
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SiSNILandUpdateSWQueue \
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}
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#define SiSSetupDSTRectBurstHeader(x,y,reg,num) \
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{ \
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CARD32 ttt = SiSGetSwWP(); \
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pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
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SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + DST_PITCH); \
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SIS_WQINDEX(1) = (CARD32)(((y)<<16) | (x)); \
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SIS_WQINDEX(2) = (CARD32)(SIS_BURST_HEADER0 + reg); \
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SIS_WQINDEX(3) = (CARD32)(SIS_BURST_HEADER1 + num); \
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SiSUpdateQueue \
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SiSSetSwWP(ttt); \
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}
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#define SiSSetupDSTColorDepth(bpp) \
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pSiS->CommandReg = (((CARD32)(bpp)) & (GENMASK(17:16)));
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#define SiSSetupPATFGDSTRect(color,x,y) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + PAT_FGCOLOR); \
|
|
SIS_WQINDEX(1) = (CARD32)(color); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + DST_PITCH); \
|
|
SIS_WQINDEX(3) = (CARD32)(((y)<<16) | (x)); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
#define SiSSetupSRCFGDSTRect(color,x,y) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + SRC_FGCOLOR); \
|
|
SIS_WQINDEX(1) = (CARD32)(color); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + DST_PITCH); \
|
|
SIS_WQINDEX(3) = (CARD32)(((y)<<16) | (x)); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
#define SiSSetupRectSRCPitch(w,h,pitch) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + RECT_WIDTH); \
|
|
SIS_WQINDEX(1) = (CARD32)(((h)<<16) | (w)); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + SRC_PITCH); \
|
|
SIS_WQINDEX(3) = (CARD32)(pitch); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
#define SiSSetupRect(w,h) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + RECT_WIDTH); \
|
|
SIS_WQINDEX(1) = (CARD32)(((h)<<16) | (w)); \
|
|
SiSNILandUpdateSWQueue \
|
|
}
|
|
|
|
#define SiSSetupPATFG(color) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + PAT_FGCOLOR); \
|
|
SIS_WQINDEX(1) = (CARD32)(color); \
|
|
SiSNILandUpdateSWQueue \
|
|
}
|
|
|
|
#define SiSSetupPATBG(color) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + PAT_BGCOLOR); \
|
|
SIS_WQINDEX(1) = (CARD32)(color); \
|
|
SiSNILandUpdateSWQueue \
|
|
}
|
|
|
|
#define SiSSetupSRCFG(color) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + SRC_FGCOLOR); \
|
|
SIS_WQINDEX(1) = (CARD32)(color); \
|
|
SiSNILandUpdateSWQueue \
|
|
}
|
|
|
|
#define SiSSetupSRCBG(color) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + SRC_BGCOLOR); \
|
|
SIS_WQINDEX(1) = (CARD32)(color); \
|
|
SiSNILandUpdateSWQueue \
|
|
}
|
|
|
|
#define SiSSetupSRCTrans(color) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + TRANS_SRC_KEY_HIGH); \
|
|
SIS_WQINDEX(1) = (CARD32)(color); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + TRANS_SRC_KEY_LOW); \
|
|
SIS_WQINDEX(3) = (CARD32)(color); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
#define SiSSetupDSTTrans(color) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + TRANS_DST_KEY_HIGH); \
|
|
SIS_WQINDEX(1) = (CARD32)(color); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + TRANS_DST_KEY_LOW); \
|
|
SIS_WQINDEX(3) = (CARD32)(color); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
#define SiSSetupMONOPAT(p0,p1) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + MONO_MASK); \
|
|
SIS_WQINDEX(1) = (CARD32)(p0); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + MONO_MASK + 4); \
|
|
SIS_WQINDEX(3) = (CARD32)(p1); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
#define SiSSetupClip(left,top,right,bottom) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + LEFT_CLIP); \
|
|
SIS_WQINDEX(1) = (CARD32)(((left) & 0xFFFF) | ((top)<<16)); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + RIGHT_CLIP); \
|
|
SIS_WQINDEX(3) = (CARD32)(((right) & 0xFFFF)|((bottom)<<16)); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
#define SiSSetupDSTBaseDoCMD(base) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + DST_ADDR); \
|
|
SIS_WQINDEX(1) = (CARD32)(base); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + COMMAND_READY); \
|
|
SIS_WQINDEX(3) = (CARD32)(pSiS->CommandReg); \
|
|
if(pSiS->NeedFlush) dummybuf = SIS_RQINDEX(3); \
|
|
SiSUpdateQueue \
|
|
SiSSetHwWP(ttt); \
|
|
}
|
|
|
|
#define SiSSetRectDoCMD(w,h) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + RECT_WIDTH); \
|
|
SIS_WQINDEX(1) = (CARD32)(((h)<<16) | (w)); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + COMMAND_READY); \
|
|
SIS_WQINDEX(3) = (CARD32)(pSiS->CommandReg); \
|
|
if(pSiS->NeedFlush) dummybuf = SIS_RQINDEX(3); \
|
|
SiSUpdateQueue \
|
|
SiSSetHwWP(ttt); \
|
|
}
|
|
|
|
#define SiSSetupROP(rop) \
|
|
pSiS->CommandReg |= (rop) << 8;
|
|
|
|
#define SiSDoCMD \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + COMMAND_READY); \
|
|
SIS_WQINDEX(1) = (CARD32)(pSiS->CommandReg); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_NIL_CMD); \
|
|
SIS_WQINDEX(3) = (CARD32)(SIS_NIL_CMD); \
|
|
if(pSiS->NeedFlush) dummybuf = SIS_RQINDEX(3); \
|
|
SiSUpdateQueue \
|
|
SiSSetHwWP(ttt); \
|
|
}
|
|
|
|
#define SiSDualPipe(disable) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
CARD32 _tmp = SIS_MMIO_IN32(pSiS->IOBase, FIRE_TRIGGER) & ~(1 << 10); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + FIRE_TRIGGER); \
|
|
SIS_WQINDEX(1) = (CARD32)(_tmp | ((disable & 1) << 10)); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_NIL_CMD); \
|
|
SIS_WQINDEX(3) = (CARD32)(SIS_NIL_CMD); \
|
|
if(pSiS->NeedFlush) dummybuf = SIS_RQINDEX(3); \
|
|
SiSUpdateQueue \
|
|
SiSSetHwWP(ttt); \
|
|
}
|
|
|
|
/* Line */
|
|
|
|
#define SiSSetupX0Y0X1Y1(x1,y1,x2,y2) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + LINE_X0); \
|
|
SIS_WQINDEX(1) = (CARD32)(((y1)<<16) | (x1)); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + LINE_X1); \
|
|
SIS_WQINDEX(3) = (CARD32)(((y2)<<16) | (x2)); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
#define SiSSetupX0Y0(x,y) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + LINE_X0); \
|
|
SIS_WQINDEX(1) = (CARD32)(((y)<<16) | (x)); \
|
|
SiSNILandUpdateSWQueue \
|
|
}
|
|
|
|
#define SiSSetupX1Y1(x,y) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + LINE_X1); \
|
|
SIS_WQINDEX(1) = (CARD32)(((y)<<16) | (x)); \
|
|
SiSNILandUpdateSWQueue \
|
|
}
|
|
|
|
#define SiSSetupLineCountPeriod(c, p) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + LINE_COUNT); \
|
|
SIS_WQINDEX(1) = (CARD32)(((p) << 16) | (c)); \
|
|
SiSNILandUpdateSWQueue \
|
|
}
|
|
|
|
#define SiSSetupStyle(ls,hs) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + LINE_STYLE_0); \
|
|
SIS_WQINDEX(1) = (CARD32)(ls); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + LINE_STYLE_1); \
|
|
SIS_WQINDEX(3) = (CARD32)(hs); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
/* Trapezoid */
|
|
|
|
#define SiSSetupYHLR(y,h,left,right) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + TRAP_YH); \
|
|
SIS_WQINDEX(1) = (CARD32)(((y)<<16) | (h)); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + TRAP_LR); \
|
|
SIS_WQINDEX(3) = (CARD32)(((right)<<16) | (left)); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
|
|
#define SiSSetupdLdR(dxL,dyL,fxR,dyR) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + TRAP_DL); \
|
|
SIS_WQINDEX(1) = (CARD32)(((dyL)<<16) | (dxL)); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + TRAP_DR); \
|
|
SIS_WQINDEX(3) = (CARD32)(((dyR)<<16) | (dxR)); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
#define SiSSetupELER(eL,eR) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + TRAP_EL); \
|
|
SIS_WQINDEX(1) = (CARD32)(eL); \
|
|
SIS_WQINDEX(2) = (CARD32)(SIS_SPKC_HEADER + TRAP_ER); \
|
|
SIS_WQINDEX(3) = (CARD32)(eR); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
/* (Constant) Alpha blended BitBlt (alpha = 8 bit) */
|
|
|
|
#define SiSSetupAlpha(alpha) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + ALPHA_ALPHA); \
|
|
SIS_WQINDEX(1) = (CARD32)(alpha); \
|
|
SiSNILandUpdateSWQueue \
|
|
}
|
|
|
|
#define SiSSetPattern(num, value) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(SIS_SPKC_HEADER + (PATTERN_REG + (num * 4))); \
|
|
SIS_WQINDEX(1) = (CARD32)(value); \
|
|
SiSNILandUpdateSWQueue \
|
|
}
|
|
|
|
#define SiSSetupPatternRegBurst(pat1, pat2, pat3, pat4) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(pat1); \
|
|
SIS_WQINDEX(1) = (CARD32)(pat2); \
|
|
SIS_WQINDEX(2) = (CARD32)(pat3); \
|
|
SIS_WQINDEX(3) = (CARD32)(pat4); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
typedef struct _SiS_Packet12_YUV {
|
|
CARD32 P12_Header0;
|
|
CARD32 P12_Header1;
|
|
CARD16 P12_UVPitch; /* 8200 UV if planar, Y if packed */
|
|
CARD16 P12_Unused0; /* 8202 */
|
|
CARD16 P12_YPitch; /* 8204 Y if planar */
|
|
CARD16 P12_AGPBase; /* 8206 */
|
|
CARD16 P12_Unused1; /* 8208 */
|
|
CARD16 P12_Unused2; /* 820a */
|
|
CARD16 P12_DstY; /* 820c */
|
|
CARD16 P12_DstX; /* 820e */
|
|
CARD32 P12_DstAddr; /* 8210 */
|
|
CARD16 P12_DstPitch; /* 8214 */
|
|
CARD16 P12_DstHeight; /* 8216 */
|
|
CARD16 P12_RectWidth; /* 8218 */
|
|
CARD16 P12_RectHeight; /* 821a */
|
|
CARD32 P12_Unused3; /* 821c */
|
|
CARD32 P12_Unused4; /* 8220 */
|
|
CARD32 P12_UVSrcAddr; /* 8224 UV if planar, Y if packed */
|
|
CARD32 P12_YSrcAddr; /* 8228 Y if planar */
|
|
CARD32 P12_Unused5; /* 822c */
|
|
CARD32 P12_Unused6; /* 8230 */
|
|
CARD16 P12_ClipLeft; /* 8234 */
|
|
CARD16 P12_ClipTop; /* 8236 */
|
|
CARD16 P12_ClipRight; /* 8238 */
|
|
CARD16 P12_ClipBottom; /* 823a */
|
|
CARD32 P12_Command; /* 823c */
|
|
CARD32 P12_Null1;
|
|
CARD32 P12_Null2;
|
|
} SiS_Packet12_YUV;
|
|
|
|
#define SiSWritePacketPart(part1, part2, part3, part4) \
|
|
{ \
|
|
CARD32 ttt = SiSGetSwWP(); \
|
|
pointer tt = (char *)pSiS->cmdQueueBase + ttt; \
|
|
SIS_WQINDEX(0) = (CARD32)(part1); \
|
|
SIS_WQINDEX(1) = (CARD32)(part2); \
|
|
SIS_WQINDEX(2) = (CARD32)(part3); \
|
|
SIS_WQINDEX(3) = (CARD32)(part4); \
|
|
SiSUpdateQueue \
|
|
SiSSetSwWP(ttt); \
|
|
}
|
|
|
|
#endif /* VRAM mode */
|
|
|
|
/* ---- MMIO mode ---- */
|
|
|
|
#ifndef SISVRAMQ
|
|
|
|
/* We assume a length of 4 bytes per command; since 512K of
|
|
* of RAM are allocated, the number of commands is easily
|
|
* calculated (and written to the address pointed to by
|
|
* CmdQueueLenPtr, since sis_dri.c relocates this)
|
|
* UPDATE: using the command queue without syncing totally
|
|
* (ie assuming a QueueLength of 0) decreases system latency
|
|
* dramatically on the integrated chipsets (sound gets interrupted,
|
|
* etc.). We now sync every time... this is a little slower,
|
|
* but it keeps the rest of the box somewhat alive.
|
|
* This was the reason for switching to VRAM queue mode.
|
|
*/
|
|
#define SiSIdle \
|
|
{ \
|
|
if(pSiS->ChipFlags & SiSCF_Integrated) { \
|
|
CmdQueLen = 0; \
|
|
} else { \
|
|
CmdQueLen = ((512 * 1024) / 4) - 64; \
|
|
} \
|
|
while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000) {}; \
|
|
while( (SIS_MMIO_IN16(pSiS->IOBase, Q_STATUS+2) & 0x8000) != 0x8000) {}; \
|
|
}
|
|
|
|
#define SiSSetupSRCBase(base) \
|
|
if (CmdQueLen <= 0) SiSIdle; \
|
|
SIS_MMIO_OUT32(pSiS->IOBase, SRC_ADDR, base); \
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupSRCPitch(pitch) \
|
|
if (CmdQueLen <= 0) SiSIdle; \
|
|
SIS_MMIO_OUT16(pSiS->IOBase, SRC_PITCH, pitch); \
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupSRCXY(x,y) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, SRC_Y, (x)<<16 | (y) );\
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CmdQueLen--;
|
|
|
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#define SiSSetupDSTBase(base) \
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if (CmdQueLen <= 0) SiSIdle;\
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SIS_MMIO_OUT32(pSiS->IOBase, DST_ADDR, base);\
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|
CmdQueLen--;
|
|
|
|
#define SiSSetupDSTXY(x,y) \
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if (CmdQueLen <= 0) SiSIdle;\
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SIS_MMIO_OUT32(pSiS->IOBase, DST_Y, (x)<<16 | (y) );\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupDSTRect(x,y) \
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|
if (CmdQueLen <= 0) SiSIdle;\
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SIS_MMIO_OUT32(pSiS->IOBase, DST_PITCH, (y)<<16 | (x) );\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupDSTColorDepth(bpp) \
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|
if (CmdQueLen <= 0) SiSIdle;\
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|
SIS_MMIO_OUT16(pSiS->IOBase, AGP_BASE, bpp);\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupRect(w,h) \
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if(CmdQueLen <= 0) SiSIdle;\
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|
SIS_MMIO_OUT32(pSiS->IOBase, RECT_WIDTH, (h)<<16 | (w) );\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupPATFG(color) \
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|
if(CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, PAT_FGCOLOR, color);\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupPATBG(color) \
|
|
if(CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, PAT_BGCOLOR, color);\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupSRCFG(color) \
|
|
if(CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, SRC_FGCOLOR, color);\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupSRCBG(color) \
|
|
if(CmdQueLen <= 0) SiSIdle; \
|
|
SIS_MMIO_OUT32(pSiS->IOBase, SRC_BGCOLOR, color); \
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupSRCTrans(color) \
|
|
if(CmdQueLen <= 1) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, TRANS_SRC_KEY_HIGH, color);\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, TRANS_SRC_KEY_LOW, color);\
|
|
CmdQueLen -= 2;
|
|
|
|
#define SiSSetupDSTTrans(color) \
|
|
if(CmdQueLen <= 1) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, TRANS_DST_KEY_HIGH, color); \
|
|
SIS_MMIO_OUT32(pSiS->IOBase, TRANS_DST_KEY_LOW, color); \
|
|
CmdQueLen -= 2;
|
|
|
|
#define SiSSetupMONOPAT(p0,p1) \
|
|
if(CmdQueLen <= 1) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, MONO_MASK, p0);\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, MONO_MASK+4, p1);\
|
|
CmdQueLen=CmdQueLen-2;
|
|
|
|
#define SiSSetupClipLT(left,top) \
|
|
if(CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, LEFT_CLIP, ((left) & 0xFFFF) | (top)<<16); \
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupClipRB(right,bottom) \
|
|
if(CmdQueLen <= 0) SiSIdle; \
|
|
SIS_MMIO_OUT32(pSiS->IOBase, RIGHT_CLIP, ((right) & 0xFFFF) | (bottom)<<16); \
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupROP(rop) \
|
|
pSiS->CommandReg = (rop) << 8;
|
|
|
|
#define SiSDoCMD \
|
|
if (CmdQueLen <= 1) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, COMMAND_READY, pSiS->CommandReg); \
|
|
SIS_MMIO_OUT32(pSiS->IOBase, FIRE_TRIGGER, 0); \
|
|
CmdQueLen -= 2;
|
|
|
|
/* Line */
|
|
|
|
#define SiSSetupX0Y0(x,y) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, LINE_X0, (y)<<16 | (x) );\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupX1Y1(x,y) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, LINE_X1, (y)<<16 | (x) );\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupLineCount(c) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT16(pSiS->IOBase, LINE_COUNT, c);\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupStylePeriod(p) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT16(pSiS->IOBase, LINE_STYLE_PERIOD, p);\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupStyleLow(ls) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, LINE_STYLE_0, ls);\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupStyleHigh(ls) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, LINE_STYLE_1, ls);\
|
|
CmdQueLen--;
|
|
|
|
/* Trapezoid */
|
|
|
|
#define SiSSetupYH(y,h) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, TRAP_YH, (y)<<16 | (h) );\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupLR(left,right) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, TRAP_LR, (right)<<16 | (left) );\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupdL(dxL,dyL) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, TRAP_DL, (dyL)<<16 | (dxL) );\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupdR(dxR,dyR) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, TRAP_DR, (dyR)<<16 | (dxR) );\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupEL(eL) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, TRAP_EL, eL);\
|
|
CmdQueLen--;
|
|
|
|
#define SiSSetupER(eR) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, TRAP_ER, eR);\
|
|
CmdQueLen--;
|
|
|
|
/* (Constant) alpha blended BitBlt (alpha = 8 bit) */
|
|
|
|
#define SiSSetupAlpha(alpha) \
|
|
if (CmdQueLen <= 0) SiSIdle;\
|
|
SIS_MMIO_OUT32(pSiS->IOBase, ALPHA_ALPHA, alpha);\
|
|
CmdQueLen--;
|
|
|
|
/* Set Pattern register */
|
|
|
|
#define SiSSetPattern(num, value) \
|
|
if (CmdQueLen <= 0) SiSIdle; \
|
|
SIS_MMIO_OUT32(pSiS->IOBase, (PATTERN_REG + (num * 4)), value); \
|
|
CmdQueLen--;
|
|
|
|
#endif /* MMIO mode */
|
|
|