557 lines
17 KiB
C
557 lines
17 KiB
C
/*
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* Copyright © 2008 Jérôme Glisse
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
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* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*/
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/*
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* Authors:
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* Aapo Tahkola <aet@rasterburn.org>
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* Nicolai Haehnle <prefect_@gmx.net>
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* Jérôme Glisse <glisse@freedesktop.org>
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*/
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#include <assert.h>
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#include <errno.h>
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#include <stdlib.h>
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#include <string.h>
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#include <pthread.h>
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#include <sys/ioctl.h>
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#include "radeon_cs.h"
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#include "radeon_cs_int.h"
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#include "radeon_bo_int.h"
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#include "radeon_cs_gem.h"
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#include "radeon_bo_gem.h"
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#include "drm.h"
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#include "libdrm_macros.h"
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#include "xf86drm.h"
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#include "xf86atomic.h"
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#include "radeon_drm.h"
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/* Add LIBDRM_RADEON_BOF_FILES to libdrm_radeon_la_SOURCES when building with BOF_DUMP */
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#define CS_BOF_DUMP 0
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#if CS_BOF_DUMP
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#include "bof.h"
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#endif
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struct radeon_cs_manager_gem {
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struct radeon_cs_manager base;
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uint32_t device_id;
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unsigned nbof;
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};
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#pragma pack(1)
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struct cs_reloc_gem {
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uint32_t handle;
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uint32_t read_domain;
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uint32_t write_domain;
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uint32_t flags;
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};
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#pragma pack()
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#define RELOC_SIZE (sizeof(struct cs_reloc_gem) / sizeof(uint32_t))
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struct cs_gem {
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struct radeon_cs_int base;
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struct drm_radeon_cs cs;
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struct drm_radeon_cs_chunk chunks[2];
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unsigned nrelocs;
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uint32_t *relocs;
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struct radeon_bo_int **relocs_bo;
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};
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static pthread_mutex_t id_mutex = PTHREAD_MUTEX_INITIALIZER;
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static uint32_t cs_id_source = 0;
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/**
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* result is undefined if called with ~0
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*/
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static uint32_t get_first_zero(const uint32_t n)
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{
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/* __builtin_ctz returns number of trailing zeros. */
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return 1 << __builtin_ctz(~n);
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}
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/**
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* Returns a free id for cs.
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* If there is no free id we return zero
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**/
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static uint32_t generate_id(void)
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{
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uint32_t r = 0;
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pthread_mutex_lock( &id_mutex );
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/* check for free ids */
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if (cs_id_source != ~r) {
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/* find first zero bit */
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r = get_first_zero(cs_id_source);
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/* set id as reserved */
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cs_id_source |= r;
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}
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pthread_mutex_unlock( &id_mutex );
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return r;
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}
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/**
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* Free the id for later reuse
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**/
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static void free_id(uint32_t id)
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{
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pthread_mutex_lock( &id_mutex );
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cs_id_source &= ~id;
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pthread_mutex_unlock( &id_mutex );
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}
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static struct radeon_cs_int *cs_gem_create(struct radeon_cs_manager *csm,
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uint32_t ndw)
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{
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struct cs_gem *csg;
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/* max cmd buffer size is 64Kb */
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if (ndw > (64 * 1024 / 4)) {
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return NULL;
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}
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csg = (struct cs_gem*)calloc(1, sizeof(struct cs_gem));
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if (csg == NULL) {
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return NULL;
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}
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csg->base.csm = csm;
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csg->base.ndw = 64 * 1024 / 4;
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csg->base.packets = (uint32_t*)calloc(1, 64 * 1024);
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if (csg->base.packets == NULL) {
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free(csg);
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return NULL;
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}
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csg->base.relocs_total_size = 0;
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csg->base.crelocs = 0;
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csg->base.id = generate_id();
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csg->nrelocs = 4096 / (4 * 4) ;
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csg->relocs_bo = (struct radeon_bo_int**)calloc(1,
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csg->nrelocs*sizeof(void*));
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if (csg->relocs_bo == NULL) {
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free(csg->base.packets);
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free(csg);
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return NULL;
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}
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csg->base.relocs = csg->relocs = (uint32_t*)calloc(1, 4096);
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if (csg->relocs == NULL) {
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free(csg->relocs_bo);
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free(csg->base.packets);
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free(csg);
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return NULL;
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}
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csg->chunks[0].chunk_id = RADEON_CHUNK_ID_IB;
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csg->chunks[0].length_dw = 0;
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csg->chunks[0].chunk_data = (uint64_t)(uintptr_t)csg->base.packets;
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csg->chunks[1].chunk_id = RADEON_CHUNK_ID_RELOCS;
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csg->chunks[1].length_dw = 0;
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csg->chunks[1].chunk_data = (uint64_t)(uintptr_t)csg->relocs;
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return (struct radeon_cs_int*)csg;
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}
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static int cs_gem_write_reloc(struct radeon_cs_int *cs,
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struct radeon_bo *bo,
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uint32_t read_domain,
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uint32_t write_domain,
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uint32_t flags)
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{
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struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
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struct cs_gem *csg = (struct cs_gem*)cs;
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struct cs_reloc_gem *reloc;
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uint32_t idx;
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unsigned i;
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assert(boi->space_accounted);
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/* check domains */
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if ((read_domain && write_domain) || (!read_domain && !write_domain)) {
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/* in one CS a bo can only be in read or write domain but not
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* in read & write domain at the same time
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*/
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return -EINVAL;
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}
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if (read_domain == RADEON_GEM_DOMAIN_CPU) {
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return -EINVAL;
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}
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if (write_domain == RADEON_GEM_DOMAIN_CPU) {
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return -EINVAL;
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}
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/* use bit field hash function to determine
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if this bo is for sure not in this cs.*/
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if ((atomic_read((atomic_t *)radeon_gem_get_reloc_in_cs(bo)) & cs->id)) {
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/* check if bo is already referenced.
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* Scanning from end to begin reduces cycles with mesa because
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* it often relocates same shared dma bo again. */
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for(i = cs->crelocs; i != 0;) {
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--i;
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idx = i * RELOC_SIZE;
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reloc = (struct cs_reloc_gem*)&csg->relocs[idx];
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if (reloc->handle == bo->handle) {
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/* Check domains must be in read or write. As we check already
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* checked that in argument one of the read or write domain was
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* set we only need to check that if previous reloc as the read
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* domain set then the read_domain should also be set for this
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* new relocation.
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*/
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/* the DDX expects to read and write from same pixmap */
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if (write_domain && (reloc->read_domain & write_domain)) {
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reloc->read_domain = 0;
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reloc->write_domain = write_domain;
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} else if (read_domain & reloc->write_domain) {
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reloc->read_domain = 0;
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} else {
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if (write_domain != reloc->write_domain)
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return -EINVAL;
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if (read_domain != reloc->read_domain)
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return -EINVAL;
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}
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reloc->read_domain |= read_domain;
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reloc->write_domain |= write_domain;
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/* update flags */
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reloc->flags |= (flags & reloc->flags);
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/* write relocation packet */
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radeon_cs_write_dword((struct radeon_cs *)cs, 0xc0001000);
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radeon_cs_write_dword((struct radeon_cs *)cs, idx);
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return 0;
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}
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}
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}
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/* new relocation */
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if (csg->base.crelocs >= csg->nrelocs) {
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/* allocate more memory (TODO: should use a slab allocator maybe) */
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uint32_t *tmp, size;
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size = ((csg->nrelocs + 1) * sizeof(struct radeon_bo*));
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tmp = (uint32_t*)realloc(csg->relocs_bo, size);
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if (tmp == NULL) {
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return -ENOMEM;
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}
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csg->relocs_bo = (struct radeon_bo_int **)tmp;
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size = ((csg->nrelocs + 1) * RELOC_SIZE * 4);
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tmp = (uint32_t*)realloc(csg->relocs, size);
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if (tmp == NULL) {
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return -ENOMEM;
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}
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cs->relocs = csg->relocs = tmp;
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csg->nrelocs += 1;
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csg->chunks[1].chunk_data = (uint64_t)(uintptr_t)csg->relocs;
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}
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csg->relocs_bo[csg->base.crelocs] = boi;
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idx = (csg->base.crelocs++) * RELOC_SIZE;
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reloc = (struct cs_reloc_gem*)&csg->relocs[idx];
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reloc->handle = bo->handle;
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reloc->read_domain = read_domain;
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reloc->write_domain = write_domain;
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reloc->flags = flags;
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csg->chunks[1].length_dw += RELOC_SIZE;
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radeon_bo_ref(bo);
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/* bo might be referenced from another context so have to use atomic operations */
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atomic_add((atomic_t *)radeon_gem_get_reloc_in_cs(bo), cs->id);
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cs->relocs_total_size += boi->size;
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radeon_cs_write_dword((struct radeon_cs *)cs, 0xc0001000);
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radeon_cs_write_dword((struct radeon_cs *)cs, idx);
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return 0;
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}
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static int cs_gem_begin(struct radeon_cs_int *cs,
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uint32_t ndw,
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const char *file,
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const char *func,
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int line)
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{
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if (cs->section_ndw) {
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fprintf(stderr, "CS already in a section(%s,%s,%d)\n",
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cs->section_file, cs->section_func, cs->section_line);
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fprintf(stderr, "CS can't start section(%s,%s,%d)\n",
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file, func, line);
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return -EPIPE;
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}
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cs->section_ndw = ndw;
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cs->section_cdw = 0;
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cs->section_file = file;
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cs->section_func = func;
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cs->section_line = line;
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if (cs->cdw + ndw > cs->ndw) {
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uint32_t tmp, *ptr;
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/* round up the required size to a multiple of 1024 */
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tmp = (cs->cdw + ndw + 0x3FF) & (~0x3FF);
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ptr = (uint32_t*)realloc(cs->packets, 4 * tmp);
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if (ptr == NULL) {
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return -ENOMEM;
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}
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cs->packets = ptr;
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cs->ndw = tmp;
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}
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return 0;
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}
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static int cs_gem_end(struct radeon_cs_int *cs,
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const char *file,
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const char *func,
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int line)
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{
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if (!cs->section_ndw) {
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fprintf(stderr, "CS no section to end at (%s,%s,%d)\n",
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file, func, line);
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return -EPIPE;
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}
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if (cs->section_ndw != cs->section_cdw) {
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fprintf(stderr, "CS section size mismatch start at (%s,%s,%d) %d vs %d\n",
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cs->section_file, cs->section_func, cs->section_line, cs->section_ndw, cs->section_cdw);
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fprintf(stderr, "CS section end at (%s,%s,%d)\n",
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file, func, line);
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/* We must reset the section even when there is error. */
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cs->section_ndw = 0;
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return -EPIPE;
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}
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cs->section_ndw = 0;
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return 0;
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}
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#if CS_BOF_DUMP
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static void cs_gem_dump_bof(struct radeon_cs_int *cs)
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{
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struct cs_gem *csg = (struct cs_gem*)cs;
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struct radeon_cs_manager_gem *csm;
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bof_t *bcs, *blob, *array, *bo, *size, *handle, *device_id, *root;
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char tmp[256];
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unsigned i;
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csm = (struct radeon_cs_manager_gem *)cs->csm;
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root = device_id = bcs = blob = array = bo = size = handle = NULL;
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root = bof_object();
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if (root == NULL)
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goto out_err;
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device_id = bof_int32(csm->device_id);
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if (device_id == NULL)
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return;
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if (bof_object_set(root, "device_id", device_id))
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goto out_err;
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bof_decref(device_id);
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device_id = NULL;
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/* dump relocs */
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blob = bof_blob(csg->nrelocs * 16, csg->relocs);
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if (blob == NULL)
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goto out_err;
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if (bof_object_set(root, "reloc", blob))
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goto out_err;
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bof_decref(blob);
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blob = NULL;
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/* dump cs */
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blob = bof_blob(cs->cdw * 4, cs->packets);
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if (blob == NULL)
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goto out_err;
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if (bof_object_set(root, "pm4", blob))
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goto out_err;
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bof_decref(blob);
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blob = NULL;
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/* dump bo */
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array = bof_array();
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if (array == NULL)
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goto out_err;
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for (i = 0; i < csg->base.crelocs; i++) {
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bo = bof_object();
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if (bo == NULL)
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goto out_err;
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size = bof_int32(csg->relocs_bo[i]->size);
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if (size == NULL)
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goto out_err;
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if (bof_object_set(bo, "size", size))
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goto out_err;
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bof_decref(size);
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size = NULL;
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handle = bof_int32(csg->relocs_bo[i]->handle);
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if (handle == NULL)
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goto out_err;
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if (bof_object_set(bo, "handle", handle))
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goto out_err;
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bof_decref(handle);
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handle = NULL;
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radeon_bo_map((struct radeon_bo*)csg->relocs_bo[i], 0);
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blob = bof_blob(csg->relocs_bo[i]->size, csg->relocs_bo[i]->ptr);
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radeon_bo_unmap((struct radeon_bo*)csg->relocs_bo[i]);
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if (blob == NULL)
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goto out_err;
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if (bof_object_set(bo, "data", blob))
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goto out_err;
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bof_decref(blob);
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blob = NULL;
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if (bof_array_append(array, bo))
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goto out_err;
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bof_decref(bo);
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bo = NULL;
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}
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if (bof_object_set(root, "bo", array))
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goto out_err;
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sprintf(tmp, "d-0x%04X-%08d.bof", csm->device_id, csm->nbof++);
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bof_dump_file(root, tmp);
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out_err:
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bof_decref(blob);
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bof_decref(array);
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bof_decref(bo);
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bof_decref(size);
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bof_decref(handle);
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bof_decref(device_id);
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bof_decref(root);
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}
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#endif
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static int cs_gem_emit(struct radeon_cs_int *cs)
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{
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struct cs_gem *csg = (struct cs_gem*)cs;
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uint64_t chunk_array[2];
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unsigned i;
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int r;
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while (cs->cdw & 7)
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radeon_cs_write_dword((struct radeon_cs *)cs, 0x80000000);
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#if CS_BOF_DUMP
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cs_gem_dump_bof(cs);
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#endif
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csg->chunks[0].length_dw = cs->cdw;
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chunk_array[0] = (uint64_t)(uintptr_t)&csg->chunks[0];
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chunk_array[1] = (uint64_t)(uintptr_t)&csg->chunks[1];
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csg->cs.num_chunks = 2;
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csg->cs.chunks = (uint64_t)(uintptr_t)chunk_array;
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r = drmCommandWriteRead(cs->csm->fd, DRM_RADEON_CS,
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&csg->cs, sizeof(struct drm_radeon_cs));
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for (i = 0; i < csg->base.crelocs; i++) {
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csg->relocs_bo[i]->space_accounted = 0;
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/* bo might be referenced from another context so have to use atomic operations */
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atomic_dec((atomic_t *)radeon_gem_get_reloc_in_cs((struct radeon_bo*)csg->relocs_bo[i]), cs->id);
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radeon_bo_unref((struct radeon_bo *)csg->relocs_bo[i]);
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csg->relocs_bo[i] = NULL;
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}
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cs->csm->read_used = 0;
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cs->csm->vram_write_used = 0;
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cs->csm->gart_write_used = 0;
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return r;
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}
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static int cs_gem_destroy(struct radeon_cs_int *cs)
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{
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struct cs_gem *csg = (struct cs_gem*)cs;
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free_id(cs->id);
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free(csg->relocs_bo);
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free(cs->relocs);
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free(cs->packets);
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free(cs);
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return 0;
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}
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static int cs_gem_erase(struct radeon_cs_int *cs)
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{
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struct cs_gem *csg = (struct cs_gem*)cs;
|
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unsigned i;
|
|
|
|
if (csg->relocs_bo) {
|
|
for (i = 0; i < csg->base.crelocs; i++) {
|
|
if (csg->relocs_bo[i]) {
|
|
/* bo might be referenced from another context so have to use atomic operations */
|
|
atomic_dec((atomic_t *)radeon_gem_get_reloc_in_cs((struct radeon_bo*)csg->relocs_bo[i]), cs->id);
|
|
radeon_bo_unref((struct radeon_bo *)csg->relocs_bo[i]);
|
|
csg->relocs_bo[i] = NULL;
|
|
}
|
|
}
|
|
}
|
|
cs->relocs_total_size = 0;
|
|
cs->cdw = 0;
|
|
cs->section_ndw = 0;
|
|
cs->crelocs = 0;
|
|
csg->chunks[0].length_dw = 0;
|
|
csg->chunks[1].length_dw = 0;
|
|
return 0;
|
|
}
|
|
|
|
static int cs_gem_need_flush(struct radeon_cs_int *cs)
|
|
{
|
|
return 0; //(cs->relocs_total_size > (32*1024*1024));
|
|
}
|
|
|
|
static void cs_gem_print(struct radeon_cs_int *cs, FILE *file)
|
|
{
|
|
struct radeon_cs_manager_gem *csm;
|
|
unsigned int i;
|
|
|
|
csm = (struct radeon_cs_manager_gem *)cs->csm;
|
|
fprintf(file, "VENDORID:DEVICEID 0x%04X:0x%04X\n", 0x1002, csm->device_id);
|
|
for (i = 0; i < cs->cdw; i++) {
|
|
fprintf(file, "0x%08X\n", cs->packets[i]);
|
|
}
|
|
}
|
|
|
|
static const struct radeon_cs_funcs radeon_cs_gem_funcs = {
|
|
.cs_create = cs_gem_create,
|
|
.cs_write_reloc = cs_gem_write_reloc,
|
|
.cs_begin = cs_gem_begin,
|
|
.cs_end = cs_gem_end,
|
|
.cs_emit = cs_gem_emit,
|
|
.cs_destroy = cs_gem_destroy,
|
|
.cs_erase = cs_gem_erase,
|
|
.cs_need_flush = cs_gem_need_flush,
|
|
.cs_print = cs_gem_print,
|
|
};
|
|
|
|
static int radeon_get_device_id(int fd, uint32_t *device_id)
|
|
{
|
|
struct drm_radeon_info info = {};
|
|
int r;
|
|
|
|
*device_id = 0;
|
|
info.request = RADEON_INFO_DEVICE_ID;
|
|
info.value = (uintptr_t)device_id;
|
|
r = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info,
|
|
sizeof(struct drm_radeon_info));
|
|
return r;
|
|
}
|
|
|
|
drm_public struct radeon_cs_manager *radeon_cs_manager_gem_ctor(int fd)
|
|
{
|
|
struct radeon_cs_manager_gem *csm;
|
|
|
|
csm = calloc(1, sizeof(struct radeon_cs_manager_gem));
|
|
if (csm == NULL) {
|
|
return NULL;
|
|
}
|
|
csm->base.funcs = &radeon_cs_gem_funcs;
|
|
csm->base.fd = fd;
|
|
radeon_get_device_id(fd, &csm->device_id);
|
|
return &csm->base;
|
|
}
|
|
|
|
drm_public void radeon_cs_manager_gem_dtor(struct radeon_cs_manager *csm)
|
|
{
|
|
free(csm);
|
|
}
|