215 lines
6.8 KiB
C
215 lines
6.8 KiB
C
/*
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* Copyright (C) 2014-2015 Etnaviv Project
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Christian Gmeiner <christian.gmeiner@gmail.com>
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*/
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#ifndef ETNAVIV_DRMIF_H_
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#define ETNAVIV_DRMIF_H_
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#include <xf86drm.h>
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#include <stdint.h>
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struct etna_bo;
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struct etna_pipe;
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struct etna_gpu;
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struct etna_device;
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struct etna_cmd_stream;
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struct etna_perfmon;
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struct etna_perfmon_domain;
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struct etna_perfmon_signal;
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enum etna_pipe_id {
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ETNA_PIPE_3D = 0,
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ETNA_PIPE_2D = 1,
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ETNA_PIPE_VG = 2,
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ETNA_PIPE_MAX
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};
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enum etna_param_id {
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ETNA_GPU_MODEL = 0x1,
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ETNA_GPU_REVISION = 0x2,
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ETNA_GPU_FEATURES_0 = 0x3,
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ETNA_GPU_FEATURES_1 = 0x4,
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ETNA_GPU_FEATURES_2 = 0x5,
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ETNA_GPU_FEATURES_3 = 0x6,
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ETNA_GPU_FEATURES_4 = 0x7,
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ETNA_GPU_FEATURES_5 = 0x8,
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ETNA_GPU_FEATURES_6 = 0x9,
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ETNA_GPU_STREAM_COUNT = 0x10,
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ETNA_GPU_REGISTER_MAX = 0x11,
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ETNA_GPU_THREAD_COUNT = 0x12,
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ETNA_GPU_VERTEX_CACHE_SIZE = 0x13,
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ETNA_GPU_SHADER_CORE_COUNT = 0x14,
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ETNA_GPU_PIXEL_PIPES = 0x15,
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ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE = 0x16,
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ETNA_GPU_BUFFER_SIZE = 0x17,
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ETNA_GPU_INSTRUCTION_COUNT = 0x18,
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ETNA_GPU_NUM_CONSTANTS = 0x19,
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ETNA_GPU_NUM_VARYINGS = 0x1a
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};
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/* bo flags: */
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#define DRM_ETNA_GEM_CACHE_CACHED 0x00010000
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#define DRM_ETNA_GEM_CACHE_WC 0x00020000
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#define DRM_ETNA_GEM_CACHE_UNCACHED 0x00040000
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#define DRM_ETNA_GEM_CACHE_MASK 0x000f0000
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/* map flags */
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#define DRM_ETNA_GEM_FORCE_MMU 0x00100000
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/* bo access flags: (keep aligned to ETNA_PREP_x) */
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#define DRM_ETNA_PREP_READ 0x01
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#define DRM_ETNA_PREP_WRITE 0x02
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#define DRM_ETNA_PREP_NOSYNC 0x04
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/* device functions:
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*/
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struct etna_device *etna_device_new(int fd);
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struct etna_device *etna_device_new_dup(int fd);
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struct etna_device *etna_device_ref(struct etna_device *dev);
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void etna_device_del(struct etna_device *dev);
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int etna_device_fd(struct etna_device *dev);
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/* gpu functions:
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*/
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struct etna_gpu *etna_gpu_new(struct etna_device *dev, unsigned int core);
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void etna_gpu_del(struct etna_gpu *gpu);
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int etna_gpu_get_param(struct etna_gpu *gpu, enum etna_param_id param,
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uint64_t *value);
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/* pipe functions:
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*/
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struct etna_pipe *etna_pipe_new(struct etna_gpu *gpu, enum etna_pipe_id id);
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void etna_pipe_del(struct etna_pipe *pipe);
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int etna_pipe_wait(struct etna_pipe *pipe, uint32_t timestamp, uint32_t ms);
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int etna_pipe_wait_ns(struct etna_pipe *pipe, uint32_t timestamp, uint64_t ns);
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/* buffer-object functions:
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*/
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struct etna_bo *etna_bo_new(struct etna_device *dev,
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uint32_t size, uint32_t flags);
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struct etna_bo *etna_bo_from_name(struct etna_device *dev, uint32_t name);
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struct etna_bo *etna_bo_from_dmabuf(struct etna_device *dev, int fd);
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struct etna_bo *etna_bo_ref(struct etna_bo *bo);
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void etna_bo_del(struct etna_bo *bo);
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int etna_bo_get_name(struct etna_bo *bo, uint32_t *name);
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uint32_t etna_bo_handle(struct etna_bo *bo);
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int etna_bo_dmabuf(struct etna_bo *bo);
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uint32_t etna_bo_size(struct etna_bo *bo);
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void * etna_bo_map(struct etna_bo *bo);
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int etna_bo_cpu_prep(struct etna_bo *bo, uint32_t op);
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void etna_bo_cpu_fini(struct etna_bo *bo);
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/* cmd stream functions:
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*/
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struct etna_cmd_stream {
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uint32_t *buffer;
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uint32_t offset; /* in 32-bit words */
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uint32_t size; /* in 32-bit words */
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};
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struct etna_cmd_stream *etna_cmd_stream_new(struct etna_pipe *pipe, uint32_t size,
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void (*reset_notify)(struct etna_cmd_stream *stream, void *priv),
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void *priv);
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void etna_cmd_stream_del(struct etna_cmd_stream *stream);
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uint32_t etna_cmd_stream_timestamp(struct etna_cmd_stream *stream);
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void etna_cmd_stream_flush(struct etna_cmd_stream *stream);
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void etna_cmd_stream_flush2(struct etna_cmd_stream *stream, int in_fence_fd,
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int *out_fence_fd);
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void etna_cmd_stream_finish(struct etna_cmd_stream *stream);
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static inline uint32_t etna_cmd_stream_avail(struct etna_cmd_stream *stream)
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{
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static const uint32_t END_CLEARANCE = 2; /* LINK op code */
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return stream->size - stream->offset - END_CLEARANCE;
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}
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static inline void etna_cmd_stream_reserve(struct etna_cmd_stream *stream, size_t n)
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{
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if (etna_cmd_stream_avail(stream) < n)
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etna_cmd_stream_flush(stream);
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}
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static inline void etna_cmd_stream_emit(struct etna_cmd_stream *stream, uint32_t data)
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{
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stream->buffer[stream->offset++] = data;
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}
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static inline uint32_t etna_cmd_stream_get(struct etna_cmd_stream *stream, uint32_t offset)
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{
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return stream->buffer[offset];
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}
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static inline void etna_cmd_stream_set(struct etna_cmd_stream *stream, uint32_t offset,
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uint32_t data)
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{
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stream->buffer[offset] = data;
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}
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static inline uint32_t etna_cmd_stream_offset(struct etna_cmd_stream *stream)
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{
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return stream->offset;
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}
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struct etna_reloc {
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struct etna_bo *bo;
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#define ETNA_RELOC_READ 0x0001
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#define ETNA_RELOC_WRITE 0x0002
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uint32_t flags;
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uint32_t offset;
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};
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void etna_cmd_stream_reloc(struct etna_cmd_stream *stream, const struct etna_reloc *r);
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/* performance monitoring functions:
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*/
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struct etna_perfmon *etna_perfmon_create(struct etna_pipe *pipe);
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void etna_perfmon_del(struct etna_perfmon *perfmon);
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struct etna_perfmon_domain *etna_perfmon_get_dom_by_name(struct etna_perfmon *pm, const char *name);
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struct etna_perfmon_signal *etna_perfmon_get_sig_by_name(struct etna_perfmon_domain *dom, const char *name);
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struct etna_perf {
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#define ETNA_PM_PROCESS_PRE 0x0001
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#define ETNA_PM_PROCESS_POST 0x0002
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uint32_t flags;
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uint32_t sequence;
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struct etna_perfmon_signal *signal;
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struct etna_bo *bo;
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uint32_t offset;
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};
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void etna_cmd_stream_perf(struct etna_cmd_stream *stream, const struct etna_perf *p);
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#endif /* ETNAVIV_DRMIF_H_ */
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