Commit Graph

9 Commits

Author SHA1 Message Date
kettenis
86fd76579f The mmio registers consist of two blocks of 64k. The first 64k provide
a little-endian view, the second 64k provide a big-endian view.  Restrict
mapping to 64k to prevent mapping beyond the end of the BAR if we map the
big-endian view on big-endian machines.  There is no reason to map the
big-endian view on little-endian machines.

ok matthieu@
2009-06-04 18:18:11 +00:00
kettenis
037d9f8966 regen 2009-06-04 17:28:08 +00:00
kettenis
de58239bc4 Since the driver uses the big-endian view of the registers we shouldn't be
byteswapping during register access.  Define PPC_MMIO_IS_BE and
SPARC_MMIO_IS_BE to prevent this.

ok matthieu@
2009-06-04 17:21:00 +00:00
matthieu
689ce24aee update to xf86-video-glint 1.2.2 2009-03-07 11:31:32 +00:00
matthieu
e89a8a024f Merge alpha fix from X.Org instead of home grown one. 2008-11-06 22:44:02 +00:00
matthieu
e4c9b7396d switch the alpha specific code to libpciaccess. 2008-11-04 06:03:56 +00:00
matthieu
5fedb3129d xf86-video-glint 1.2.1 2008-10-12 20:09:42 +00:00
matthieu
6637a9a36e regen with automake 1.9.6p2 2007-03-18 22:29:12 +00:00
matthieu
a659c98d9e Importing xf86-video-glint 1.1.1 2006-11-26 20:03:49 +00:00