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update to libdrm 2.4.52

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ok matthieu@
This commit is contained in:
jsg 2014-03-15 05:05:55 +00:00
parent c9a482a02a
commit fd836bcc99
5 changed files with 76 additions and 14 deletions
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4
lib/libdrm/Makefile.inc
View File

@ -1,6 +1,6 @@
# $OpenBSD: Makefile.inc,v 1.9 2014/01/18 08:29:32 jsg Exp $
# $OpenBSD: Makefile.inc,v 1.10 2014/03/15 05:05:55 jsg Exp $
PACKAGE_VERSION= 2.4.51
PACKAGE_VERSION= 2.4.52
NOPROFILE=

12
lib/libdrm/intel/intel_bufmgr.h
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@ -61,9 +61,8 @@ struct _drm_intel_bo {
unsigned long align;
/**
* Last seen card virtual address (offset from the beginning of the
* aperture) for the object. This should be used to fill relocation
* entries when calling drm_intel_bo_emit_reloc()
* Deprecated field containing (possibly the low 32-bits of) the last
* seen virtual card address. Use offset64 instead.
*/
unsigned long offset;
@ -84,6 +83,13 @@ struct _drm_intel_bo {
* MM-specific handle for accessing object
*/
int handle;
/**
* Last seen card virtual address (offset from the beginning of the
* aperture) for the object. This should be used to fill relocation
* entries when calling drm_intel_bo_emit_reloc()
*/
uint64_t offset64;
};
enum aub_dump_bmp_format {

47
lib/libdrm/intel/intel_bufmgr_gem.c
View File

@ -213,6 +213,15 @@ struct _drm_intel_bo_gem {
*/
bool reusable;
/**
* Boolean of whether the GPU is definitely not accessing the buffer.
*
* This is only valid when reusable, since non-reusable
* buffers are those that have been shared wth other
* processes, so we don't know their state.
*/
bool idle;
/**
* Size in bytes of this buffer and its relocation descendents.
*
@ -384,7 +393,7 @@ drm_intel_gem_dump_validation_list(drm_intel_bufmgr_gem *bufmgr_gem)
(unsigned long long)bo_gem->relocs[j].offset,
target_gem->gem_handle,
target_gem->name,
target_bo->offset,
target_bo->offset64,
bo_gem->relocs[j].delta);
}
}
@ -571,11 +580,19 @@ drm_intel_gem_bo_busy(drm_intel_bo *bo)
struct drm_i915_gem_busy busy;
int ret;
if (bo_gem->reusable && bo_gem->idle)
return false;
VG_CLEAR(busy);
busy.handle = bo_gem->gem_handle;
ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_BUSY, &busy);
if (ret == 0) {
bo_gem->idle = !busy.busy;
return busy.busy;
} else {
return false;
}
return (ret == 0 && busy.busy);
}
@ -898,6 +915,7 @@ drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
bo_gem->bo.size = open_arg.size;
bo_gem->bo.offset = 0;
bo_gem->bo.offset64 = 0;
bo_gem->bo.virtual = NULL;
bo_gem->bo.bufmgr = bufmgr;
bo_gem->name = name;
@ -1341,7 +1359,9 @@ int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo)
int drm_intel_gem_bo_map_unsynchronized(drm_intel_bo *bo)
{
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
#ifdef HAVE_VALGRIND
drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
#endif
int ret;
/* If the CPU cache isn't coherent with the GTT, then use a
@ -1693,7 +1713,7 @@ do_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
target_bo_gem->gem_handle;
bo_gem->relocs[bo_gem->reloc_count].read_domains = read_domains;
bo_gem->relocs[bo_gem->reloc_count].write_domain = write_domain;
bo_gem->relocs[bo_gem->reloc_count].presumed_offset = target_bo->offset;
bo_gem->relocs[bo_gem->reloc_count].presumed_offset = target_bo->offset64;
bo_gem->reloc_target_info[bo_gem->reloc_count].bo = target_bo;
if (target_bo != bo)
@ -1847,11 +1867,12 @@ drm_intel_update_buffer_offsets(drm_intel_bufmgr_gem *bufmgr_gem)
drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
/* Update the buffer offset */
if (bufmgr_gem->exec_objects[i].offset != bo->offset) {
if (bufmgr_gem->exec_objects[i].offset != bo->offset64) {
DBG("BO %d (%s) migrated: 0x%08lx -> 0x%08llx\n",
bo_gem->gem_handle, bo_gem->name, bo->offset,
bo_gem->gem_handle, bo_gem->name, bo->offset64,
(unsigned long long)bufmgr_gem->exec_objects[i].
offset);
bo->offset64 = bufmgr_gem->exec_objects[i].offset;
bo->offset = bufmgr_gem->exec_objects[i].offset;
}
}
@ -1868,10 +1889,11 @@ drm_intel_update_buffer_offsets2 (drm_intel_bufmgr_gem *bufmgr_gem)
drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo;
/* Update the buffer offset */
if (bufmgr_gem->exec2_objects[i].offset != bo->offset) {
if (bufmgr_gem->exec2_objects[i].offset != bo->offset64) {
DBG("BO %d (%s) migrated: 0x%08lx -> 0x%08llx\n",
bo_gem->gem_handle, bo_gem->name, bo->offset,
bo_gem->gem_handle, bo_gem->name, bo->offset64,
(unsigned long long)bufmgr_gem->exec2_objects[i].offset);
bo->offset64 = bufmgr_gem->exec2_objects[i].offset;
bo->offset = bufmgr_gem->exec2_objects[i].offset;
}
}
@ -2228,6 +2250,8 @@ drm_intel_gem_bo_exec(drm_intel_bo *bo, int used,
drm_intel_bo *bo = bufmgr_gem->exec_bos[i];
drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
bo_gem->idle = false;
/* Disconnect the buffer from the validate list */
bo_gem->validate_index = -1;
bufmgr_gem->exec_bos[i] = NULL;
@ -2326,6 +2350,8 @@ skip_execution:
drm_intel_bo *bo = bufmgr_gem->exec_bos[i];
drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo;
bo_gem->idle = false;
/* Disconnect the buffer from the validate list */
bo_gem->validate_index = -1;
bufmgr_gem->exec_bos[i] = NULL;
@ -2379,6 +2405,7 @@ drm_intel_gem_bo_pin(drm_intel_bo *bo, uint32_t alignment)
if (ret != 0)
return -errno;
bo->offset64 = pin.offset;
bo->offset = pin.offset;
return 0;
}
@ -3032,15 +3059,19 @@ drm_intel_gem_context_create(drm_intel_bufmgr *bufmgr)
drm_intel_context *context = NULL;
int ret;
context = calloc(1, sizeof(*context));
if (!context)
return NULL;
VG_CLEAR(create);
ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &create);
if (ret != 0) {
DBG("DRM_IOCTL_I915_GEM_CONTEXT_CREATE failed: %s\n",
strerror(errno));
free(context);
return NULL;
}
context = calloc(1, sizeof(*context));
context->ctx_id = create.ctx_id;
context->bufmgr = bufmgr;

8
lib/libdrm/xf86drm.h
View File

@ -92,8 +92,14 @@ extern "C" {
typedef unsigned int drmSize, *drmSizePtr; /**< For mapped regions */
typedef void *drmAddress, **drmAddressPtr; /**< For mapped regions */
#if (__GNUC__ >= 3)
#define DRM_PRINTFLIKE(f, a) __attribute__ ((format(__printf__, f, a)))
#else
#define DRM_PRINTFLIKE(f, a)
#endif
typedef struct _drmServerInfo {
int (*debug_print)(const char *format, va_list ap);
int (*debug_print)(const char *format, va_list ap) DRM_PRINTFLIKE(1,0);
int (*load_module)(const char *name);
void (*get_perms)(gid_t *, mode_t *);
} drmServerInfo, *drmServerInfoPtr;

19
lib/libdrm/xf86drmMode.c
View File

@ -41,6 +41,10 @@
#include <sys/ioctl.h>
#include <stdio.h>
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "xf86drmMode.h"
#include "xf86drm.h"
#include <drm.h>
@ -49,6 +53,16 @@
#include <unistd.h>
#include <errno.h>
#ifdef HAVE_VALGRIND
#include <valgrind.h>
#include <memcheck.h>
#define VG(x) x
#else
#define VG(x)
#endif
#define VG_CLEAR(s) VG(memset(&s, 0, sizeof(s)))
#define U642VOID(x) ((void *)(unsigned long)(x))
#define VOID2U64(x) ((uint64_t)(unsigned long)(x))
@ -245,6 +259,7 @@ int drmModeAddFB(int fd, uint32_t width, uint32_t height, uint8_t depth,
struct drm_mode_fb_cmd f;
int ret;
VG_CLEAR(f);
f.width = width;
f.height = height;
f.pitch = pitch;
@ -335,6 +350,7 @@ drmModeCrtcPtr drmModeGetCrtc(int fd, uint32_t crtcId)
struct drm_mode_crtc crtc;
drmModeCrtcPtr r;
VG_CLEAR(crtc);
crtc.crtc_id = crtcId;
if (drmIoctl(fd, DRM_IOCTL_MODE_GETCRTC, &crtc))
@ -368,6 +384,7 @@ int drmModeSetCrtc(int fd, uint32_t crtcId, uint32_t bufferId,
{
struct drm_mode_crtc crtc;
VG_CLEAR(crtc);
crtc.x = x;
crtc.y = y;
crtc.crtc_id = crtcId;
@ -436,6 +453,7 @@ drmModeEncoderPtr drmModeGetEncoder(int fd, uint32_t encoder_id)
drmModeEncoderPtr r = NULL;
enc.encoder_id = encoder_id;
enc.crtc_id = 0;
enc.encoder_type = 0;
enc.possible_crtcs = 0;
enc.possible_clones = 0;
@ -580,6 +598,7 @@ drmModePropertyPtr drmModeGetProperty(int fd, uint32_t property_id)
struct drm_mode_get_property prop;
drmModePropertyPtr r;
VG_CLEAR(prop);
prop.prop_id = property_id;
prop.count_enum_blobs = 0;
prop.count_values = 0;