Import Mesa 11.0.9

This commit is contained in:
jsg 2016-01-24 00:59:28 +00:00
parent dfb4d57a09
commit f83fcc6f8e
31 changed files with 200 additions and 49 deletions

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@ -1 +1 @@
11.0.8
11.0.9

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@ -31,7 +31,8 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
TBD
ab9db87b54d7525e4b611b82577ea9a9eae55927558df57b190059d5ecd9406f mesa-11.0.8.tar.gz
5696e4730518b6805d2ed5def393c4293f425a2c2c01bd5ed4bdd7ad62f7ad75 mesa-11.0.8.tar.xz
</pre>

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@ -0,0 +1,126 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 11.0.9 Release Notes / January 22, 2016</h1>
<p>
Mesa 11.0.9 is a bug fix release which fixes bugs found since the 11.0.8 release.
</p>
<p>
Mesa 11.0.9 implements the OpenGL 4.1 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.1. OpenGL
4.1 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
TBD
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=91596">Bug 91596</a> - EGL_KHR_gl_colorspace (v2) causes problem with Android-x86 GUI</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=92229">Bug 92229</a> - [APITRACE] SOMA have serious graphical errors</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=93257">Bug 93257</a> - [SKL, bisected] ASTC dEQP tests segfault</li>
</ul>
<h2>Changes</h2>
<p>Emil Velikov (6):</p>
<ul>
<li>docs: add sha256 checksums for 11.0.8</li>
<li>cherry-ignore: add patch already in branch</li>
<li>cherry-ignore: add the dri3 glx null check patch</li>
<li>i915: correctly parse/set the context flags</li>
<li>egl/dri2: expose srgb configs when KHR_gl_colorspace is available</li>
<li>Update version to 11.0.9</li>
</ul>
<p>Grazvydas Ignotas (1):</p>
<ul>
<li>r600: fix constant buffer size programming</li>
</ul>
<p>Ilia Mirkin (5):</p>
<ul>
<li>nvc0: don't forget to reset VTX_TMP bufctx slot after blit completion</li>
<li>nv50/ir: float(s32 &amp; 0xff) = float(u8), not s8</li>
<li>nv50,nvc0: make sure there's pushbuf space and that we ref the bo early</li>
<li>nv50,nvc0: fix crash when increasing bsp bo size for h264</li>
<li>nvc0: scale up inter_bo size so that it's 16M for a 4K video</li>
</ul>
<p>Kenneth Graunke (2):</p>
<ul>
<li>ralloc: Fix ralloc_adopt() to the old context's last child's parent.</li>
<li>nvc0: Set winding order regardless of domain.</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>radeonsi: don't miss changes to SPI_TMPRING_SIZE</li>
</ul>
<p>Miklós Máté (1):</p>
<ul>
<li>mesa: Don't leak ATIfs instructions in DeleteFragmentShader</li>
</ul>
<p>Neil Roberts (1):</p>
<ul>
<li>i965: Fix crash when calling glViewport with no surface bound</li>
</ul>
<p>Nicolai Hähnle (6):</p>
<ul>
<li>gallium/radeon: only dispose locally created target machine in radeon_llvm_compile</li>
<li>mesa/bufferobj: make _mesa_delete_buffer_object externally accessible</li>
<li>st/mesa: use _mesa_delete_buffer_object</li>
<li>radeon: use _mesa_delete_buffer_object</li>
<li>i915: use _mesa_delete_buffer_object</li>
<li>i965: use _mesa_delete_buffer_object</li>
</ul>
<p>Oded Gabbay (1):</p>
<ul>
<li>llvmpipe: use vpkswss when dst is signed</li>
</ul>
<p>Rob Herring (1):</p>
<ul>
<li>freedreno/ir3: fix 32-bit builds with pointer-to-int-cast error enabled</li>
</ul>
</div>
</body>
</html>

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@ -236,6 +236,8 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig *dri_config, int id,
case __DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE:
srgb = value != 0;
if (!disp->Extensions.KHR_gl_colorspace && srgb)
return NULL;
break;
default:

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@ -461,50 +461,49 @@ lp_build_pack2(struct gallivm_state *gallivm,
assert(src_type.length * 2 == dst_type.length);
/* Check for special cases first */
if((util_cpu_caps.has_sse2 || util_cpu_caps.has_altivec) &&
src_type.width * src_type.length >= 128) {
if ((util_cpu_caps.has_sse2 || util_cpu_caps.has_altivec) &&
src_type.width * src_type.length >= 128) {
const char *intrinsic = NULL;
boolean swap_intrinsic_operands = FALSE;
switch(src_type.width) {
case 32:
if (util_cpu_caps.has_sse2) {
if(dst_type.sign) {
if (dst_type.sign) {
intrinsic = "llvm.x86.sse2.packssdw.128";
}
else {
} else {
if (util_cpu_caps.has_sse4_1) {
intrinsic = "llvm.x86.sse41.packusdw";
}
}
} else if (util_cpu_caps.has_altivec) {
if (dst_type.sign) {
intrinsic = "llvm.ppc.altivec.vpkswus";
} else {
intrinsic = "llvm.ppc.altivec.vpkuwus";
}
intrinsic = "llvm.ppc.altivec.vpkswss";
} else {
intrinsic = "llvm.ppc.altivec.vpkuwus";
}
#ifdef PIPE_ARCH_LITTLE_ENDIAN
swap_intrinsic_operands = TRUE;
swap_intrinsic_operands = TRUE;
#endif
}
break;
case 16:
if (dst_type.sign) {
if (util_cpu_caps.has_sse2) {
intrinsic = "llvm.x86.sse2.packsswb.128";
intrinsic = "llvm.x86.sse2.packsswb.128";
} else if (util_cpu_caps.has_altivec) {
intrinsic = "llvm.ppc.altivec.vpkshss";
intrinsic = "llvm.ppc.altivec.vpkshss";
#ifdef PIPE_ARCH_LITTLE_ENDIAN
swap_intrinsic_operands = TRUE;
swap_intrinsic_operands = TRUE;
#endif
}
} else {
if (util_cpu_caps.has_sse2) {
intrinsic = "llvm.x86.sse2.packuswb.128";
intrinsic = "llvm.x86.sse2.packuswb.128";
} else if (util_cpu_caps.has_altivec) {
intrinsic = "llvm.ppc.altivec.vpkshus";
intrinsic = "llvm.ppc.altivec.vpkshus";
#ifdef PIPE_ARCH_LITTLE_ENDIAN
swap_intrinsic_operands = TRUE;
swap_intrinsic_operands = TRUE;
#endif
}
}

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@ -143,7 +143,7 @@ block_id(struct ir3_block *block)
#ifdef DEBUG
return block->serialno;
#else
return (uint32_t)(uint64_t)block;
return (uint32_t)(unsigned long)block;
#endif
}

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@ -1664,6 +1664,9 @@ AlgebraicOpt::handleCVT_EXTBF(Instruction *cvt)
arg = shift->getSrc(0);
offset = imm.reg.data.u32;
}
// We just AND'd the high bits away, which means this is effectively an
// unsigned value.
cvt->sType = TYPE_U32;
} else if (insn->op == OP_SHR &&
insn->sType == cvt->sType &&
insn->src(1).getImmediate(imm)) {

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@ -641,8 +641,8 @@ nv50_draw_elements(struct nv50_context *nv50, bool shorten,
BEGIN_NV04(push, NV50_3D(VERTEX_BEGIN_GL), 1);
PUSH_DATA (push, prim);
PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
nouveau_pushbuf_space(push, 8, 0, 1);
PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
switch (index_size) {
case 4:

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@ -77,7 +77,7 @@ nv98_decoder_bsp(struct nouveau_vp3_decoder *dec, union pipe_desc desc,
bsp_size += (1 << 20) - 1;
bsp_size &= ~((1 << 20) - 1);
ret = nouveau_bo_new(dec->bitplane_bo->device, NOUVEAU_BO_VRAM, 0, bsp_size, NULL, &tmp_bo);
ret = nouveau_bo_new(dec->client->device, NOUVEAU_BO_VRAM, 0, bsp_size, NULL, &tmp_bo);
if (ret) {
debug_printf("reallocating bsp %u -> %u failed with %i\n",
bsp_bo ? (unsigned)bsp_bo->size : 0, bsp_size, ret);
@ -90,7 +90,7 @@ nv98_decoder_bsp(struct nouveau_vp3_decoder *dec, union pipe_desc desc,
if (!inter_bo || bsp_bo->size * 4 > inter_bo->size) {
struct nouveau_bo *tmp_bo = NULL;
ret = nouveau_bo_new(dec->bitplane_bo->device, NOUVEAU_BO_VRAM, 0, bsp_bo->size * 4, NULL, &tmp_bo);
ret = nouveau_bo_new(dec->client->device, NOUVEAU_BO_VRAM, 0, bsp_bo->size * 4, NULL, &tmp_bo);
if (ret) {
debug_printf("reallocating inter %u -> %u failed with %i\n",
inter_bo ? (unsigned)inter_bo->size : 0, (unsigned)bsp_bo->size * 4, ret);

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@ -287,8 +287,6 @@ nvc0_tp_get_tess_mode(struct nvc0_program *tp, struct nv50_ir_prog_info *info)
break;
case PIPE_PRIM_TRIANGLES:
tp->tp.tess_mode = NVC0_3D_TESS_MODE_PRIM_TRIANGLES;
if (info->prop.tp.winding > 0)
tp->tp.tess_mode |= NVC0_3D_TESS_MODE_CW;
break;
case PIPE_PRIM_QUADS:
tp->tp.tess_mode = NVC0_3D_TESS_MODE_PRIM_QUADS;
@ -297,6 +295,10 @@ nvc0_tp_get_tess_mode(struct nvc0_program *tp, struct nv50_ir_prog_info *info)
tp->tp.tess_mode = ~0;
return;
}
if (info->prop.tp.winding > 0)
tp->tp.tess_mode |= NVC0_3D_TESS_MODE_CW;
if (info->prop.tp.outputPrim != PIPE_PRIM_POINTS)
tp->tp.tess_mode |= NVC0_3D_TESS_MODE_CONNECTED;

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@ -618,7 +618,6 @@ nvc0_query_pushbuf_submit(struct nouveau_pushbuf *push,
#define NVC0_IB_ENTRY_1_NO_PREFETCH (1 << (31 - 8))
PUSH_REFN(push, q->bo, NOUVEAU_BO_RD | NOUVEAU_BO_GART);
nouveau_pushbuf_space(push, 0, 0, 1);
nouveau_pushbuf_data(push, q->bo, q->offset + result_offset, 4 |
NVC0_IB_ENTRY_1_NO_PREFETCH);
}

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@ -273,6 +273,7 @@ nvc0_tfb_validate(struct nvc0_context *nvc0)
if (!targ->clean)
nvc0_query_fifo_wait(push, targ->pq);
nouveau_pushbuf_space(push, 0, 0, 1);
BEGIN_NVC0(push, NVC0_3D(TFB_BUFFER_ENABLE(b)), 5);
PUSH_DATA (push, 1);
PUSH_DATAh(push, buf->address + targ->pipe.buffer_offset);

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@ -1006,9 +1006,11 @@ nvc0_blitctx_post_blit(struct nvc0_blitctx *blit)
nvc0->base.pipe.render_condition(&nvc0->base.pipe, nvc0->cond_query,
nvc0->cond_cond, nvc0->cond_mode);
nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_VTX_TMP);
nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_FB);
nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_TEX(4, 0));
nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_TEX(4, 1));
nouveau_scratch_done(&nvc0->base);
nvc0->dirty = blit->saved.dirty |
(NVC0_NEW_FRAMEBUFFER | NVC0_NEW_SCISSOR | NVC0_NEW_SAMPLE_MASK |

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@ -783,7 +783,7 @@ nvc0_draw_stream_output(struct nvc0_context *nvc0,
}
while (num_instances--) {
PUSH_SPACE(push, 8);
nouveau_pushbuf_space(push, 9, 0, 1);
BEGIN_NVC0(push, NVC0_3D(VERTEX_BEGIN_GL), 1);
PUSH_DATA (push, mode);
BEGIN_NVC0(push, NVC0_3D(DRAW_TFB_BASE), 1);
@ -810,7 +810,8 @@ nvc0_draw_indirect(struct nvc0_context *nvc0, const struct pipe_draw_info *info)
if (buf->fence_wr && !nouveau_fence_signalled(buf->fence_wr))
IMMED_NVC0(push, SUBC_3D(NV10_SUBCHAN_REF_CNT), 0);
PUSH_SPACE(push, 8);
nouveau_pushbuf_space(push, 8, 0, 1);
PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
if (info->indexed) {
assert(nvc0->idxbuf.buffer);
assert(nouveau_resource_mapped_by_gpu(nvc0->idxbuf.buffer));
@ -828,8 +829,6 @@ nvc0_draw_indirect(struct nvc0_context *nvc0, const struct pipe_draw_info *info)
}
PUSH_DATA(push, nvc0_prim_gl(info->mode));
#define NVC0_IB_ENTRY_1_NO_PREFETCH (1 << (31 - 8))
PUSH_REFN(push, buf->bo, NOUVEAU_BO_RD | buf->domain);
nouveau_pushbuf_space(push, 0, 0, 1);
nouveau_pushbuf_data(push,
buf->bo, offset, NVC0_IB_ENTRY_1_NO_PREFETCH | size);
}

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@ -169,9 +169,12 @@ nvc0_create_decoder(struct pipe_context *context,
for (i = 0; i < NOUVEAU_VP3_VIDEO_QDEPTH && !ret; ++i)
ret = nouveau_bo_new(screen->device, NOUVEAU_BO_VRAM,
0, 1 << 20, &cfg, &dec->bsp_bo[i]);
if (!ret)
if (!ret) {
/* total fudge factor... just has to be bigger for higher bitrates? */
unsigned inter_size = align(templ->width * templ->height * 2, 4 << 20);
ret = nouveau_bo_new(screen->device, NOUVEAU_BO_VRAM,
0x100, 4 << 20, &cfg, &dec->inter_bo[0]);
0x100, inter_size, &cfg, &dec->inter_bo[0]);
}
if (!ret) {
ret = nouveau_bo_new(screen->device, NOUVEAU_BO_VRAM,
0x100, dec->inter_bo[0]->size, &cfg,

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@ -81,7 +81,7 @@ nvc0_decoder_bsp(struct nouveau_vp3_decoder *dec, union pipe_desc desc,
bsp_size += (1 << 20) - 1;
bsp_size &= ~((1 << 20) - 1);
ret = nouveau_bo_new(dec->bitplane_bo->device, NOUVEAU_BO_VRAM, 0, bsp_size, &cfg, &tmp_bo);
ret = nouveau_bo_new(dec->client->device, NOUVEAU_BO_VRAM, 0, bsp_size, &cfg, &tmp_bo);
if (ret) {
debug_printf("reallocating bsp %u -> %u failed with %i\n",
bsp_bo ? (unsigned)bsp_bo->size : 0, bsp_size, ret);
@ -98,7 +98,7 @@ nvc0_decoder_bsp(struct nouveau_vp3_decoder *dec, union pipe_desc desc,
cfg.nvc0.tile_mode = 0x10;
cfg.nvc0.memtype = 0xfe;
ret = nouveau_bo_new(dec->bitplane_bo->device, NOUVEAU_BO_VRAM, 0, bsp_bo->size * 4, &cfg, &tmp_bo);
ret = nouveau_bo_new(dec->client->device, NOUVEAU_BO_VRAM, 0, bsp_bo->size * 4, &cfg, &tmp_bo);
if (ret) {
debug_printf("reallocating inter %u -> %u failed with %i\n",
inter_bo ? (unsigned)inter_bo->size : 0, (unsigned)bsp_bo->size * 4, ret);

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@ -1916,7 +1916,7 @@ static void evergreen_emit_constant_buffers(struct r600_context *rctx,
if (!gs_ring_buffer) {
r600_write_context_reg_flag(cs, reg_alu_constbuf_size + buffer_index * 4,
ALIGN_DIVUP(cb->buffer_size >> 4, 16), pkt_flags);
ALIGN_DIVUP(cb->buffer_size, 256), pkt_flags);
r600_write_context_reg_flag(cs, reg_alu_const_cache + buffer_index * 4, va >> 8,
pkt_flags);
}

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@ -1732,7 +1732,7 @@ static void r600_emit_constant_buffers(struct r600_context *rctx,
if (!gs_ring_buffer) {
r600_write_context_reg(cs, reg_alu_constbuf_size + buffer_index * 4,
ALIGN_DIVUP(cb->buffer_size >> 4, 16));
ALIGN_DIVUP(cb->buffer_size, 256));
r600_write_context_reg(cs, reg_alu_const_cache + buffer_index * 4, offset >> 8);
}

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@ -194,8 +194,8 @@ unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binar
if (mem_err) {
fprintf(stderr, "%s: %s", __FUNCTION__, err);
FREE(err);
LLVMDisposeTargetMachine(tm);
return 1;
rval = 1;
goto out;
}
if (0 != rval) {
@ -211,6 +211,7 @@ unsigned radeon_llvm_compile(LLVMModuleRef M, struct radeon_shader_binary *binar
/* Clean up */
LLVMDisposeMemoryBuffer(out_buffer);
out:
if (dispose_tm) {
LLVMDisposeTargetMachine(tm);
}

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@ -1198,6 +1198,7 @@ static bool si_update_spi_tmpring_size(struct si_context *sctx)
si_get_max_scratch_bytes_per_wave(sctx);
unsigned scratch_needed_size = scratch_bytes_per_wave *
sctx->scratch_waves;
unsigned spi_tmpring_size;
int r;
if (scratch_needed_size > 0) {
@ -1280,8 +1281,12 @@ static bool si_update_spi_tmpring_size(struct si_context *sctx)
assert((scratch_needed_size & ~0x3FF) == scratch_needed_size &&
"scratch size should already be aligned correctly.");
sctx->spi_tmpring_size = S_0286E8_WAVES(sctx->scratch_waves) |
S_0286E8_WAVESIZE(scratch_bytes_per_wave >> 10);
spi_tmpring_size = S_0286E8_WAVES(sctx->scratch_waves) |
S_0286E8_WAVESIZE(scratch_bytes_per_wave >> 10);
if (spi_tmpring_size != sctx->spi_tmpring_size) {
sctx->spi_tmpring_size = spi_tmpring_size;
sctx->emit_scratch_reloc = true;
}
return true;
}

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@ -99,7 +99,7 @@ intel_bufferobj_free(struct gl_context * ctx, struct gl_buffer_object *obj)
_mesa_align_free(intel_obj->sys_buffer);
drm_intel_bo_unreference(intel_obj->buffer);
free(intel_obj);
_mesa_delete_buffer_object(ctx, obj);
}

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@ -426,6 +426,8 @@ intelInitContext(struct intel_context *intel,
return false;
}
driContextSetFlags(&intel->ctx, flags);
driContextPriv->driverPrivate = intel;
intel->driContext = driContextPriv;

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@ -151,8 +151,10 @@ intel_viewport(struct gl_context *ctx)
__DRIcontext *driContext = brw->driContext;
if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
dri2InvalidateDrawable(driContext->driDrawablePriv);
dri2InvalidateDrawable(driContext->driReadablePriv);
if (driContext->driDrawablePriv)
dri2InvalidateDrawable(driContext->driDrawablePriv);
if (driContext->driReadablePriv)
dri2InvalidateDrawable(driContext->driReadablePriv);
}
}

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@ -167,7 +167,7 @@ brw_delete_buffer(struct gl_context * ctx, struct gl_buffer_object *obj)
_mesa_buffer_unmap_all_mappings(ctx, obj);
drm_intel_bo_unreference(intel_obj->buffer);
free(intel_obj);
_mesa_delete_buffer_object(ctx, obj);
}

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@ -71,7 +71,7 @@ radeonDeleteBufferObject(struct gl_context * ctx,
radeon_bo_unref(radeon_obj->bo);
}
free(radeon_obj);
_mesa_delete_buffer_object(ctx, obj);
}

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@ -71,7 +71,7 @@ radeonDeleteBufferObject(struct gl_context * ctx,
radeon_bo_unref(radeon_obj->bo);
}
free(radeon_obj);
_mesa_delete_buffer_object(ctx, obj);
}

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@ -293,7 +293,7 @@ _mesa_DeleteFragmentShaderATI(GLuint id)
prog->RefCount--;
if (prog->RefCount <= 0) {
assert(prog != &DummyShader);
free(prog);
_mesa_delete_ati_fragment_shader(ctx, prog);
}
}
}

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@ -412,7 +412,7 @@ _mesa_new_buffer_object(struct gl_context *ctx, GLuint name)
*
* Default callback for the \c dd_function_table::DeleteBuffer() hook.
*/
static void
void
_mesa_delete_buffer_object(struct gl_context *ctx,
struct gl_buffer_object *bufObj)
{

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@ -109,6 +109,10 @@ _mesa_initialize_buffer_object(struct gl_context *ctx,
struct gl_buffer_object *obj,
GLuint name);
extern void
_mesa_delete_buffer_object(struct gl_context *ctx,
struct gl_buffer_object *bufObj);
extern void
_mesa_reference_buffer_object_(struct gl_context *ctx,
struct gl_buffer_object **ptr,

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@ -83,8 +83,7 @@ st_bufferobj_free(struct gl_context *ctx, struct gl_buffer_object *obj)
if (st_obj->buffer)
pipe_resource_reference(&st_obj->buffer, NULL);
free(st_obj->Base.Label);
free(st_obj);
_mesa_delete_buffer_object(ctx, obj);
}

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@ -293,6 +293,7 @@ ralloc_adopt(const void *new_ctx, void *old_ctx)
/* Connect the two lists together; parent them to new_ctx; make old_ctx empty. */
child->next = new_info->child;
child->parent = new_info;
new_info->child = old_info->child;
old_info->child = NULL;
}