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Make the hdmi modesetting code handle multiple display pipes.

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Problem noticed by by rivo nurges and blambert@ after ivy bridge
support enabled multiple pipes for pch devices.

Fix based on what the upstream drm code does and
tested by rivo nurges, blambert@ and sthen@

ok kettenis@
This commit is contained in:
jsg 2012-10-20 03:01:40 +00:00
parent 9c8830d974
commit e9cb1c0fcd
2 changed files with 10 additions and 2 deletions
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10
driver/xf86-video-intel/src/i830_hdmi.c
View File

@ -87,11 +87,17 @@ i830_hdmi_mode_set(xf86OutputPtr output, DisplayModePtr mode,
SDVO_VSYNC_ACTIVE_HIGH |
SDVO_HSYNC_ACTIVE_HIGH;
/* Required on CPT */
if (dev_priv->has_hdmi_sink && HAS_PCH_CPT(intel))
sdvox |= HDMI_MODE_SELECT;
if (dev_priv->has_hdmi_sink)
sdvox |= SDVO_AUDIO_ENABLE;
if (intel_crtc->pipe == 1)
sdvox |= SDVO_PIPE_B_SELECT;
if (HAS_PCH_CPT(intel))
sdvox |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
else if (intel_crtc->pipe == 1)
sdvox |= SDVO_PIPE_B_SELECT;
OUTREG(dev_priv->output_reg, sdvox);
POSTING_READ(dev_priv->output_reg);

2
driver/xf86-video-intel/src/i830_reg.h
View File

@ -4263,6 +4263,8 @@ typedef enum {
#define SDVO_ENCODING (0)
#define TMDS_ENCODING (2 << 10)
#define NULL_PACKET_VSYNC_ENABLE (1 << 9)
/* CPT */
#define HDMI_MODE_SELECT (1 << 9)
#define SDVOB_BORDER_ENABLE (1 << 7)
#define AUDIO_ENABLE (1 << 6)
#define VSYNC_ACTIVE_HIGH (1 << 4)