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Import Mesa 10.2.7

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This commit is contained in:
jsg 2014-09-07 15:00:10 +00:00
parent ea3574d110
commit dd38df57c9
80 changed files with 1573 additions and 315 deletions
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4
dist/Mesa/Android.mk vendored
View File

@ -24,7 +24,7 @@
# BOARD_GPU_DRIVERS should be defined. The valid values are
#
# classic drivers: i915 i965
# gallium drivers: swrast i915g ilo nouveau r300g r600g radeonsi vmwgfx
# gallium drivers: swrast freedreno i915g ilo nouveau r300g r600g radeonsi vmwgfx
#
# The main target is libGLES_mesa. For each classic driver enabled, a DRI
# module will also be built. DRI modules will be loaded by libGLES_mesa.
@ -42,7 +42,7 @@ DRM_TOP := external/drm
DRM_GRALLOC_TOP := hardware/drm_gralloc
classic_drivers := i915 i965
gallium_drivers := swrast i915g ilo nouveau r300g r600g radeonsi vmwgfx
gallium_drivers := swrast freedreno i915g ilo nouveau r300g r600g radeonsi vmwgfx
MESA_GPU_DRIVERS := $(strip $(BOARD_GPU_DRIVERS))

11
dist/Mesa/Makefile.am vendored
View File

@ -64,14 +64,13 @@ IGNORE_FILES = \
parsers: configure
$(MAKE) -C src/glsl glsl_parser.cpp glsl_parser.h glsl_lexer.cpp glcpp/glcpp-lex.c glcpp/glcpp-parse.c glcpp/glcpp-parse.h
$(MAKE) -C src/mesa program/lex.yy.c program/program_parse.tab.c program/program_parse.tab.h
# Everything for new a Mesa release:
ARCHIVES = $(PACKAGE_NAME).tar.gz \
$(PACKAGE_NAME).tar.bz2 \
$(PACKAGE_NAME).zip
tarballs: md5
tarballs: checksums
rm -f ../$(PACKAGE_DIR) $(PACKAGE_NAME).tar
manifest.txt: .git
@ -98,9 +97,9 @@ $(PACKAGE_NAME).zip: parsers ../$(PACKAGE_DIR) manifest.txt
zip -q -@ $(PACKAGE_NAME).zip < $(PACKAGE_DIR)/manifest.txt ; \
mv $(PACKAGE_NAME).zip $(PACKAGE_DIR)
md5: $(ARCHIVES)
@-md5sum $(PACKAGE_NAME).tar.gz
@-md5sum $(PACKAGE_NAME).tar.bz2
@-md5sum $(PACKAGE_NAME).zip
checksums: $(ARCHIVES)
@-sha256sum $(PACKAGE_NAME).tar.gz
@-sha256sum $(PACKAGE_NAME).tar.bz2
@-sha256sum $(PACKAGE_NAME).zip
.PHONY: tarballs md5

15
dist/Mesa/Makefile.in vendored
View File

@ -103,8 +103,8 @@ subdir = .
DIST_COMMON = $(srcdir)/Makefile.in $(srcdir)/Makefile.am \
$(top_srcdir)/configure $(am__configure_deps) \
$(top_srcdir)/src/gbm/main/gbm.pc.in bin/ar-lib bin/compile \
bin/config.guess bin/config.sub bin/depcomp bin/install-sh \
bin/missing bin/ltmain.sh $(top_srcdir)/bin/ar-lib \
bin/config.guess bin/config.sub bin/install-sh bin/missing \
bin/ltmain.sh $(top_srcdir)/bin/ar-lib \
$(top_srcdir)/bin/compile $(top_srcdir)/bin/config.guess \
$(top_srcdir)/bin/config.sub $(top_srcdir)/bin/install-sh \
$(top_srcdir)/bin/ltmain.sh $(top_srcdir)/bin/missing
@ -993,9 +993,8 @@ doxygen:
parsers: configure
$(MAKE) -C src/glsl glsl_parser.cpp glsl_parser.h glsl_lexer.cpp glcpp/glcpp-lex.c glcpp/glcpp-parse.c glcpp/glcpp-parse.h
$(MAKE) -C src/mesa program/lex.yy.c program/program_parse.tab.c program/program_parse.tab.h
tarballs: md5
tarballs: checksums
rm -f ../$(PACKAGE_DIR) $(PACKAGE_NAME).tar
manifest.txt: .git
@ -1022,10 +1021,10 @@ $(PACKAGE_NAME).zip: parsers ../$(PACKAGE_DIR) manifest.txt
zip -q -@ $(PACKAGE_NAME).zip < $(PACKAGE_DIR)/manifest.txt ; \
mv $(PACKAGE_NAME).zip $(PACKAGE_DIR)
md5: $(ARCHIVES)
@-md5sum $(PACKAGE_NAME).tar.gz
@-md5sum $(PACKAGE_NAME).tar.bz2
@-md5sum $(PACKAGE_NAME).zip
checksums: $(ARCHIVES)
@-sha256sum $(PACKAGE_NAME).tar.gz
@-sha256sum $(PACKAGE_NAME).tar.bz2
@-sha256sum $(PACKAGE_NAME).zip
.PHONY: tarballs md5

2
dist/Mesa/VERSION vendored
View File

@ -1 +1 @@
10.2.3
10.2.7

3
dist/Mesa/aclocal.m4 vendored
View File

@ -868,8 +868,7 @@ to "yes", and re-run configure.
END
AC_MSG_ERROR([Your 'rm' program is bad, sorry.])
fi
fi
])
fi])
dnl Hook into '_AC_COMPILER_EXEEXT' early to learn its expansion. Do not
dnl add the conditional right here, as _AC_COMPILER_EXEEXT may be further

2
dist/Mesa/bin/get-pick-list.sh vendored
View File

@ -14,7 +14,7 @@ git log --reverse --grep="cherry picked from commit" origin/master..HEAD |\
sed -e 's/^[[:space:]]*(cherry picked from commit[[:space:]]*//' -e 's/)//' > already_picked
# Grep for commits that were marked as a candidate for the stable tree.
git log --reverse --pretty=%H -i --grep='^\([[:space:]]*NOTE: .*[Cc]andidate\|CC:.*mesa-stable\)' HEAD..origin/master |\
git log --reverse --pretty=%H -i --grep='^\([[:space:]]*NOTE: .*[Cc]andidate\|CC:.*10\.2.*mesa-stable\)' HEAD..origin/master |\
while read sha
do
# Check to see whether the patch is on the ignore list.

32
dist/Mesa/bin/ltmain.sh vendored
View File

@ -70,7 +70,7 @@
# compiler: $LTCC
# compiler flags: $LTCFLAGS
# linker: $LD (gnu? $with_gnu_ld)
# $progname: (GNU libtool) 2.4.2 Debian-2.4.2-1.7
# $progname: (GNU libtool) 2.4.2
# automake: $automake_version
# autoconf: $autoconf_version
#
@ -80,7 +80,7 @@
PROGRAM=libtool
PACKAGE=libtool
VERSION="2.4.2 Debian-2.4.2-1.7"
VERSION=2.4.2
TIMESTAMP=""
package_revision=1.3337
@ -6124,10 +6124,7 @@ func_mode_link ()
case $pass in
dlopen) libs="$dlfiles" ;;
dlpreopen) libs="$dlprefiles" ;;
link)
libs="$deplibs %DEPLIBS%"
test "X$link_all_deplibs" != Xno && libs="$libs $dependency_libs"
;;
link) libs="$deplibs %DEPLIBS% $dependency_libs" ;;
esac
fi
if test "$linkmode,$pass" = "lib,dlpreopen"; then
@ -6447,19 +6444,19 @@ func_mode_link ()
# It is a libtool convenience library, so add in its objects.
func_append convenience " $ladir/$objdir/$old_library"
func_append old_convenience " $ladir/$objdir/$old_library"
tmp_libs=
for deplib in $dependency_libs; do
deplibs="$deplib $deplibs"
if $opt_preserve_dup_deps ; then
case "$tmp_libs " in
*" $deplib "*) func_append specialdeplibs " $deplib" ;;
esac
fi
func_append tmp_libs " $deplib"
done
elif test "$linkmode" != prog && test "$linkmode" != lib; then
func_fatal_error "\`$lib' is not a convenience library"
fi
tmp_libs=
for deplib in $dependency_libs; do
deplibs="$deplib $deplibs"
if $opt_preserve_dup_deps ; then
case "$tmp_libs " in
*" $deplib "*) func_append specialdeplibs " $deplib" ;;
esac
fi
func_append tmp_libs " $deplib"
done
continue
fi # $pass = conv
@ -7352,9 +7349,6 @@ func_mode_link ()
revision="$number_minor"
lt_irix_increment=no
;;
*)
func_fatal_configuration "$modename: unknown library version type \`$version_type'"
;;
esac
;;
no)

136
dist/Mesa/configure vendored
View File

@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.69 for Mesa 10.2.3.
# Generated by GNU Autoconf 2.69 for Mesa 10.2.7.
#
# Report bugs to <https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa>.
#
@ -591,8 +591,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='Mesa'
PACKAGE_TARNAME='mesa'
PACKAGE_VERSION='10.2.3'
PACKAGE_STRING='Mesa 10.2.3'
PACKAGE_VERSION='10.2.7'
PACKAGE_STRING='Mesa 10.2.7'
PACKAGE_BUGREPORT='https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa'
PACKAGE_URL=''
@ -1706,7 +1706,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures Mesa 10.2.3 to adapt to many kinds of systems.
\`configure' configures Mesa 10.2.7 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@ -1777,7 +1777,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of Mesa 10.2.3:";;
short | recursive ) echo "Configuration of Mesa 10.2.7:";;
esac
cat <<\_ACEOF
@ -2062,7 +2062,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
Mesa configure 10.2.3
Mesa configure 10.2.7
generated by GNU Autoconf 2.69
Copyright (C) 2012 Free Software Foundation, Inc.
@ -2735,7 +2735,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
It was created by Mesa $as_me 10.2.3, which was
It was created by Mesa $as_me 10.2.7, which was
generated by GNU Autoconf 2.69. Invocation command line was
$ $0 $@
@ -3710,7 +3710,7 @@ fi
# Define the identity of the package.
PACKAGE='mesa'
VERSION='10.2.3'
VERSION='10.2.7'
cat >>confdefs.h <<_ACEOF
@ -3803,7 +3803,6 @@ END
fi
fi
# Support silent build rules, requires at least automake-1.11. Disable
# by either passing --disable-silent-rules to configure or passing V=1
# to make
@ -7433,8 +7432,7 @@ else
;;
*)
lt_cv_sys_max_cmd_len=`(getconf ARG_MAX) 2> /dev/null`
if test -n "$lt_cv_sys_max_cmd_len" && \
test undefined != "$lt_cv_sys_max_cmd_len"; then
if test -n "$lt_cv_sys_max_cmd_len"; then
lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4`
lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3`
else
@ -7835,6 +7833,10 @@ freebsd* | dragonfly*)
fi
;;
gnu*)
lt_cv_deplibs_check_method=pass_all
;;
haiku*)
lt_cv_deplibs_check_method=pass_all
;;
@ -7873,11 +7875,11 @@ irix5* | irix6* | nonstopux*)
;;
# This must be glibc/ELF.
linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*)
linux* | k*bsd*-gnu | kopensolaris*-gnu)
lt_cv_deplibs_check_method=pass_all
;;
netbsd* | netbsdelf*-gnu)
netbsd*)
if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then
lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$'
else
@ -8954,7 +8956,7 @@ ia64-*-hpux*)
rm -rf conftest*
;;
x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \
x86_64-*kfreebsd*-gnu|x86_64-*linux*|ppc*-*linux*|powerpc*-*linux*| \
s390*-*linux*|s390*-*tpf*|sparc*-*linux*)
# Find out which ABI we are using.
echo 'int i;' > conftest.$ac_ext
@ -8970,19 +8972,9 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*)
LD="${LD-ld} -m elf_i386_fbsd"
;;
x86_64-*linux*)
case `/usr/bin/file conftest.o` in
*x86-64*)
LD="${LD-ld} -m elf32_x86_64"
;;
*)
LD="${LD-ld} -m elf_i386"
;;
esac
LD="${LD-ld} -m elf_i386"
;;
powerpc64le-*)
LD="${LD-ld} -m elf32lppclinux"
;;
powerpc64-*)
ppc64-*linux*|powerpc64-*linux*)
LD="${LD-ld} -m elf32ppclinux"
;;
s390x-*linux*)
@ -9001,10 +8993,7 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*)
x86_64-*linux*)
LD="${LD-ld} -m elf_x86_64"
;;
powerpcle-*)
LD="${LD-ld} -m elf64lppc"
;;
powerpc-*)
ppc*-*linux*|powerpc*-*linux*)
LD="${LD-ld} -m elf64ppc"
;;
s390*-*linux*|s390*-*tpf*)
@ -10685,7 +10674,7 @@ lt_prog_compiler_static=
lt_prog_compiler_static='-non_shared'
;;
linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*)
linux* | k*bsd*-gnu | kopensolaris*-gnu)
case $cc_basename in
# old Intel for x86_64 which still supported -KPIC.
ecc*)
@ -11163,9 +11152,6 @@ $as_echo_n "checking whether the $compiler linker ($LD) supports shared librarie
openbsd*)
with_gnu_ld=no
;;
linux* | k*bsd*-gnu | gnu*)
link_all_deplibs=no
;;
esac
ld_shlibs=yes
@ -11387,7 +11373,7 @@ _LT_EOF
fi
;;
netbsd* | netbsdelf*-gnu)
netbsd*)
if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then
archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib'
wlarc=
@ -11564,7 +11550,6 @@ _LT_EOF
if test "$aix_use_runtimelinking" = yes; then
shared_flag="$shared_flag "'${wl}-G'
fi
link_all_deplibs=no
else
# not using gcc
if test "$host_cpu" = ia64; then
@ -12018,7 +12003,7 @@ $as_echo "$lt_cv_irix_exported_symbol" >&6; }
link_all_deplibs=yes
;;
netbsd* | netbsdelf*-gnu)
netbsd*)
if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then
archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' # a.out
else
@ -12855,6 +12840,17 @@ freebsd* | dragonfly*)
esac
;;
gnu*)
version_type=linux # correct to gnu/linux during the next big refactor
need_lib_prefix=no
need_version=no
library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}${major} ${libname}${shared_ext}'
soname_spec='${libname}${release}${shared_ext}$major'
shlibpath_var=LD_LIBRARY_PATH
shlibpath_overrides_runpath=no
hardcode_into_libs=yes
;;
haiku*)
version_type=linux # correct to gnu/linux during the next big refactor
need_lib_prefix=no
@ -12971,7 +12967,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be glibc/ELF.
linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*)
linux* | k*bsd*-gnu | kopensolaris*-gnu)
version_type=linux # correct to gnu/linux during the next big refactor
need_lib_prefix=no
need_version=no
@ -13035,18 +13031,6 @@ fi
dynamic_linker='GNU/Linux ld.so'
;;
netbsdelf*-gnu)
version_type=linux
need_lib_prefix=no
need_version=no
library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}'
soname_spec='${libname}${release}${shared_ext}$major'
shlibpath_var=LD_LIBRARY_PATH
shlibpath_overrides_runpath=no
hardcode_into_libs=yes
dynamic_linker='NetBSD ld.elf_so'
;;
netbsd*)
version_type=sunos
need_lib_prefix=no
@ -14794,6 +14778,9 @@ fi
ld_shlibs_CXX=yes
;;
gnu*)
;;
haiku*)
archive_cmds_CXX='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
link_all_deplibs_CXX=yes
@ -14955,7 +14942,7 @@ fi
inherit_rpath_CXX=yes
;;
linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*)
linux* | k*bsd*-gnu | kopensolaris*-gnu)
case $cc_basename in
KCC*)
# Kuck and Associates, Inc. (KAI) C++ Compiler
@ -15815,7 +15802,7 @@ lt_prog_compiler_static_CXX=
;;
esac
;;
linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*)
linux* | k*bsd*-gnu | kopensolaris*-gnu)
case $cc_basename in
KCC*)
# KAI C++ Compiler
@ -15879,7 +15866,7 @@ lt_prog_compiler_static_CXX=
;;
esac
;;
netbsd* | netbsdelf*-gnu)
netbsd*)
;;
*qnx* | *nto*)
# QNX uses GNU C++, but need to define -shared option too, otherwise
@ -16250,9 +16237,6 @@ $as_echo_n "checking whether the $compiler linker ($LD) supports shared librarie
;;
esac
;;
linux* | k*bsd*-gnu | gnu*)
link_all_deplibs_CXX=no
;;
*)
export_symbols_cmds_CXX='$NM $libobjs $convenience | $global_symbol_pipe | $SED '\''s/.* //'\'' | sort | uniq > $export_symbols'
;;
@ -16687,6 +16671,17 @@ freebsd* | dragonfly*)
esac
;;
gnu*)
version_type=linux # correct to gnu/linux during the next big refactor
need_lib_prefix=no
need_version=no
library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}${major} ${libname}${shared_ext}'
soname_spec='${libname}${release}${shared_ext}$major'
shlibpath_var=LD_LIBRARY_PATH
shlibpath_overrides_runpath=no
hardcode_into_libs=yes
;;
haiku*)
version_type=linux # correct to gnu/linux during the next big refactor
need_lib_prefix=no
@ -16803,7 +16798,7 @@ linux*oldld* | linux*aout* | linux*coff*)
;;
# This must be glibc/ELF.
linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*)
linux* | k*bsd*-gnu | kopensolaris*-gnu)
version_type=linux # correct to gnu/linux during the next big refactor
need_lib_prefix=no
need_version=no
@ -16867,18 +16862,6 @@ fi
dynamic_linker='GNU/Linux ld.so'
;;
netbsdelf*-gnu)
version_type=linux
need_lib_prefix=no
need_version=no
library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}'
soname_spec='${libname}${release}${shared_ext}$major'
shlibpath_var=LD_LIBRARY_PATH
shlibpath_overrides_runpath=no
hardcode_into_libs=yes
dynamic_linker='NetBSD ld.elf_so'
;;
netbsd*)
version_type=sunos
need_lib_prefix=no
@ -18402,8 +18385,8 @@ fi
save_LDFLAGS="$LDFLAGS"
LDFLAGS="$LDFLAGS $DLOPEN_LIBS"
save_LIBS="$LIBS"
LIBS="$LIBS $DLOPEN_LIBS"
for ac_func in dladdr
do :
ac_fn_c_check_func "$LINENO" "dladdr" "ac_cv_func_dladdr"
@ -18415,7 +18398,7 @@ _ACEOF
fi
done
LDFLAGS="$save_LDFLAGS"
LIBS="$save_LIBS"
case "$host_os" in
darwin*|mingw*)
@ -21212,6 +21195,10 @@ if test "x$enable_gallium_gbm" = xyes; then
as_fn_error $? "gbm_gallium requires --enable-dri to build" "$LINENO" 5
fi
if test "x$enable_gallium_egl" != xyes; then
as_fn_error $? "gbm_gallium is only used by egl_gallium" "$LINENO" 5
fi
GALLIUM_STATE_TRACKERS_DIRS="gbm $GALLIUM_STATE_TRACKERS_DIRS"
GALLIUM_TARGET_DIRS="$GALLIUM_TARGET_DIRS gbm"
enable_gallium_loader=yes
@ -22544,6 +22531,7 @@ gallium_check_st() {
gallium_require_llvm() {
if test "x$MESA_LLVM" = x0; then
case "$host" in *gnux32) return;; esac
case "$host_cpu" in
i*86|x86_64|amd64) as_fn_error $? "LLVM is required to build $1 on x86 and x86_64" "$LINENO" 5;;
esac
@ -24704,7 +24692,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by Mesa $as_me 10.2.3, which was
This file was extended by Mesa $as_me 10.2.7, which was
generated by GNU Autoconf 2.69. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@ -24761,7 +24749,7 @@ _ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`"
ac_cs_version="\\
Mesa config.status 10.2.3
Mesa config.status 10.2.7
configured by $0, generated by GNU Autoconf 2.69,
with options \\"\$ac_cs_config\\"

3
dist/Mesa/docs/relnotes/10.2.3.html vendored
View File

@ -31,6 +31,9 @@ because compatibility contexts are not supported.
<h2>SHA256 checksums</h2>
<pre>
e482a96170c98b17d6aba0d6e4dda4b9a2e61c39587bb64ac38cadfa4aba4aeb MesaLib-10.2.3.tar.bz2
96cffacaa1c52ae659b3b0f91be2eebf5528b748934256751261fb79ea3d6636 MesaLib-10.2.3.tar.gz
82cab6ff14c8038ee39842dbdea0d447a78d119efd8d702d1497bc7c246434e9 MesaLib-10.2.3.zip
</pre>

127
dist/Mesa/docs/relnotes/10.2.4.html vendored Normal file
View File

@ -0,0 +1,127 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.2.4 Release Notes / July 18, 2014</h1>
<p>
Mesa 10.2.4 is a bug fix release which fixes bugs found since the 10.2.3 release.
</p>
<p>
Mesa 10.2.4 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
06a2341244eb85c283f59f70161e06ded106f835ed9b6be1ef0243bd9344811a MesaLib-10.2.4.tar.bz2
33e3c8b4343503e7d7d17416c670438860a2fd99ec93ea3327f73c3abe33b5e4 MesaLib-10.2.4.tar.gz
e26791a4a62a61b82e506e6ba031812d09697d1a831e8239af67e5722a8ee538 MesaLib-10.2.4.zip
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=81157">Bug 81157</a> - [BDW]Piglit some spec_glsl-1.50_execution_built-in-functions* cases fail</li>
</ul>
<h2>Changes</h2>
<p>Abdiel Janulgue (3):</p>
<ul>
<li>i965/fs: Refactor check for potential copy propagated instructions.</li>
<li>i965/fs: skip copy-propate for logical instructions with negated src entries</li>
<li>i965/vec4: skip copy-propate for logical instructions with negated src entries</li>
</ul>
<p>Brian Paul (3):</p>
<ul>
<li>mesa: fix geometry shader memory leaks</li>
<li>st/mesa: fix geometry shader memory leak</li>
<li>gallium/u_blitter: fix some shader memory leaks</li>
</ul>
<p>Carl Worth (2):</p>
<ul>
<li>docs: Add sha256 checksums for the 10.2.3 release</li>
<li>Update VERSION to 10.2.4</li>
</ul>
<p>Eric Anholt (1):</p>
<ul>
<li>i965: Generalize the pixel_x/y workaround for all UW types.</li>
</ul>
<p>Ilia Mirkin (4):</p>
<ul>
<li>nv50/ir: retrieve shadow compare from first arg</li>
<li>nv50/ir: ignore bias for samplerCubeShadow on nv50</li>
<li>nvc0/ir: do quadops on the right texture coordinates for TXD</li>
<li>nvc0/ir: use manual TXD when offsets are involved</li>
</ul>
<p>Jordan Justen (1):</p>
<ul>
<li>i965: Add auxiliary surface field #defines for Broadwell.</li>
</ul>
<p>Kenneth Graunke (9):</p>
<ul>
<li>i965: Don't copy propagate abs into Broadwell logic instructions.</li>
<li>i965: Set execution size to 8 for instructions with force_sechalf set.</li>
<li>i965/fs: Set force_uncompressed and force_sechalf on samplepos setup.</li>
<li>i965/fs: Use WE_all for gl_SampleID header register munging.</li>
<li>i965: Add plumbing for Broadwell's auxiliary surface support.</li>
<li>i965: Drop SINT workaround for CMS layout on Broadwell.</li>
<li>i965: Hook up the MCS buffers in SURFACE_STATE on Broadwell.</li>
<li>i965: Add 2x MSAA support to the MCS allocation function.</li>
<li>i965: Enable compressed multisample support (CMS) on Broadwell.</li>
</ul>
<p>Marek Olšák (4):</p>
<ul>
<li>gallium: fix u_default_transfer_inline_write for textures</li>
<li>st/mesa: fix samplerCubeShadow with bias</li>
<li>radeonsi: fix samplerCubeShadow with bias</li>
<li>radeonsi: add support for TXB2</li>
</ul>
<p>Matt Turner (8):</p>
<ul>
<li>i965/vec4: Don't return void from a void function.</li>
<li>i965/vec4: Don't fix_math_operand() on Gen &gt;= 8.</li>
<li>i965/fs: Don't fix_math_operand() on Gen &gt;= 8.</li>
<li>i965/fs: Make try_constant_propagate() static.</li>
<li>i965/fs: Constant propagate into 2-src math instructions on Gen8.</li>
<li>i965/vec4: Constant propagate into 2-src math instructions on Gen8.</li>
<li>i965/fs: Don't use brw_imm_* unnecessarily.</li>
<li>i965/fs: Set correct number of regs_written for MCS fetches.</li>
</ul>
</div>
</body>
</html>

188
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@ -0,0 +1,188 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.2.5 Release Notes / August 2, 2014</h1>
<p>
Mesa 10.2.5 is a bug fix release which fixes bugs found since the 10.2.4 release.
</p>
<p>
Mesa 10.2.5 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
b4459f0bf7f4a3c8fb78ece3c9d2eac3d0e5bf38cb470f2a72705e744bd0310d MesaLib-10.2.5.tar.bz2
7b4dd0cb683f8c7dc48a3e7a315742bed58ddcd7b756c462aca4177bd1acdc79 MesaLib-10.2.5.tar.gz
6180565914fb238dd77ccdaff96b6155d9a6e1b3e981ebbf6a6851301b384fed MesaLib-10.2.5.zip
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=80991">Bug 80991</a> - [BDW]Piglit spec_ARB_sample_shading_builtin-gl-sample-mask_2 fails</li>
</ul>
<h2>Changes</h2>
<p>Abdiel Janulgue (3):</p>
<ul>
<li>i965/fs: Refactor check for potential copy propagated instructions.</li>
<li>i965/fs: skip copy-propate for logical instructions with negated src entries</li>
<li>i965/vec4: skip copy-propate for logical instructions with negated src entries</li>
</ul>
<p>Adel Gadllah (1):</p>
<ul>
<li>i915: Fix up intelInitScreen2 for DRI3</li>
</ul>
<p>Anuj Phogat (2):</p>
<ul>
<li>i965: Fix z_offset computation in intel_miptree_unmap_depthstencil()</li>
<li>mesa: Don't use memcpy() in _mesa_texstore() for float depth texture data</li>
</ul>
<p>Brian Paul (3):</p>
<ul>
<li>mesa: fix geometry shader memory leaks</li>
<li>st/mesa: fix geometry shader memory leak</li>
<li>gallium/u_blitter: fix some shader memory leaks</li>
</ul>
<p>Carl Worth (6):</p>
<ul>
<li>docs: Add sha256 checksums for the 10.2.3 release</li>
<li>Update VERSION to 10.2.4</li>
<li>Add release notes for 10.2.4</li>
<li>docs: Add SHA256 checksums for the 10.2.4 release</li>
<li>cherry-ignore: Ignore a few patches picked in the previous stable release</li>
<li>Update version to 10.2.5</li>
</ul>
<p>Christian König (1):</p>
<ul>
<li>radeonsi: fix order of r600_need_dma_space and r600_context_bo_reloc</li>
</ul>
<p>Eric Anholt (1):</p>
<ul>
<li>i965: Generalize the pixel_x/y workaround for all UW types.</li>
</ul>
<p>Ian Romanick (2):</p>
<ul>
<li>mesa: Don't allow GL_TEXTURE_BORDER queries outside compat profile</li>
<li>mesa: Don't allow GL_TEXTURE_{LUMINANCE,INTENSITY}_* queries outside compat profile</li>
</ul>
<p>Ilia Mirkin (5):</p>
<ul>
<li>nv50/ir: retrieve shadow compare from first arg</li>
<li>nv50/ir: ignore bias for samplerCubeShadow on nv50</li>
<li>nvc0/ir: do quadops on the right texture coordinates for TXD</li>
<li>nvc0/ir: use manual TXD when offsets are involved</li>
<li>nvc0: make sure that the local memory allocation is aligned to 0x10</li>
</ul>
<p>Jason Ekstrand (2):</p>
<ul>
<li>main/format_pack: Fix a wrong datatype in pack_ubyte_R8G8_UNORM</li>
<li>main/get_hash_params: Add GL_SAMPLE_SHADING_ARB</li>
</ul>
<p>Jordan Justen (1):</p>
<ul>
<li>i965: Add auxiliary surface field #defines for Broadwell.</li>
</ul>
<p>José Fonseca (1):</p>
<ul>
<li>st/wgl: Clamp wglChoosePixelFormatARB's output nNumFormats to nMaxFormats.</li>
</ul>
<p>Kenneth Graunke (13):</p>
<ul>
<li>i965: Don't copy propagate abs into Broadwell logic instructions.</li>
<li>i965: Set execution size to 8 for instructions with force_sechalf set.</li>
<li>i965/fs: Set force_uncompressed and force_sechalf on samplepos setup.</li>
<li>i965/fs: Use WE_all for gl_SampleID header register munging.</li>
<li>i965: Add plumbing for Broadwell's auxiliary surface support.</li>
<li>i965: Drop SINT workaround for CMS layout on Broadwell.</li>
<li>i965: Hook up the MCS buffers in SURFACE_STATE on Broadwell.</li>
<li>i965: Add 2x MSAA support to the MCS allocation function.</li>
<li>i965: Enable compressed multisample support (CMS) on Broadwell.</li>
<li>i965: Add missing persample_shading field to brw_wm_debug_recompile.</li>
<li>i965/fs: Fix gl_SampleID for 2x MSAA and SIMD16 mode.</li>
<li>i965/fs: Fix gl_SampleMask handling for SIMD16 on Gen8+.</li>
<li>i965/fs: Set LastRT on the final FB write on Broadwell.</li>
</ul>
<p>Marek Olšák (14):</p>
<ul>
<li>gallium: fix u_default_transfer_inline_write for textures</li>
<li>st/mesa: fix samplerCubeShadow with bias</li>
<li>radeonsi: fix samplerCubeShadow with bias</li>
<li>radeonsi: add support for TXB2</li>
<li>r600g: switch SNORM conversion to DX and GLES behavior</li>
<li>radeonsi: fix CMASK and HTILE calculations for Hawaii</li>
<li>gallium/util: add a helper for calculating primitive count from vertex count</li>
<li>radeonsi: fix a hang with instancing on Hawaii</li>
<li>radeonsi: fix a hang with streamout on Hawaii</li>
<li>winsys/radeon: fix vram_size overflow with Hawaii</li>
<li>radeonsi: fix occlusion queries on Hawaii</li>
<li>r600g,radeonsi: switch all occurences of array_size to util_max_layer</li>
<li>radeonsi: fix build because of lack of draw_indirect infrastructure in 10.2</li>
<li>radeonsi: use DRAW_PREAMBLE on CIK</li>
</ul>
<p>Matt Turner (8):</p>
<ul>
<li>i965/vec4: Don't return void from a void function.</li>
<li>i965/vec4: Don't fix_math_operand() on Gen &gt;= 8.</li>
<li>i965/fs: Don't fix_math_operand() on Gen &gt;= 8.</li>
<li>i965/fs: Make try_constant_propagate() static.</li>
<li>i965/fs: Constant propagate into 2-src math instructions on Gen8.</li>
<li>i965/vec4: Constant propagate into 2-src math instructions on Gen8.</li>
<li>i965/fs: Don't use brw_imm_* unnecessarily.</li>
<li>i965/fs: Set correct number of regs_written for MCS fetches.</li>
</ul>
<p>Thorsten Glaser (1):</p>
<ul>
<li>nv50: fix build failure on m68k due to invalid struct alignment assumptions</li>
</ul>
<p>Tom Stellard (1):</p>
<ul>
<li>clover: Call end_query before getting timestamp result v2</li>
</ul>
</div>
</body>
</html>

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@ -0,0 +1,118 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.2.6 Release Notes / August 19, 2014</h1>
<p>
Mesa 10.2.6 is a bug fix release which fixes bugs found since the 10.2.5 release.
</p>
<p>
Mesa 10.2.6 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
193314d2adba98e43697d726739ac46b4299aae324fa1821aa226890c28ac806 MesaLib-10.2.6.tar.bz2
f7a45a5977b485eb95ac024205c584a0c112fe3951c2313c797579bb16a7a448 MesaLib-10.2.6.tar.gz
6d086d6fcda8f317adfaaae40011decf2f2e2dc80819c4a7a77c76f73512e8d8 MesaLib-10.2.6.zip
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=81450">Bug 81450</a> - [BDW]Piglit spec_glsl-1.30_execution_tex-miplevel-selection_textureGrad_1DArray cases intel_do_flush_locked failed</li>
</ul>
<h2>Changes</h2>
<p>Anuj Phogat (15):</p>
<ul>
<li>mesa: Fix error condition for valid texture targets in glTexStorage* functions</li>
<li>mesa: Turn target_can_be_compressed() in to a utility function</li>
<li>mesa: Add error condition for using compressed internalformat in glTexStorage3D()</li>
<li>mesa: Fix condition for using compressed internalformat in glCompressedTexImage3D()</li>
<li>mesa: Add utility function _mesa_is_enum_format_snorm()</li>
<li>mesa: Don't allow snorm internal formats in glCopyTexImage*() in GLES3</li>
<li>mesa: Add a helper function _mesa_is_enum_format_unsized()</li>
<li>mesa: Add a gles3 error condition for sized internalformat in glCopyTexImage*()</li>
<li>mesa: Add gles3 error condition for GL_RGBA10_A2 buffer format in glCopyTexImage*()</li>
<li>mesa: Add utility function _mesa_is_enum_format_unorm()</li>
<li>mesa: Add gles3 condition for normalized internal formats in glCopyTexImage*()</li>
<li>mesa: Allow GL_TEXTURE_CUBE_MAP target with compressed internal formats</li>
<li>meta: Use _mesa_get_format_bits() to get the GL_RED_BITS</li>
<li>egl: Fix OpenGL ES version checks in _eglParseContextAttribList()</li>
<li>meta: Fix datatype computation in get_temp_image_type()</li>
</ul>
<p>Brian Paul (1):</p>
<ul>
<li>mesa: fix assertion in _mesa_drawbuffers()</li>
</ul>
<p>Carl Worth (2):</p>
<ul>
<li>docs: Add sha256 sums to the 10.2.5 release notes</li>
<li>Update VERSION to 10.2.6</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>mesa/st: only convert AND(a, NOT(b)) into MAD when not using native integers</li>
</ul>
<p>Jordan Justen (1):</p>
<ul>
<li>i965/miptree: Layout 1D Array as 2D Array with height of 1</li>
</ul>
<p>Maarten Lankhorst (1):</p>
<ul>
<li>configure.ac: Do not require llvm on x32</li>
</ul>
<p>Marek Olšák (4):</p>
<ul>
<li>st/mesa: fix blit-based partial TexSubImage for 1D arrays</li>
<li>radeon,r200: fix buffer validation after CS flush</li>
<li>radeonsi: fix a hang with instancing in Unigine Heaven/Valley on Hawaii</li>
<li>radeonsi: fix CMASK and HTILE allocation on Tahiti</li>
</ul>
<p>Pali Rohár (1):</p>
<ul>
<li>configure: check for dladdr via AC_CHECK_FUNC/AC_CHECK_LIB</li>
</ul>
<p>Roland Scheidegger (1):</p>
<ul>
<li>gallivm: fix up out-of-bounds level when using conformant out-of-bound behavior</li>
</ul>
</div>
</body>
</html>

208
dist/Mesa/docs/relnotes/10.2.7.html vendored Normal file
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@ -0,0 +1,208 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 10.2.7 Release Notes / September 06, 2014</h1>
<p>
Mesa 10.2.7 is a bug fix release which fixes bugs found since the 10.2.6 release.
</p>
<p>
Mesa 10.2.7 implements the OpenGL 3.3 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 3.3. OpenGL
3.3 is <strong>only</strong> available if requested at context creation
because compatibility contexts are not supported.
</p>
<h2>SHA256 checksums</h2>
<pre>
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<p>This list is likely incomplete.</p>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=36193">Bug 36193</a> - [i965] brw_eu_emit.c:182: validate_reg: Assertion `execsize &gt;= width' failed.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=66184">Bug 66184</a> - src/mesa/state_tracker/st_glsl_to_tgsi.cpp:3216:simplify_cmp: Assertion `inst-&gt;dst.index &lt; 4096' failed.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=70441">Bug 70441</a> - [Gen4-5 clip] Piglit spec_OpenGL_1.1_polygon-offset hits (execsize &gt;= width) assertion</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=76188">Bug 76188</a> - EGL_EXT_image_dma_buf_import fd ownership is incorrect</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=76789">Bug 76789</a> - [radeonsi] si_descriptors.c requires -std=gnu99 or -fms-extensions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82139">Bug 82139</a> - [r600g, bisected] multiple ubo piglit regressions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82255">Bug 82255</a> - [VP2] Chroma planes are vertically stretched during VDPAU playback</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82671">Bug 82671</a> - [r600g-evergreen][compute]Empty kernel execution causes crash</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82709">Bug 82709</a> - OpenCL not working on radeon hainan</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=82814">Bug 82814</a> - glDrawBuffers(0, NULL) segfaults in _mesa_drawbuffers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83079">Bug 83079</a> - [NVC0] Dota 2 (Linux native and Wine) crash with Nouveau Drivers</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=83355">Bug 83355</a> - FTBFS: src/mesa/program/program_lexer.l:122:64: error: unknown type name 'YYSTYPE'</li>
</ul>
<h2>Changes</h2>
<p>Adam Jackson (1):</p>
<ul>
<li>radeonsi: Don't use anonymous struct trick in atom tracking</li>
</ul>
<p>Alex Deucher (2):</p>
<ul>
<li>radeonsi: add new CIK pci ids</li>
<li>radeonsi: add new SI pci ids</li>
</ul>
<p>Andreas Boll (1):</p>
<ul>
<li>winsys/radeon: fix nop packet padding for hawaii</li>
</ul>
<p>Anuj Phogat (1):</p>
<ul>
<li>i965: Bail on vec4 copy propagation for scratch writes with source modifiers</li>
</ul>
<p>Brian Paul (1):</p>
<ul>
<li>mesa: fix NULL pointer deref bug in _mesa_drawbuffers()</li>
</ul>
<p>Carl Worth (2):</p>
<ul>
<li>docs: Add sha256 sums for the 10.2.6 release</li>
<li>Makefile: Switch from md5sums to sha256sums</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>i965: add missing parens in vec4 visitor</li>
</ul>
<p>Emil Velikov (17):</p>
<ul>
<li>configure.ac: bail out if building gallium_gbm without gallium_egl</li>
<li>android: gallium/nouveau: fix include folders, link against libstlport</li>
<li>android: egl/main: fixup the nouveau build</li>
<li>automake: gallium/freedreno: drop spurious include dirs</li>
<li>android: gallium/freedreno: add preliminary build</li>
<li>android: egl/main: add/enable freedreno</li>
<li>android: gallium/auxiliary: drop log2/log2f redefitions</li>
<li>android: drop HAL_PIXEL_FORMAT_RGBA_{5551,4444}</li>
<li>android: glsl: the stlport over the limited Android STL</li>
<li>android: dri/i915: do not build an 'empty' driver</li>
<li>cherry-ignore: remove patch that lacking previous dependencies</li>
<li>cherry-ignore: PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE is not it 10.2</li>
<li>cherry-ignore: drop whitespace fix</li>
<li>cherry-ignore: reject a15088338eb</li>
<li>get-pick-list.sh: Require explicit "10.2" for nominating stable patches</li>
<li>mesa: fix make tarballs</li>
<li>Update VERSION to 10.2.7</li>
</ul>
<p>Ian Romanick (1):</p>
<ul>
<li>mesa: Handle uninitialized textures like other textures in get_tex_level_parameter_image</li>
</ul>
<p>Ilia Mirkin (9):</p>
<ul>
<li>nouveau: make sure to invalidate any vbo state as well</li>
<li>nouveau: don't keep stale pointer to free'd data</li>
<li>nvc0/ir: avoid infinite recursion when finding first uses of tex</li>
<li>nv50: zero out unbound samplers</li>
<li>nvc0: don't make 1d staging textures linear</li>
<li>nv50/ir: avoid creating instructions that can't be emitted</li>
<li>nv50: set the miptree address when clearing bo's in vp2 init</li>
<li>nv50: mt address may not be the underlying bo's start address</li>
<li>nv50: attach the buffer bo to the miptree structures</li>
</ul>
<p>Jan Vesely (1):</p>
<ul>
<li>gallivm: Fix build with latest LLVM</li>
</ul>
<p>José Fonseca (1):</p>
<ul>
<li>mesa: Move declaration to top of block.</li>
</ul>
<p>Kenneth Graunke (3):</p>
<ul>
<li>i965/vec4: Set NoMask for GS_OPCODE_SET_VERTEX_COUNT on Gen8+.</li>
<li>i965/vec4: Respect ir-&gt;force_writemask_all in Gen8 code generation.</li>
<li>i965/clip: Fix brw_clip_unfilled.c/compute_offset's assembly.</li>
</ul>
<p>Marek Olšák (3):</p>
<ul>
<li>r600g: fix constant buffer fetches</li>
<li>radeonsi: save scissor state and sample mask for u_blitter</li>
<li>glsl_to_tgsi: allocate and enlarge arrays for temporaries on demand</li>
</ul>
<p>Paulo Sergio Travaglia (2):</p>
<ul>
<li>android: gallium/radeon: attempt to fix the android build</li>
<li>android: egl/main: resolve radeon linking issues</li>
</ul>
<p>Pekka Paalanen (1):</p>
<ul>
<li>egl_dri2: fix EXT_image_dma_buf_import fds</li>
</ul>
<p>Robert Bragg (1):</p>
<ul>
<li>meta: save and restore swizzle for _GenerateMipmap</li>
</ul>
<p>Tom Stellard (7):</p>
<ul>
<li>radeon/compute: Fix reported values for MAX_GLOBAL_SIZE and MAX_MEM_ALLOC_SIZE</li>
<li>radeonsi/compute: Update reference counts for buffers in si_set_global_binding()</li>
<li>radeonsi/compute: Call si_pm4_free_state() after emitting compute state</li>
<li>clover: Flush the command queue in clReleaseCommandQueue()</li>
<li>radeon: Add work-around for missing Hainan support in clang &lt; 3.6 v2</li>
<li>pipe-loader: Fix memory leak v2</li>
<li>r600g/compute: Don't initialize vertex_buffer_state masks to 0x2</li>
</ul>
<p>Vinson Lee (1):</p>
<ul>
<li>gallivm: Fix build with LLVM &gt;= 3.6 r215967.</li>
</ul>
</div>
</body>
</html>

7
dist/Mesa/include/pci_ids/radeonsi_pci_ids.h vendored
View File

@ -38,6 +38,7 @@ CHIPSET(0x6828, VERDE_6828, VERDE)
CHIPSET(0x6829, VERDE_6829, VERDE)
CHIPSET(0x682A, VERDE_682A, VERDE)
CHIPSET(0x682B, VERDE_682B, VERDE)
CHIPSET(0x682C, VERDE_682C, VERDE)
CHIPSET(0x682D, VERDE_682D, VERDE)
CHIPSET(0x682F, VERDE_682F, VERDE)
CHIPSET(0x6830, VERDE_6830, VERDE)
@ -54,8 +55,11 @@ CHIPSET(0x6600, OLAND_6600, OLAND)
CHIPSET(0x6601, OLAND_6601, OLAND)
CHIPSET(0x6602, OLAND_6602, OLAND)
CHIPSET(0x6603, OLAND_6603, OLAND)
CHIPSET(0x6604, OLAND_6604, OLAND)
CHIPSET(0x6605, OLAND_6605, OLAND)
CHIPSET(0x6606, OLAND_6606, OLAND)
CHIPSET(0x6607, OLAND_6607, OLAND)
CHIPSET(0x6608, OLAND_6608, OLAND)
CHIPSET(0x6610, OLAND_6610, OLAND)
CHIPSET(0x6611, OLAND_6611, OLAND)
CHIPSET(0x6613, OLAND_6613, OLAND)
@ -73,6 +77,8 @@ CHIPSET(0x666F, HAINAN_666F, HAINAN)
CHIPSET(0x6640, BONAIRE_6640, BONAIRE)
CHIPSET(0x6641, BONAIRE_6641, BONAIRE)
CHIPSET(0x6646, BONAIRE_6646, BONAIRE)
CHIPSET(0x6647, BONAIRE_6647, BONAIRE)
CHIPSET(0x6649, BONAIRE_6649, BONAIRE)
CHIPSET(0x6650, BONAIRE_6650, BONAIRE)
CHIPSET(0x6651, BONAIRE_6651, BONAIRE)
@ -132,6 +138,7 @@ CHIPSET(0x1313, KAVERI_1313, KAVERI)
CHIPSET(0x1315, KAVERI_1315, KAVERI)
CHIPSET(0x1316, KAVERI_1316, KAVERI)
CHIPSET(0x1317, KAVERI_1317, KAVERI)
CHIPSET(0x1318, KAVERI_1318, KAVERI)
CHIPSET(0x131B, KAVERI_131B, KAVERI)
CHIPSET(0x131C, KAVERI_131C, KAVERI)
CHIPSET(0x131D, KAVERI_131D, KAVERI)

4
dist/Mesa/src/egl/drivers/dri2/platform_android.c vendored
View File

@ -54,8 +54,6 @@ get_format_bpp(int native)
bpp = 3;
break;
case HAL_PIXEL_FORMAT_RGB_565:
case HAL_PIXEL_FORMAT_RGBA_5551:
case HAL_PIXEL_FORMAT_RGBA_4444:
bpp = 2;
break;
default:
@ -371,8 +369,6 @@ dri2_create_image_android_native_buffer(_EGLDisplay *disp, _EGLContext *ctx,
format = __DRI_IMAGE_FORMAT_XBGR8888;
break;
case HAL_PIXEL_FORMAT_RGB_888:
case HAL_PIXEL_FORMAT_RGBA_5551:
case HAL_PIXEL_FORMAT_RGBA_4444:
/* unsupported */
default:
_eglLog(_EGL_WARNING, "unsupported native buffer format 0x%x", buf->format);

27
dist/Mesa/src/egl/main/Android.mk vendored
View File

@ -95,6 +95,12 @@ gallium_DRIVERS :=
# swrast
gallium_DRIVERS += libmesa_pipe_softpipe libmesa_winsys_sw_android
# freedreno
ifneq ($(filter freedreno, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_winsys_freedreno libmesa_pipe_freedreno
LOCAL_SHARED_LIBRARIES += libdrm_freedreno
endif
# i915g
ifneq ($(filter i915g, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_winsys_i915 libmesa_pipe_i915
@ -109,28 +115,29 @@ endif
# nouveau
ifneq ($(filter nouveau, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += \
libmesa_winsys_nouveau \
libmesa_pipe_nvfx \
libmesa_pipe_nv50 \
libmesa_pipe_nvc0 \
libmesa_pipe_nouveau
gallium_DRIVERS += libmesa_winsys_nouveau libmesa_pipe_nouveau
LOCAL_SHARED_LIBRARIES += libdrm_nouveau
LOCAL_SHARED_LIBRARIES += libstlport
endif
# r300g/r600g/radeonsi
ifneq ($(filter r300g r600g radeonsi, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_winsys_radeon
LOCAL_SHARED_LIBRARIES += libdrm_radeon
ifneq ($(filter r300g, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_pipe_r300
endif
endif # r300g
ifneq ($(filter r600g radeonsi, $(MESA_GPU_DRIVERS)),)
ifneq ($(filter r600g, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_pipe_r600
endif
LOCAL_SHARED_LIBRARIES += libstlport
endif # r600g
ifneq ($(filter radeonsi, $(MESA_GPU_DRIVERS)),)
gallium_DRIVERS += libmesa_pipe_radeonsi
endif
endif
endif # radeonsi
gallium_DRIVERS += libmesa_pipe_radeon
endif # r600g || radeonsi
endif # r300g || r600g || radeonsi
# vmwgfx
ifneq ($(filter vmwgfx, $(MESA_GPU_DRIVERS)),)

8
dist/Mesa/src/gallium/Android.mk vendored
View File

@ -34,6 +34,11 @@ SUBDIRS := \
# swrast
SUBDIRS += winsys/sw/android drivers/softpipe
# freedreno
ifneq ($(filter freedreno, $(MESA_GPU_DRIVERS)),)
SUBDIRS += winsys/freedreno/drm drivers/freedreno
endif
# i915g
ifneq ($(filter i915g, $(MESA_GPU_DRIVERS)),)
SUBDIRS += winsys/i915/drm drivers/i915
@ -57,6 +62,8 @@ SUBDIRS += winsys/radeon/drm
ifneq ($(filter r300g, $(MESA_GPU_DRIVERS)),)
SUBDIRS += drivers/r300
endif
ifneq ($(filter r600g radeonsi, $(MESA_GPU_DRIVERS)),)
SUBDIRS += drivers/radeon
ifneq ($(filter r600g, $(MESA_GPU_DRIVERS)),)
SUBDIRS += drivers/r600
endif
@ -64,6 +71,7 @@ ifneq ($(filter radeonsi, $(MESA_GPU_DRIVERS)),)
SUBDIRS += drivers/radeonsi
endif
endif
endif
# vmwgfx
ifneq ($(filter vmwgfx, $(MESA_GPU_DRIVERS)),)

2
dist/Mesa/src/gallium/auxiliary/pipe-loader/pipe_loader.h vendored
View File

@ -66,7 +66,7 @@ struct pipe_loader_device {
} pci;
} u; /**< Discriminated by \a type */
const char *driver_name;
char *driver_name;
const struct pipe_loader_ops *ops;
};

1
dist/Mesa/src/gallium/auxiliary/pipe-loader/pipe_loader_drm.c vendored
View File

@ -256,6 +256,7 @@ pipe_loader_drm_release(struct pipe_loader_device **dev)
util_dl_close(ddev->lib);
close(ddev->fd);
FREE(ddev->base.driver_name);
FREE(ddev);
*dev = NULL;
}

44
dist/Mesa/src/gallium/drivers/freedreno/Android.mk vendored Normal file
View File

@ -0,0 +1,44 @@
# Copyright (C) 2014 Emil Velikov <emil.l.velikov@gmail.com>
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
LOCAL_PATH := $(call my-dir)
# get C_SOURCES
include $(LOCAL_PATH)/Makefile.sources
include $(CLEAR_VARS)
LOCAL_SRC_FILES := \
$(C_SOURCES) \
$(a2xx_SOURCES) \
$(a3xx_SOURCES)
LOCAL_CFLAGS := \
-Wno-packed-bitfield-compat
LOCAL_C_INCLUDES := \
$(LOCAL_PATH)/ir3 \
$(TARGET_OUT_HEADERS)/libdrm \
$(TARGET_OUT_HEADERS)/freedreno
LOCAL_MODULE := libmesa_pipe_freedreno
include $(GALLIUM_COMMON_MK)
include $(BUILD_STATIC_LIBRARY)

2
dist/Mesa/src/gallium/drivers/freedreno/Makefile.am vendored
View File

@ -5,8 +5,6 @@ include $(top_srcdir)/src/gallium/Automake.inc
AM_CFLAGS = \
-Wno-packed-bitfield-compat \
-I$(top_srcdir)/src/gallium/drivers/freedreno/a3xx \
-I$(top_srcdir)/src/gallium/drivers/freedreno/a2xx \
$(GALLIUM_DRIVER_CFLAGS) \
$(FREEDRENO_CFLAGS)

2
dist/Mesa/src/gallium/drivers/freedreno/Makefile.in vendored
View File

@ -613,8 +613,6 @@ GALLIUM_WINSYS_CFLAGS = \
AM_CFLAGS = \
-Wno-packed-bitfield-compat \
-I$(top_srcdir)/src/gallium/drivers/freedreno/a3xx \
-I$(top_srcdir)/src/gallium/drivers/freedreno/a2xx \
$(GALLIUM_DRIVER_CFLAGS) \
$(FREEDRENO_CFLAGS)

4
dist/Mesa/src/gallium/drivers/freedreno/freedreno_screen.c vendored
View File

@ -50,8 +50,8 @@
#include "freedreno_query.h"
#include "freedreno_util.h"
#include "fd2_screen.h"
#include "fd3_screen.h"
#include "a2xx/fd2_screen.h"
#include "a3xx/fd3_screen.h"
/* XXX this should go away */
#include "state_tracker/drm_driver.h"

9
dist/Mesa/src/gallium/drivers/nouveau/Android.mk vendored
View File

@ -28,18 +28,19 @@ include $(LOCAL_PATH)/Makefile.sources
include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES) \
LOCAL_SRC_FILES := \
$(C_SOURCES) \
$(NV30_C_SOURCES) \
$(NV50_CODEGEN_SOURCES) \
$(NV50_C_SOURES) \
$(NVC0_CODEGEN_SOURCES) \
$(NVC0_C_SOURCES)
LOCAL_C_INCLUDES := $(DRM_TOP) \
$(DRM_TOP)/include/drm \
$(DRM_TOP)/nouveau
LOCAL_C_INCLUDES := \
$(TARGET_OUT_HEADERS)/libdrm
LOCAL_MODULE := libmesa_pipe_nouveau
include external/stlport/libstlport.mk
include $(GALLIUM_COMMON_MK)
include $(BUILD_STATIC_LIBRARY)

2
dist/Mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp vendored
View File

@ -2504,7 +2504,7 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
break;
case TGSI_OPCODE_TXB2:
case TGSI_OPCODE_TXL2:
handleTEX(dst0, 2, 2, 0x10, 0x11, 0x00, 0x00);
handleTEX(dst0, 2, 2, 0x10, 0x0f, 0x00, 0x00);
break;
case TGSI_OPCODE_SAMPLE:
case TGSI_OPCODE_SAMPLE_B:

10
dist/Mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp vendored
View File

@ -797,6 +797,16 @@ NV50LoweringPreSSA::handleTXB(TexInstruction *i)
const CondCode cc[4] = { CC_EQU, CC_S, CC_C, CC_O };
int l, d;
// We can't actually apply bias *and* do a compare for a cube
// texture. Since the compare has to be done before the filtering, just
// drop the bias on the floor.
if (i->tex.target == TEX_TARGET_CUBE_SHADOW) {
i->op = OP_TEX;
i->setSrc(3, i->getSrc(4));
i->setSrc(4, NULL);
return handleTEX(i);
}
handleTEX(i);
Value *bias = i->getSrc(i->tex.target.getArgCount());
if (bias->isUniform())

44
dist/Mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp vendored
View File

@ -26,6 +26,7 @@
#include "codegen/nv50_ir_target_nvc0.h"
#include <limits>
#include <tr1/unordered_set>
namespace nv50_ir {
@ -148,7 +149,8 @@ private:
bool insertTextureBarriers(Function *);
inline bool insnDominatedBy(const Instruction *, const Instruction *) const;
void findFirstUses(const Instruction *tex, const Instruction *def,
std::list<TexUse>&);
std::list<TexUse>&,
std::tr1::unordered_set<const Instruction *>&);
void findOverwritingDefs(const Instruction *tex, Instruction *insn,
const BasicBlock *term,
std::list<TexUse>&);
@ -230,15 +232,31 @@ NVC0LegalizePostRA::findOverwritingDefs(const Instruction *texi,
}
void
NVC0LegalizePostRA::findFirstUses(const Instruction *texi,
const Instruction *insn,
std::list<TexUse> &uses)
NVC0LegalizePostRA::findFirstUses(
const Instruction *texi,
const Instruction *insn,
std::list<TexUse> &uses,
std::tr1::unordered_set<const Instruction *>& visited)
{
for (int d = 0; insn->defExists(d); ++d) {
Value *v = insn->getDef(d);
for (Value::UseIterator u = v->uses.begin(); u != v->uses.end(); ++u) {
Instruction *usei = (*u)->getInsn();
/* XXX HACK ALERT XXX
*
* This shouldn't have to be here, we should always be making forward
* progress by looking at the uses. However this somehow does not
* appear to be the case. Probably because this is being done right
* after RA, when the defs/uses lists have been messed with by node
* merging. This should probably be moved to being done right before
* RA. But this will do for now.
*/
if (visited.find(usei) != visited.end())
continue;
visited.insert(usei);
if (usei->op == OP_PHI || usei->op == OP_UNION) {
// need a barrier before WAW cases
for (int s = 0; usei->srcExists(s); ++s) {
@ -253,11 +271,11 @@ NVC0LegalizePostRA::findFirstUses(const Instruction *texi,
usei->op == OP_PHI ||
usei->op == OP_UNION) {
// these uses don't manifest in the machine code
findFirstUses(texi, usei, uses);
findFirstUses(texi, usei, uses, visited);
} else
if (usei->op == OP_MOV && usei->getDef(0)->equals(usei->getSrc(0)) &&
usei->subOp != NV50_IR_SUBOP_MOV_FINAL) {
findFirstUses(texi, usei, uses);
findFirstUses(texi, usei, uses, visited);
} else {
addTexUse(uses, usei, insn);
}
@ -313,8 +331,10 @@ NVC0LegalizePostRA::insertTextureBarriers(Function *fn)
uses = new std::list<TexUse>[texes.size()];
if (!uses)
return false;
for (size_t i = 0; i < texes.size(); ++i)
findFirstUses(texes[i], texes[i], uses[i]);
for (size_t i = 0; i < texes.size(); ++i) {
std::tr1::unordered_set<const Instruction *> visited;
findFirstUses(texes[i], texes[i], uses[i], visited);
}
// determine the barrier level at each use
for (size_t i = 0; i < texes.size(); ++i) {
@ -814,6 +834,7 @@ NVC0LoweringPass::handleManualTXD(TexInstruction *i)
Value *zero = bld.loadImm(bld.getSSA(), 0);
int l, c;
const int dim = i->tex.target.getDim();
const int array = i->tex.target.isArray();
i->op = OP_TEX; // no need to clone dPdx/dPdy later
@ -824,7 +845,7 @@ NVC0LoweringPass::handleManualTXD(TexInstruction *i)
for (l = 0; l < 4; ++l) {
// mov coordinates from lane l to all lanes
for (c = 0; c < dim; ++c)
bld.mkQuadop(0x00, crd[c], l, i->getSrc(c), zero);
bld.mkQuadop(0x00, crd[c], l, i->getSrc(c + array), zero);
// add dPdx from lane l to lanes dx
for (c = 0; c < dim; ++c)
bld.mkQuadop(qOps[l][0], crd[c], l, i->dPdx[c].get(), crd[c]);
@ -834,7 +855,7 @@ NVC0LoweringPass::handleManualTXD(TexInstruction *i)
// texture
bld.insert(tex = cloneForward(func, i));
for (c = 0; c < dim; ++c)
tex->setSrc(c, crd[c]);
tex->setSrc(c + array, crd[c]);
// save results
for (c = 0; i->defExists(c); ++c) {
Instruction *mov;
@ -870,7 +891,8 @@ NVC0LoweringPass::handleTXD(TexInstruction *txd)
if (dim > 2 ||
txd->tex.target.isCube() ||
arg > 4 ||
txd->tex.target.isShadow())
txd->tex.target.isShadow() ||
txd->tex.useOffsets)
return handleManualTXD(txd);
for (int c = 0; c < dim; ++c) {

4
dist/Mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp vendored
View File

@ -560,6 +560,10 @@ ConstantFolding::expr(Instruction *i,
ImmediateValue src0;
if (i->src(0).getImmediate(src0))
expr(i, src0, *i->getSrc(1)->asImm());
if (i->saturate && !prog->getTarget()->isSatSupported(i)) {
bld.setPosition(i, false);
i->setSrc(1, bld.loadImm(NULL, res.data.u32));
}
} else {
i->op = i->saturate ? OP_SAT : OP_MOV; /* SAT handled by unary() */
}

7
dist/Mesa/src/gallium/drivers/nouveau/nv50/nv50_state.c vendored
View File

@ -585,9 +585,12 @@ nv50_stage_sampler_states_bind(struct nv50_context *nv50, int s,
nv50_screen_tsc_unlock(nv50->screen, old);
}
assert(nv50->num_samplers[s] <= PIPE_MAX_SAMPLERS);
for (; i < nv50->num_samplers[s]; ++i)
if (nv50->samplers[s][i])
for (; i < nv50->num_samplers[s]; ++i) {
if (nv50->samplers[s][i]) {
nv50_screen_tsc_unlock(nv50->screen, nv50->samplers[s][i]);
nv50->samplers[s][i] = NULL;
}
}
nv50->num_samplers[s] = nr;

8
dist/Mesa/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c vendored
View File

@ -54,8 +54,8 @@ nv50_validate_fb(struct nv50_context *nv50)
assert(mt->layout_3d || !array_mode || array_size == 1);
BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(i)), 5);
PUSH_DATAh(push, bo->offset + sf->offset);
PUSH_DATA (push, bo->offset + sf->offset);
PUSH_DATAh(push, mt->base.address + sf->offset);
PUSH_DATA (push, mt->base.address + sf->offset);
PUSH_DATA (push, nv50_format_table[sf->base.format].rt);
if (likely(nouveau_bo_memtype(bo))) {
PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
@ -97,8 +97,8 @@ nv50_validate_fb(struct nv50_context *nv50)
int unk = mt->base.base.target == PIPE_TEXTURE_3D || sf->depth == 1;
BEGIN_NV04(push, NV50_3D(ZETA_ADDRESS_HIGH), 5);
PUSH_DATAh(push, bo->offset + sf->offset);
PUSH_DATA (push, bo->offset + sf->offset);
PUSH_DATAh(push, mt->base.address + sf->offset);
PUSH_DATA (push, mt->base.address + sf->offset);
PUSH_DATA (push, nv50_format_table[fb->zsbuf->format].rt);
PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
PUSH_DATA (push, mt->layer_stride >> 2);

16
dist/Mesa/src/gallium/drivers/nouveau/nv50/nv50_surface.c vendored
View File

@ -114,8 +114,8 @@ nv50_2d_texture_set(struct nouveau_pushbuf *push, int dst,
PUSH_DATA (push, mt->level[level].pitch);
PUSH_DATA (push, width);
PUSH_DATA (push, height);
PUSH_DATAh(push, bo->offset + offset);
PUSH_DATA (push, bo->offset + offset);
PUSH_DATAh(push, mt->base.address + offset);
PUSH_DATA (push, mt->base.address + offset);
} else {
BEGIN_NV04(push, SUBC_2D(mthd), 5);
PUSH_DATA (push, format);
@ -126,8 +126,8 @@ nv50_2d_texture_set(struct nouveau_pushbuf *push, int dst,
BEGIN_NV04(push, SUBC_2D(mthd + 0x18), 4);
PUSH_DATA (push, width);
PUSH_DATA (push, height);
PUSH_DATAh(push, bo->offset + offset);
PUSH_DATA (push, bo->offset + offset);
PUSH_DATAh(push, mt->base.address + offset);
PUSH_DATA (push, mt->base.address + offset);
}
#if 0
@ -299,8 +299,8 @@ nv50_clear_render_target(struct pipe_context *pipe,
BEGIN_NV04(push, NV50_3D(RT_CONTROL), 1);
PUSH_DATA (push, 1);
BEGIN_NV04(push, NV50_3D(RT_ADDRESS_HIGH(0)), 5);
PUSH_DATAh(push, bo->offset + sf->offset);
PUSH_DATA (push, bo->offset + sf->offset);
PUSH_DATAh(push, mt->base.address + sf->offset);
PUSH_DATA (push, mt->base.address + sf->offset);
PUSH_DATA (push, nv50_format_table[dst->format].rt);
PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
PUSH_DATA (push, mt->layer_stride >> 2);
@ -381,8 +381,8 @@ nv50_clear_depth_stencil(struct pipe_context *pipe,
nv50->scissors_dirty |= 1;
BEGIN_NV04(push, NV50_3D(ZETA_ADDRESS_HIGH), 5);
PUSH_DATAh(push, bo->offset + sf->offset);
PUSH_DATA (push, bo->offset + sf->offset);
PUSH_DATAh(push, mt->base.address + sf->offset);
PUSH_DATA (push, mt->base.address + sf->offset);
PUSH_DATA (push, nv50_format_table[dst->format].rt);
PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
PUSH_DATA (push, mt->layer_stride >> 2);

2
dist/Mesa/src/gallium/drivers/nouveau/nv50/nv50_transfer.c vendored
View File

@ -24,6 +24,8 @@ nv50_m2mf_rect_setup(struct nv50_m2mf_rect *rect,
rect->bo = mt->base.bo;
rect->domain = mt->base.domain;
rect->base = mt->level[l].offset;
if (mt->base.bo->offset != mt->base.address)
rect->base += mt->base.address - mt->base.bo->offset;
rect->pitch = mt->level[l].pitch;
if (util_format_is_plain(res->format)) {
rect->width = w << mt->ms_x;

15
dist/Mesa/src/gallium/drivers/nouveau/nv50/nv84_video.c vendored
View File

@ -482,12 +482,14 @@ nv84_create_decoder(struct pipe_context *context,
mip.level[0].pitch = surf.width * 4;
mip.base.domain = NOUVEAU_BO_VRAM;
mip.base.bo = dec->mbring;
mip.base.address = dec->mbring->offset;
context->clear_render_target(context, &surf.base, &color, 0, 0, 64, 4760);
surf.offset = dec->vpring->size / 2 - 0x1000;
surf.width = 1024;
surf.height = 1;
mip.level[0].pitch = surf.width * 4;
mip.base.bo = dec->vpring;
mip.base.address = dec->vpring->offset;
context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1);
surf.offset = dec->vpring->size - 0x1000;
context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1);
@ -683,17 +685,14 @@ nv84_video_buffer_create(struct pipe_context *pipe,
bo_size, &cfg, &buffer->full))
goto error;
mt0->base.bo = buffer->interlaced;
nouveau_bo_ref(buffer->interlaced, &mt0->base.bo);
mt0->base.domain = NOUVEAU_BO_VRAM;
mt0->base.offset = 0;
mt0->base.address = buffer->interlaced->offset + mt0->base.offset;
nouveau_bo_ref(buffer->interlaced, &empty);
mt0->base.address = buffer->interlaced->offset;
mt1->base.bo = buffer->interlaced;
nouveau_bo_ref(buffer->interlaced, &mt1->base.bo);
mt1->base.domain = NOUVEAU_BO_VRAM;
mt1->base.offset = mt0->layer_stride * 2;
mt1->base.address = buffer->interlaced->offset + mt1->base.offset;
nouveau_bo_ref(buffer->interlaced, &empty);
mt1->base.offset = mt0->total_size;
mt1->base.address = buffer->interlaced->offset + mt0->total_size;
memset(&sv_templ, 0, sizeof(sv_templ));
for (component = 0, i = 0; i < 2; ++i ) {

5
dist/Mesa/src/gallium/drivers/nouveau/nv50/nv84_video_bsp.c vendored
View File

@ -67,10 +67,15 @@ struct iparm {
uint32_t field_is_ref; // 04 // bit0: top, bit1: bottom
uint8_t is_long_term; // 08
uint8_t non_existing; // 09
uint8_t u0a; // 0a
uint8_t u0b; // 0b
uint32_t frame_idx; // 0c
uint32_t field_order_cnt[2]; // 10
uint32_t mvidx; // 18
uint8_t field_pic_flag; // 1c
uint8_t u1d; // 1d
uint8_t u1e; // 1e
uint8_t u1f; // 1f
// 20
} refs[0x10]; // 1e0
} ipicparm; // 150

1
dist/Mesa/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c vendored
View File

@ -261,7 +261,6 @@ nvc0_miptree_create(struct pipe_screen *pscreen,
if (pt->usage == PIPE_USAGE_STAGING) {
switch (pt->target) {
case PIPE_TEXTURE_1D:
case PIPE_TEXTURE_2D:
case PIPE_TEXTURE_RECT:
if (pt->last_level == 0 &&

2
dist/Mesa/src/gallium/drivers/nouveau/nvc0/nvc0_program.c vendored
View File

@ -626,7 +626,7 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset)
if (info->bin.tlsSpace) {
assert(info->bin.tlsSpace < (1 << 24));
prog->hdr[0] |= 1 << 26;
prog->hdr[1] |= info->bin.tlsSpace; /* l[] size */
prog->hdr[1] |= align(info->bin.tlsSpace, 0x10); /* l[] size */
prog->need_tls = TRUE;
}
/* TODO: factor 2 only needed where joinat/precont is used,

3
dist/Mesa/src/gallium/drivers/r300/Android.mk vendored
View File

@ -34,8 +34,7 @@ LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/glsl \
$(MESA_TOP)/src/mesa \
$(DRM_TOP) \
$(DRM_TOP)/include/drm
$(TARGET_OUT_HEADERS)/libdrm
LOCAL_MODULE := libmesa_pipe_r300

2
dist/Mesa/src/gallium/drivers/r600/Android.mk vendored
View File

@ -30,7 +30,7 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES) $(CXX_SOURCES)
LOCAL_C_INCLUDES := $(DRM_TOP)
LOCAL_C_INCLUDES := $(TARGET_OUT_HEADERS)/libdrm
LOCAL_MODULE := libmesa_pipe_r600

3
dist/Mesa/src/gallium/drivers/r600/evergreen_compute.c vendored
View File

@ -881,9 +881,6 @@ void evergreen_init_compute_state_functions(struct r600_context *ctx)
ctx->b.b.set_global_binding = evergreen_set_global_binding;
ctx->b.b.launch_grid = evergreen_launch_grid;
/* We always use at least one vertex buffer for parameters (id = 1)*/
ctx->cs_vertex_buffer_state.enabled_mask =
ctx->cs_vertex_buffer_state.dirty_mask = 0x2;
}
struct pipe_resource *r600_compute_global_buffer_create(

38
dist/Mesa/src/gallium/drivers/radeon/Android.mk vendored Normal file
View File

@ -0,0 +1,38 @@
# Mesa 3-D graphics library
#
# Copyright (C) 2011 Chia-I Wu <olvaffe@gmail.com>
# Copyright (C) 2011 LunarG Inc.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
LOCAL_PATH := $(call my-dir)
# get C_SOURCES
include $(LOCAL_PATH)/Makefile.sources
include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES)
LOCAL_C_INCLUDES := $(TARGET_OUT_HEADERS)/libdrm
LOCAL_MODULE := libmesa_pipe_radeon
include $(GALLIUM_COMMON_MK)
include $(BUILD_STATIC_LIBRARY)

55
dist/Mesa/src/gallium/drivers/radeon/r600_pipe_common.c vendored
View File

@ -142,7 +142,13 @@ bool r600_common_context_init(struct r600_common_context *rctx,
rctx->ws = rscreen->ws;
rctx->family = rscreen->family;
rctx->chip_class = rscreen->chip_class;
rctx->max_db = rscreen->chip_class >= EVERGREEN ? 8 : 4;
if (rscreen->family == CHIP_HAWAII)
rctx->max_db = 16;
else if (rscreen->chip_class >= EVERGREEN)
rctx->max_db = 8;
else
rctx->max_db = 4;
rctx->b.transfer_map = u_transfer_map_vtbl;
rctx->b.transfer_flush_region = u_default_transfer_flush_region;
@ -431,7 +437,20 @@ static int r600_get_compute_param(struct pipe_screen *screen,
//TODO: select these params by asic
switch (param) {
case PIPE_COMPUTE_CAP_IR_TARGET: {
const char *gpu = r600_get_llvm_processor_name(rscreen->family);
const char *gpu;
switch(rscreen->family) {
/* Clang < 3.6 is missing Hainan in its list of
* GPUs, so we need to use the name of a similar GPU.
*/
#if HAVE_LLVM < 0x0306
case CHIP_HAINAN:
gpu = "oland";
break;
#endif
default:
gpu = r600_get_llvm_processor_name(rscreen->family);
break;
}
if (ret) {
sprintf(ret, "%s-r600--", gpu);
}
@ -472,13 +491,21 @@ static int r600_get_compute_param(struct pipe_screen *screen,
case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
if (ret) {
uint64_t *max_global_size = ret;
/* XXX: This is what the proprietary driver reports, we
* may want to use a different value. */
/* XXX: Not sure what to put here for SI. */
if (rscreen->chip_class >= SI)
*max_global_size = 2000000000;
else
*max_global_size = 201326592;
uint64_t max_mem_alloc_size;
r600_get_compute_param(screen,
PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
&max_mem_alloc_size);
/* In OpenCL, the MAX_MEM_ALLOC_SIZE must be at least
* 1/4 of the MAX_GLOBAL_SIZE. Since the
* MAX_MEM_ALLOC_SIZE is fixed for older kernels,
* make sure we never report more than
* 4 * MAX_MEM_ALLOC_SIZE.
*/
*max_global_size = MIN2(4 * max_mem_alloc_size,
rscreen->info.gart_size +
rscreen->info.vram_size);
}
return sizeof(uint64_t);
@ -502,13 +529,11 @@ static int r600_get_compute_param(struct pipe_screen *screen,
if (ret) {
uint64_t max_global_size;
uint64_t *max_mem_alloc_size = ret;
r600_get_compute_param(screen, PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE, &max_global_size);
/* OpenCL requres this value be at least
* max(MAX_GLOBAL_SIZE / 4, 128 * 1024 *1024)
* I'm really not sure what value to report here, but
* MAX_GLOBAL_SIZE / 4 seems resonable.
/* XXX: The limit in older kernels is 256 MB. We
* should add a query here for newer kernels.
*/
*max_mem_alloc_size = max_global_size / 4;
*max_mem_alloc_size = 256 * 1024 * 1024;
}
return sizeof(uint64_t);

1
dist/Mesa/src/gallium/drivers/radeon/r600_pipe_common.h vendored
View File

@ -72,6 +72,7 @@
#define R600_CONTEXT_WAIT_3D_IDLE (1 << 17)
#define R600_CONTEXT_WAIT_CP_DMA_IDLE (1 << 18)
#define R600_CONTEXT_VGT_FLUSH (1 << 19)
#define R600_CONTEXT_VGT_STREAMOUT_SYNC (1 << 20)
/* Debug flags. */
/* logging */

9
dist/Mesa/src/gallium/drivers/radeon/r600_texture.c vendored
View File

@ -380,7 +380,8 @@ void r600_texture_get_cmask_info(struct r600_common_screen *rscreen,
out->slice_tile_max = ((pitch_elements * height) / (128*128)) - 1;
out->alignment = MAX2(256, base_align);
out->size = rtex->surface.array_size * align(slice_bytes, base_align);
out->size = (util_max_layer(&rtex->resource.b.b, 0) + 1) *
align(slice_bytes, base_align);
}
static void si_texture_get_cmask_info(struct r600_common_screen *rscreen,
@ -427,7 +428,8 @@ static void si_texture_get_cmask_info(struct r600_common_screen *rscreen,
out->slice_tile_max -= 1;
out->alignment = MAX2(256, base_align);
out->size = rtex->surface.array_size * align(slice_bytes, base_align);
out->size = (util_max_layer(&rtex->resource.b.b, 0) + 1) *
align(slice_bytes, base_align);
}
static void r600_texture_allocate_cmask(struct r600_common_screen *rscreen,
@ -523,7 +525,8 @@ static unsigned si_texture_htile_alloc_size(struct r600_common_screen *rscreen,
pipe_interleave_bytes = rscreen->tiling_info.group_bytes;
base_align = num_pipes * pipe_interleave_bytes;
return rtex->surface.array_size * align(slice_bytes, base_align);
return (util_max_layer(&rtex->resource.b.b, 0) + 1) *
align(slice_bytes, base_align);
}
static unsigned r600_texture_htile_alloc_size(struct r600_common_screen *rscreen,

2
dist/Mesa/src/gallium/drivers/radeonsi/Android.mk vendored
View File

@ -30,7 +30,7 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES)
LOCAL_C_INCLUDES :=
LOCAL_C_INCLUDES := $(TARGET_OUT_HEADERS)/libdrm
LOCAL_MODULE := libmesa_pipe_radeonsi

9
dist/Mesa/src/gallium/drivers/radeonsi/si_blit.c vendored
View File

@ -60,9 +60,16 @@ static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader);
util_blitter_save_vertex_shader(sctx->blitter, sctx->vs_shader);
util_blitter_save_vertex_elements(sctx->blitter, sctx->vertex_elements);
if (sctx->queued.named.sample_mask) {
util_blitter_save_sample_mask(sctx->blitter,
sctx->queued.named.sample_mask->sample_mask);
}
if (sctx->queued.named.viewport) {
util_blitter_save_viewport(sctx->blitter, &sctx->queued.named.viewport->viewport);
}
if (sctx->queued.named.scissor) {
util_blitter_save_scissor(sctx->blitter, &sctx->queued.named.scissor->scissor);
}
util_blitter_save_vertex_buffer_slot(sctx->blitter, sctx->vertex_buffer);
util_blitter_save_so_targets(sctx->blitter, sctx->b.streamout.num_targets,
(struct pipe_stream_output_target**)sctx->b.streamout.targets);
@ -735,7 +742,7 @@ static void si_flush_resource(struct pipe_context *ctx,
if (!rtex->is_depth && rtex->cmask.size) {
si_blit_decompress_color(ctx, rtex, 0, res->last_level,
0, res->array_size - 1);
0, util_max_layer(res, 0));
}
}

6
dist/Mesa/src/gallium/drivers/radeonsi/si_compute.c vendored
View File

@ -100,7 +100,7 @@ static void si_set_global_binding(
if (!resources) {
for (i = first; i < first + n; i++) {
program->global_buffers[i] = NULL;
pipe_resource_reference(&program->global_buffers[i], NULL);
}
return;
}
@ -108,7 +108,7 @@ static void si_set_global_binding(
for (i = first; i < first + n; i++) {
uint64_t va;
uint32_t offset;
program->global_buffers[i] = resources[i];
pipe_resource_reference(&program->global_buffers[i], resources[i]);
va = r600_resource_va(ctx->screen, resources[i]);
offset = util_le32_to_cpu(*handles[i]);
va += offset;
@ -288,8 +288,8 @@ static void si_launch_grid(
}
#endif
FREE(pm4);
FREE(kernel_args);
si_pm4_free_state(sctx, pm4, ~0);
}

6
dist/Mesa/src/gallium/drivers/radeonsi/si_descriptors.c vendored
View File

@ -987,9 +987,9 @@ void si_init_all_descriptors(struct si_context *sctx)
si_init_sampler_views(sctx, &sctx->samplers[i].views, i);
sctx->atoms.const_buffers[i] = &sctx->const_buffers[i].desc.atom;
sctx->atoms.rw_buffers[i] = &sctx->rw_buffers[i].desc.atom;
sctx->atoms.sampler_views[i] = &sctx->samplers[i].views.desc.atom;
sctx->atoms.s.const_buffers[i] = &sctx->const_buffers[i].desc.atom;
sctx->atoms.s.rw_buffers[i] = &sctx->rw_buffers[i].desc.atom;
sctx->atoms.s.sampler_views[i] = &sctx->samplers[i].views.desc.atom;
}

3
dist/Mesa/src/gallium/drivers/radeonsi/si_dma.c vendored
View File

@ -91,12 +91,13 @@ static void si_dma_copy_buffer(struct si_context *ctx,
}
ncopy = (size / max_csize) + !!(size % max_csize);
r600_need_dma_space(&ctx->b, ncopy * 5);
r600_context_bo_reloc(&ctx->b, &ctx->b.rings.dma, rsrc, RADEON_USAGE_READ,
RADEON_PRIO_MIN);
r600_context_bo_reloc(&ctx->b, &ctx->b.rings.dma, rdst, RADEON_USAGE_WRITE,
RADEON_PRIO_MIN);
r600_need_dma_space(&ctx->b, ncopy * 5);
for (i = 0; i < ncopy; i++) {
csize = size < max_csize ? size : max_csize;
cs->buf[cs->cdw++] = SI_DMA_PACKET(SI_DMA_PACKET_COPY, sub_cmd, csize);

2
dist/Mesa/src/gallium/drivers/radeonsi/si_hw_context.c vendored
View File

@ -63,7 +63,7 @@ void si_need_cs_space(struct si_context *ctx, unsigned num_dw,
}
/* Count in framebuffer cache flushes at the end of CS. */
num_dw += ctx->atoms.cache_flush->num_dw;
num_dw += ctx->atoms.s.cache_flush->num_dw;
#if SI_TRACE_CS
if (ctx->screen->b.trace_bo) {

61
dist/Mesa/src/gallium/drivers/radeonsi/si_pipe.c vendored
View File

@ -23,6 +23,7 @@
#include "si_pipe.h"
#include "si_public.h"
#include "sid.h"
#include "radeon/radeon_uvd.h"
#include "util/u_blitter.h"
@ -105,10 +106,10 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, void *
/* Initialize cache_flush. */
sctx->cache_flush = si_atom_cache_flush;
sctx->atoms.cache_flush = &sctx->cache_flush;
sctx->atoms.s.cache_flush = &sctx->cache_flush;
sctx->atoms.streamout_begin = &sctx->b.streamout.begin_atom;
sctx->atoms.streamout_enable = &sctx->b.streamout.enable_atom;
sctx->atoms.s.streamout_begin = &sctx->b.streamout.begin_atom;
sctx->atoms.s.streamout_enable = &sctx->b.streamout.enable_atom;
switch (sctx->b.chip_class) {
case SI:
@ -384,6 +385,57 @@ static void si_destroy_screen(struct pipe_screen* pscreen)
r600_destroy_common_screen(&sscreen->b);
}
#define SI_TILE_MODE_COLOR_2D_8BPP 14
/* Initialize pipe config. This is especially important for GPUs
* with 16 pipes and more where it's initialized incorrectly by
* the TILING_CONFIG ioctl. */
static bool si_initialize_pipe_config(struct si_screen *sscreen)
{
unsigned mode2d;
/* This is okay, because there can be no 2D tiling without
* the tile mode array, so we won't need the pipe config.
* Return "success".
*/
if (!sscreen->b.info.si_tile_mode_array_valid)
return true;
/* The same index is used for the 2D mode on CIK too. */
mode2d = sscreen->b.info.si_tile_mode_array[SI_TILE_MODE_COLOR_2D_8BPP];
switch (G_009910_PIPE_CONFIG(mode2d)) {
case V_02803C_ADDR_SURF_P2:
sscreen->b.tiling_info.num_channels = 2;
break;
case V_02803C_X_ADDR_SURF_P4_8X16:
case V_02803C_X_ADDR_SURF_P4_16X16:
case V_02803C_X_ADDR_SURF_P4_16X32:
case V_02803C_X_ADDR_SURF_P4_32X32:
sscreen->b.tiling_info.num_channels = 4;
break;
case V_02803C_X_ADDR_SURF_P8_16X16_8X16:
case V_02803C_X_ADDR_SURF_P8_16X32_8X16:
case V_02803C_X_ADDR_SURF_P8_32X32_8X16:
case V_02803C_X_ADDR_SURF_P8_16X32_16X16:
case V_02803C_X_ADDR_SURF_P8_32X32_16X16:
case V_02803C_X_ADDR_SURF_P8_32X32_16X32:
case V_02803C_X_ADDR_SURF_P8_32X64_32X32:
sscreen->b.tiling_info.num_channels = 8;
break;
case V_02803C_X_ADDR_SURF_P16_32X32_8X16:
case V_02803C_X_ADDR_SURF_P16_32X32_16X16:
sscreen->b.tiling_info.num_channels = 16;
break;
default:
assert(0);
fprintf(stderr, "radeonsi: Unknown pipe config %i.\n",
G_009910_PIPE_CONFIG(mode2d));
return false;
}
return true;
}
struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
{
struct si_screen *sscreen = CALLOC_STRUCT(si_screen);
@ -399,7 +451,8 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
sscreen->b.b.is_format_supported = si_is_format_supported;
sscreen->b.b.resource_create = r600_resource_create_common;
if (!r600_common_screen_init(&sscreen->b, ws)) {
if (!r600_common_screen_init(&sscreen->b, ws) ||
!si_initialize_pipe_config(sscreen)) {
FREE(sscreen);
return NULL;
}

2
dist/Mesa/src/gallium/drivers/radeonsi/si_pipe.h vendored
View File

@ -114,7 +114,7 @@ struct si_context {
struct r600_atom *streamout_begin;
struct r600_atom *streamout_enable; /* must be after streamout_begin */
struct r600_atom *framebuffer;
};
} s;
struct r600_atom *array[0];
} atoms;

9
dist/Mesa/src/gallium/drivers/radeonsi/si_shader.c vendored
View File

@ -1539,9 +1539,8 @@ static void tex_fetch_args(
/* Pack LOD bias value */
if (opcode == TGSI_OPCODE_TXB)
address[count++] = coords[3];
if (target == TGSI_TEXTURE_CUBE || target == TGSI_TEXTURE_SHADOWCUBE)
radeon_llvm_emit_prepare_cube_coords(bld_base, emit_data, coords);
if (opcode == TGSI_OPCODE_TXB2)
address[count++] = lp_build_emit_fetch(bld_base, inst, 1, 0);
/* Pack depth comparison value */
switch (target) {
@ -1558,6 +1557,9 @@ static void tex_fetch_args(
address[count++] = lp_build_emit_fetch(bld_base, inst, 1, 0);
}
if (target == TGSI_TEXTURE_CUBE || target == TGSI_TEXTURE_SHADOWCUBE)
radeon_llvm_emit_prepare_cube_coords(bld_base, emit_data, coords);
/* Pack user derivatives */
if (opcode == TGSI_OPCODE_TXD) {
for (chan = 0; chan < 2; chan++) {
@ -2497,6 +2499,7 @@ int si_pipe_shader_create(
bld_base->op_actions[TGSI_OPCODE_TEX] = tex_action;
bld_base->op_actions[TGSI_OPCODE_TXB] = txb_action;
bld_base->op_actions[TGSI_OPCODE_TXB2] = txb_action;
#if HAVE_LLVM >= 0x0304
bld_base->op_actions[TGSI_OPCODE_TXD] = txd_action;
#endif

18
dist/Mesa/src/gallium/drivers/radeonsi/si_state.c vendored
View File

@ -458,18 +458,20 @@ static void si_set_scissor_states(struct pipe_context *ctx,
const struct pipe_scissor_state *state)
{
struct si_context *sctx = (struct si_context *)ctx;
struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
struct si_state_scissor *scissor = CALLOC_STRUCT(si_state_scissor);
struct si_pm4_state *pm4 = &scissor->pm4;
if (pm4 == NULL)
if (scissor == NULL)
return;
scissor->scissor = *state;
si_pm4_set_reg(pm4, R_028250_PA_SC_VPORT_SCISSOR_0_TL,
S_028250_TL_X(state->minx) | S_028250_TL_Y(state->miny) |
S_028250_WINDOW_OFFSET_DISABLE(1));
si_pm4_set_reg(pm4, R_028254_PA_SC_VPORT_SCISSOR_0_BR,
S_028254_BR_X(state->maxx) | S_028254_BR_Y(state->maxy));
si_pm4_set_state(sctx, scissor, pm4);
si_pm4_set_state(sctx, scissor, scissor);
}
static void si_set_viewport_states(struct pipe_context *ctx,
@ -2823,16 +2825,18 @@ static void si_bind_sampler_states(struct pipe_context *ctx, unsigned shader,
static void si_set_sample_mask(struct pipe_context *ctx, unsigned sample_mask)
{
struct si_context *sctx = (struct si_context *)ctx;
struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
struct si_state_sample_mask *state = CALLOC_STRUCT(si_state_sample_mask);
struct si_pm4_state *pm4 = &state->pm4;
uint16_t mask = sample_mask;
if (pm4 == NULL)
if (state == NULL)
return;
state->sample_mask = mask;
si_pm4_set_reg(pm4, R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, mask | (mask << 16));
si_pm4_set_reg(pm4, R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1, mask | (mask << 16));
si_pm4_set_state(sctx, sample_mask, pm4);
si_pm4_set_state(sctx, sample_mask, state);
}
static void si_delete_sampler_state(struct pipe_context *ctx, void *state)
@ -2959,7 +2963,7 @@ void si_init_state_functions(struct si_context *sctx)
{
int i;
si_init_atom(&sctx->framebuffer.atom, &sctx->atoms.framebuffer, si_emit_framebuffer_state, 0);
si_init_atom(&sctx->framebuffer.atom, &sctx->atoms.s.framebuffer, si_emit_framebuffer_state, 0);
sctx->b.b.create_blend_state = si_create_blend_state;
sctx->b.b.bind_blend_state = si_bind_blend_state;

14
dist/Mesa/src/gallium/drivers/radeonsi/si_state.h vendored
View File

@ -38,6 +38,16 @@ struct si_state_blend {
bool alpha_to_one;
};
struct si_state_sample_mask {
struct si_pm4_state pm4;
uint16_t sample_mask;
};
struct si_state_scissor {
struct si_pm4_state pm4;
struct pipe_scissor_state scissor;
};
struct si_state_viewport {
struct si_pm4_state pm4;
struct pipe_viewport_state viewport;
@ -81,8 +91,8 @@ union si_state {
struct si_state_blend *blend;
struct si_pm4_state *blend_color;
struct si_pm4_state *clip;
struct si_pm4_state *sample_mask;
struct si_pm4_state *scissor;
struct si_state_sample_mask *sample_mask;
struct si_state_scissor *scissor;
struct si_state_viewport *viewport;
struct si_state_rasterizer *rasterizer;
struct si_state_dsa *dsa;

41
dist/Mesa/src/gallium/drivers/radeonsi/si_state_draw.c vendored
View File

@ -33,6 +33,7 @@
#include "util/u_format.h"
#include "util/u_index_modify.h"
#include "util/u_memory.h"
#include "util/u_prim.h"
#include "util/u_upload_mgr.h"
/*
@ -425,16 +426,28 @@ static bool si_update_draw_info_state(struct si_context *sctx,
(rs ? rs->line_stipple_enable : false);
/* If the WD switch is false, the IA switch must be false too. */
bool ia_switch_on_eop = wd_switch_on_eop;
unsigned primgroup_size = 64;
/* Hawaii hangs if instancing is enabled and WD_SWITCH_ON_EOP is 0.
* We don't know that for indirect drawing, so treat it as
* always problematic. */
if (sctx->b.family == CHIP_HAWAII && info->instance_count > 1) {
wd_switch_on_eop = true;
ia_switch_on_eop = true;
}
si_pm4_set_reg(pm4, R_028AA8_IA_MULTI_VGT_PARAM,
S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop) |
S_028AA8_PARTIAL_VS_WAVE_ON(1) |
S_028AA8_PRIMGROUP_SIZE(63) |
S_028AA8_WD_SWITCH_ON_EOP(wd_switch_on_eop));
si_pm4_set_reg(pm4, R_028B74_VGT_DISPATCH_DRAW_INDEX,
ib->index_size == 4 ? 0xFC000000 : 0xFC00);
si_pm4_set_reg(pm4, R_030908_VGT_PRIMITIVE_TYPE, prim);
si_pm4_cmd_begin(pm4, PKT3_DRAW_PREAMBLE);
si_pm4_cmd_add(pm4, prim); /* VGT_PRIMITIVE_TYPE */
si_pm4_cmd_add(pm4, /* IA_MULTI_VGT_PARAM */
S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop) |
S_028AA8_PARTIAL_VS_WAVE_ON(1) |
S_028AA8_PRIMGROUP_SIZE(primgroup_size - 1) |
S_028AA8_WD_SWITCH_ON_EOP(wd_switch_on_eop));
si_pm4_cmd_add(pm4, 0); /* VGT_LS_HS_CONFIG */
si_pm4_cmd_end(pm4, false);
} else {
si_pm4_set_reg(pm4, R_008958_VGT_PRIMITIVE_TYPE, prim);
}
@ -902,11 +915,15 @@ void si_emit_cache_flush(struct r600_common_context *sctx, struct r600_atom *ato
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0));
}
if (sctx->flags & R600_CONTEXT_VGT_STREAMOUT_SYNC) {
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_STREAMOUT_SYNC) | EVENT_INDEX(0));
}
sctx->flags = 0;
}
const struct r600_atom si_atom_cache_flush = { si_emit_cache_flush, 13 }; /* number of CS dwords */
const struct r600_atom si_atom_cache_flush = { si_emit_cache_flush, 17 }; /* number of CS dwords */
void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
{
@ -964,7 +981,7 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
/* Check flush flags. */
if (sctx->b.flags)
sctx->atoms.cache_flush->dirty = true;
sctx->atoms.s.cache_flush->dirty = true;
si_need_cs_space(sctx, 0, TRUE);
@ -985,6 +1002,14 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
}
#endif
/* Workaround for a VGT hang when streamout is enabled.
* It must be done after drawing. */
if (sctx->b.family == CHIP_HAWAII &&
(sctx->b.streamout.streamout_enabled ||
sctx->b.streamout.prims_gen_query_enabled)) {
sctx->b.flags |= R600_CONTEXT_VGT_STREAMOUT_SYNC;
}
/* Set the depth buffer as dirty. */
if (sctx->framebuffer.state.zsbuf) {
struct pipe_surface *surf = sctx->framebuffer.state.zsbuf;

2
dist/Mesa/src/gallium/drivers/radeonsi/sid.h vendored
View File

@ -83,6 +83,8 @@
#define PKT3_DRAW_INDEX_IMMD 0x2E /* not on CIK */
#define PKT3_NUM_INSTANCES 0x2F
#define PKT3_STRMOUT_BUFFER_UPDATE 0x34
#define PKT3_DRAW_INDEX_OFFSET_2 0x35
#define PKT3_DRAW_PREAMBLE 0x36 /* new on CIK, required on GFX7.2 and later */
#define PKT3_WRITE_DATA 0x37
#define PKT3_WRITE_DATA_DST_SEL(x) ((x) << 8)
#define PKT3_WRITE_DATA_DST_SEL_REG 0

6
dist/Mesa/src/gallium/state_trackers/clover/api/queue.cpp vendored
View File

@ -58,7 +58,11 @@ clRetainCommandQueue(cl_command_queue d_q) try {
CLOVER_API cl_int
clReleaseCommandQueue(cl_command_queue d_q) try {
if (obj(d_q).release())
auto &q = obj(d_q);
q.flush();
if (q.release())
delete pobj(d_q);
return CL_SUCCESS;

1
dist/Mesa/src/gallium/state_trackers/clover/core/timestamp.cpp vendored
View File

@ -30,6 +30,7 @@ using namespace clover;
timestamp::query::query(command_queue &q) :
q(q),
_query(q.pipe->create_query(q.pipe, PIPE_QUERY_TIMESTAMP)) {
q.pipe->end_query(q.pipe, _query);
}
timestamp::query::query(query &&other) :

4
dist/Mesa/src/gallium/state_trackers/egl/android/native_android.cpp vendored
View File

@ -147,10 +147,6 @@ get_pipe_format(int native)
case HAL_PIXEL_FORMAT_BGRA_8888:
fmt = PIPE_FORMAT_B8G8R8A8_UNORM;
break;
case HAL_PIXEL_FORMAT_RGBA_5551:
/* fmt = PIPE_FORMAT_A1B5G5R5_UNORM; */
case HAL_PIXEL_FORMAT_RGBA_4444:
/* fmt = PIPE_FORMAT_A4B4G4R4_UNORM; */
default:
ALOGE("unsupported native format 0x%x", native);
fmt = PIPE_FORMAT_NONE;

3
dist/Mesa/src/gallium/targets/egl-static/Android.mk vendored
View File

@ -52,6 +52,9 @@ LOCAL_C_INCLUDES += \
$(DRM_TOP)
endif
ifneq ($(filter freedreno, $(MESA_GPU_DRIVERS)),)
LOCAL_CFLAGS += -DGALLIUM_FREEDRENO
endif
ifneq ($(filter i915g, $(MESA_GPU_DRIVERS)),)
LOCAL_CFLAGS += -D_EGL_PIPE_I915=1
endif

37
dist/Mesa/src/gallium/winsys/freedreno/drm/Android.mk vendored Normal file
View File

@ -0,0 +1,37 @@
# Copyright (C) 2014 Emil Velikov <emil.l.velikov@gmail.com>
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included
# in all copies or substantial portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
LOCAL_PATH := $(call my-dir)
# get C_SOURCES
include $(LOCAL_PATH)/Makefile.sources
include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES)
LOCAL_C_INCLUDES := \
$(TARGET_OUT_HEADERS)/libdrm \
$(TARGET_OUT_HEADERS)/freedreno
LOCAL_MODULE := libmesa_winsys_freedreno
include $(GALLIUM_COMMON_MK)
include $(BUILD_STATIC_LIBRARY)

5
dist/Mesa/src/gallium/winsys/nouveau/drm/Android.mk vendored
View File

@ -30,10 +30,7 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES)
LOCAL_C_INCLUDES := \
$(DRM_TOP) \
$(DRM_TOP)/include/drm \
$(DRM_TOP)/nouveau
LOCAL_C_INCLUDES := $(TARGET_OUT_HEADERS)/libdrm
LOCAL_MODULE := libmesa_winsys_nouveau

4
dist/Mesa/src/gallium/winsys/radeon/drm/Android.mk vendored
View File

@ -30,9 +30,7 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := $(C_SOURCES)
LOCAL_C_INCLUDES := \
$(DRM_TOP) \
$(DRM_TOP)/include/drm
LOCAL_C_INCLUDES := $(TARGET_OUT_HEADERS)/libdrm
LOCAL_MODULE := libmesa_winsys_radeon

2
dist/Mesa/src/glsl/Android.mk vendored
View File

@ -39,12 +39,12 @@ LOCAL_SRC_FILES := \
$(LIBGLSL_FILES)
LOCAL_C_INCLUDES := \
external/astl/include \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/mesa
LOCAL_MODULE := libmesa_glsl
include external/stlport/libstlport.mk
include $(LOCAL_PATH)/Android.gen.mk
include $(MESA_COMMON_MK)
include $(BUILD_STATIC_LIBRARY)

4
dist/Mesa/src/mesa/drivers/common/meta_blit.c vendored
View File

@ -325,10 +325,12 @@ setup_glsl_blit_framebuffer(struct gl_context *ctx,
struct gl_renderbuffer *src_rb,
GLenum target)
{
unsigned texcoord_size;
/* target = GL_TEXTURE_RECTANGLE is not supported in GLES 3.0 */
assert(_mesa_is_desktop_gl(ctx) || target == GL_TEXTURE_2D);
unsigned texcoord_size = 2 + (src_rb->Depth > 1 ? 1 : 0);
texcoord_size = 2 + (src_rb->Depth > 1 ? 1 : 0);
_mesa_meta_setup_vertex_objects(&blit->VAO, &blit->VBO, true,
2, texcoord_size, 0);

12
dist/Mesa/src/mesa/drivers/common/meta_generate_mipmap.c vendored
View File

@ -43,6 +43,7 @@
#include "main/varray.h"
#include "main/viewport.h"
#include "drivers/common/meta.h"
#include "program/prog_instruction.h"
/**
@ -168,6 +169,8 @@ _mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum target,
GLenum faceTarget;
GLuint dstLevel;
GLuint samplerSave;
GLint swizzle[4];
GLboolean swizzleSaved = GL_FALSE;
if (fallback_required(ctx, target, texObj)) {
_mesa_generate_mipmap(ctx, target, texObj);
@ -231,6 +234,13 @@ _mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum target,
_mesa_TexParameteri(target, GL_GENERATE_MIPMAP, GL_FALSE);
if (texObj->_Swizzle != SWIZZLE_NOOP) {
static const GLint swizzleNoop[4] = { GL_RED, GL_GREEN, GL_BLUE, GL_ALPHA };
memcpy(swizzle, texObj->Swizzle, sizeof(swizzle));
swizzleSaved = GL_TRUE;
_mesa_TexParameteriv(target, GL_TEXTURE_SWIZZLE_RGBA, swizzleNoop);
}
/* Silence valgrind warnings about reading uninitialized stack. */
memset(verts, 0, sizeof(verts));
@ -347,4 +357,6 @@ _mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum target,
_mesa_TexParameteri(target, GL_TEXTURE_MAX_LEVEL, maxLevelSave);
if (genMipmapSave)
_mesa_TexParameteri(target, GL_GENERATE_MIPMAP, genMipmapSave);
if (swizzleSaved)
_mesa_TexParameteriv(target, GL_TEXTURE_SWIZZLE_RGBA, swizzle);
}

2
dist/Mesa/src/mesa/drivers/dri/i915/Android.mk vendored
View File

@ -42,7 +42,7 @@ LOCAL_C_INCLUDES := \
$(DRM_TOP)/intel
LOCAL_SRC_FILES := \
$(i915_C_FILES)
$(i915_FILES)
LOCAL_WHOLE_STATIC_LIBRARIES := \
$(MESA_DRI_WHOLE_STATIC_LIBRARIES)

54
dist/Mesa/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp vendored
View File

@ -273,6 +273,15 @@ fs_copy_prop_dataflow::dump_block_data() const
}
}
static bool
is_logic_op(enum opcode opcode)
{
return (opcode == BRW_OPCODE_AND ||
opcode == BRW_OPCODE_OR ||
opcode == BRW_OPCODE_XOR ||
opcode == BRW_OPCODE_NOT);
}
bool
fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry)
{
@ -331,6 +340,11 @@ fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry)
if (has_source_modifiers && entry->dst.type != inst->src[arg].type)
return false;
if (brw->gen >= 8 && (entry->src.negate || entry->src.abs) &&
is_logic_op(inst->opcode)) {
return false;
}
inst->src[arg].file = entry->src.file;
inst->src[arg].reg = entry->src.reg;
inst->src[arg].reg_offset = entry->src.reg_offset;
@ -346,8 +360,9 @@ fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry)
}
bool
fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
static bool
try_constant_propagate(struct brw_context *brw, fs_inst *inst,
acp_entry *entry)
{
bool progress = false;
@ -375,6 +390,12 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
progress = true;
break;
case SHADER_OPCODE_POW:
case SHADER_OPCODE_INT_QUOTIENT:
case SHADER_OPCODE_INT_REMAINDER:
if (brw->gen < 8)
break;
/* fallthrough */
case BRW_OPCODE_BFI1:
case BRW_OPCODE_ASR:
case BRW_OPCODE_SHL:
@ -479,6 +500,22 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
return progress;
}
static bool
can_propagate_from(fs_inst *inst)
{
return (inst->opcode == BRW_OPCODE_MOV &&
inst->dst.file == GRF &&
((inst->src[0].file == GRF &&
(inst->src[0].reg != inst->dst.reg ||
inst->src[0].reg_offset != inst->dst.reg_offset)) ||
inst->src[0].file == UNIFORM ||
inst->src[0].file == IMM) &&
inst->src[0].type == inst->dst.type &&
!inst->saturate &&
!inst->is_partial_write());
}
/* Walks a basic block and does copy propagation on it using the acp
* list.
*/
@ -500,7 +537,7 @@ fs_visitor::opt_copy_propagate_local(void *copy_prop_ctx, bblock_t *block,
foreach_list(entry_node, &acp[inst->src[i].reg % ACP_HASH_SIZE]) {
acp_entry *entry = (acp_entry *)entry_node;
if (try_constant_propagate(inst, entry))
if (try_constant_propagate(brw, inst, entry))
progress = true;
if (try_copy_propagate(inst, i, entry))
@ -533,16 +570,7 @@ fs_visitor::opt_copy_propagate_local(void *copy_prop_ctx, bblock_t *block,
/* If this instruction's source could potentially be folded into the
* operand of another instruction, add it to the ACP.
*/
if (inst->opcode == BRW_OPCODE_MOV &&
inst->dst.file == GRF &&
((inst->src[0].file == GRF &&
(inst->src[0].reg != inst->dst.reg ||
inst->src[0].reg_offset != inst->dst.reg_offset)) ||
inst->src[0].file == UNIFORM ||
inst->src[0].file == IMM) &&
inst->src[0].type == inst->dst.type &&
!inst->saturate &&
!inst->is_partial_write()) {
if (can_propagate_from(inst)) {
acp_entry *entry = ralloc(copy_prop_ctx, acp_entry);
entry->dst = inst->dst;
entry->src = inst->src[0];

8
dist/Mesa/src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp vendored
View File

@ -86,10 +86,10 @@ fs_live_variables::setup_one_read(bblock_t *block, fs_inst *inst,
*/
int end_ip = ip;
if (v->dispatch_width == 16 && (reg.stride == 0 ||
((v->pixel_x.file == GRF &&
v->pixel_x.reg == reg.reg) ||
(v->pixel_y.file == GRF &&
v->pixel_y.reg == reg.reg)))) {
reg.type == BRW_REGISTER_TYPE_UW ||
reg.type == BRW_REGISTER_TYPE_W ||
reg.type == BRW_REGISTER_TYPE_UB ||
reg.type == BRW_REGISTER_TYPE_B)) {
end_ip++;
}

29
dist/Mesa/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp vendored
View File

@ -73,7 +73,8 @@ is_channel_updated(vec4_instruction *inst, src_reg *values[4], int ch)
}
static bool
try_constant_propagation(vec4_instruction *inst, int arg, src_reg *values[4])
try_constant_propagation(struct brw_context *brw, vec4_instruction *inst,
int arg, src_reg *values[4])
{
/* For constant propagation, we only handle the same constant
* across all 4 channels. Some day, we should handle the 8-bit
@ -110,6 +111,12 @@ try_constant_propagation(vec4_instruction *inst, int arg, src_reg *values[4])
inst->src[arg] = value;
return true;
case SHADER_OPCODE_POW:
case SHADER_OPCODE_INT_QUOTIENT:
case SHADER_OPCODE_INT_REMAINDER:
if (brw->gen < 8)
break;
/* fallthrough */
case BRW_OPCODE_DP2:
case BRW_OPCODE_DP3:
case BRW_OPCODE_DP4:
@ -195,6 +202,15 @@ try_constant_propagation(vec4_instruction *inst, int arg, src_reg *values[4])
return false;
}
static bool
is_logic_op(enum opcode opcode)
{
return (opcode == BRW_OPCODE_AND ||
opcode == BRW_OPCODE_OR ||
opcode == BRW_OPCODE_XOR ||
opcode == BRW_OPCODE_NOT);
}
bool
vec4_visitor::try_copy_propagation(vec4_instruction *inst, int arg,
src_reg *values[4])
@ -233,6 +249,11 @@ vec4_visitor::try_copy_propagation(vec4_instruction *inst, int arg,
value.file != ATTR)
return false;
if (brw->gen >= 8 && (value.negate || value.abs) &&
is_logic_op(inst->opcode)) {
return false;
}
if (inst->src[arg].abs) {
value.negate = false;
value.abs = true;
@ -252,6 +273,10 @@ vec4_visitor::try_copy_propagation(vec4_instruction *inst, int arg,
if (has_source_modifiers && value.type != inst->src[arg].type)
return false;
if (has_source_modifiers &&
inst->opcode == SHADER_OPCODE_GEN4_SCRATCH_WRITE)
return false;
bool is_3src_inst = (inst->opcode == BRW_OPCODE_LRP ||
inst->opcode == BRW_OPCODE_MAD ||
inst->opcode == BRW_OPCODE_BFE ||
@ -343,7 +368,7 @@ vec4_visitor::opt_copy_propagation()
if (c != 4)
continue;
if (try_constant_propagation(inst, i, values) ||
if (try_constant_propagation(brw, inst, i, values) ||
try_copy_propagation(inst, i, values))
progress = true;
}

19
dist/Mesa/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp vendored
View File

@ -365,10 +365,12 @@ vec4_visitor::emit_math(opcode opcode, dst_reg dst, src_reg src)
return;
}
if (brw->gen >= 6) {
return emit_math1_gen6(opcode, dst, src);
if (brw->gen >= 8) {
emit(opcode, dst, src);
} else if (brw->gen >= 6) {
emit_math1_gen6(opcode, dst, src);
} else {
return emit_math1_gen4(opcode, dst, src);
emit_math1_gen4(opcode, dst, src);
}
}
@ -417,10 +419,12 @@ vec4_visitor::emit_math(enum opcode opcode,
return;
}
if (brw->gen >= 6) {
return emit_math2_gen6(opcode, dst, src0, src1);
if (brw->gen >= 8) {
emit(opcode, dst, src0, src1);
} else if (brw->gen >= 6) {
emit_math2_gen6(opcode, dst, src0, src1);
} else {
return emit_math2_gen4(opcode, dst, src0, src1);
emit_math2_gen4(opcode, dst, src0, src1);
}
}
@ -2474,7 +2478,7 @@ vec4_visitor::visit(ir_texture *ir)
} else if (ir->op == ir_txf_ms) {
emit(MOV(dst_reg(MRF, param_base + 1, sample_index_type, WRITEMASK_X),
sample_index));
if (brw->gen >= 7)
if (brw->gen >= 7) {
/* MCS data is in the first channel of `mcs`, but we need to get it into
* the .y channel of the second vec4 of params, so replicate .x across
* the whole vec4 and then mask off everything except .y
@ -2482,6 +2486,7 @@ vec4_visitor::visit(ir_texture *ir)
mcs.swizzle = BRW_SWIZZLE_XXXX;
emit(MOV(dst_reg(MRF, param_base + 1, glsl_type::uint_type, WRITEMASK_Y),
mcs));
}
inst->mlen++;
} else if (ir->op == ir_txd) {
const glsl_type *type = lod_type;

13
dist/Mesa/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp vendored
View File

@ -113,10 +113,8 @@ gen8_fs_generator::generate_fb_write(fs_inst *ir)
uint32_t msg_control = msg_type;
/* "Last Render Target Select" must be set on all writes to the last of
* the render targets (if using MRT), or always for a single RT scenario.
*/
if ((ir->target == c->key.nr_color_regions - 1) || !c->key.nr_color_regions)
/* Set "Last Render Target Select" on the final FB write. */
if (ir->eot)
msg_control |= (1 << 4); /* Last Render Target Select */
uint32_t surf_index =
@ -713,13 +711,8 @@ gen8_fs_generator::generate_set_omask(fs_inst *inst,
mask.hstride == BRW_HORIZONTAL_STRIDE_0);
}
unsigned save_exec_size = default_state.exec_size;
default_state.exec_size = BRW_EXECUTE_8;
gen8_instruction *mov = MOV(dst, retype(mask, dst.type));
gen8_set_mask_control(mov, BRW_MASK_DISABLE);
default_state.exec_size = save_exec_size;
}
/**
@ -973,7 +966,7 @@ gen8_fs_generator::generate_code(exec_list *instructions)
default_state.mask_control = ir->force_writemask_all;
default_state.flag_subreg_nr = ir->flag_subreg;
if (dispatch_width == 16 && !ir->force_uncompressed)
if (dispatch_width == 16 && !ir->force_uncompressed && !ir->force_sechalf)
default_state.exec_size = BRW_EXECUTE_16;
else
default_state.exec_size = BRW_EXECUTE_8;

54
dist/Mesa/src/mesa/drivers/dri/i965/gen8_surface_state.c vendored
View File

@ -134,6 +134,8 @@ gen8_update_texture_surface(struct gl_context *ctx,
struct intel_mipmap_tree *mt = intelObj->mt;
struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
struct intel_mipmap_tree *aux_mt = NULL;
uint32_t aux_mode = 0;
mesa_format format = intelObj->_Format;
if (tObj->Target == GL_TEXTURE_BUFFER) {
@ -155,6 +157,11 @@ gen8_update_texture_surface(struct gl_context *ctx,
pitch = mt->pitch;
}
if (mt->mcs_mt) {
aux_mt = mt->mcs_mt;
aux_mode = GEN8_SURFACE_AUX_MODE_MCS;
}
/* If this is a view with restricted NumLayers, then our effective depth
* is not just the miptree depth.
*/
@ -197,7 +204,13 @@ gen8_update_texture_surface(struct gl_context *ctx,
GEN7_SURFACE_MIN_LOD) |
(intelObj->_MaxLevel - tObj->BaseLevel); /* mip count */
surf[6] = 0;
if (aux_mt) {
surf[6] = SET_FIELD(mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) |
SET_FIELD((aux_mt->pitch / 128) - 1, GEN8_SURFACE_AUX_PITCH) |
aux_mode;
} else {
surf[6] = 0;
}
/* Handling GL_ALPHA as a surface format override breaks 1.30+ style
* texturing functions that return a float, as our code generation always
@ -219,8 +232,15 @@ gen8_update_texture_surface(struct gl_context *ctx,
*((uint64_t *) &surf[8]) = mt->bo->offset64 + mt->offset; /* reloc */
surf[10] = 0;
surf[11] = 0;
if (aux_mt) {
*((uint64_t *) &surf[10]) = aux_mt->bo->offset64;
drm_intel_bo_emit_reloc(brw->batch.bo, *surf_offset + 10 * 4,
aux_mt->bo, 0,
I915_GEM_DOMAIN_SAMPLER, 0);
} else {
surf[10] = 0;
surf[11] = 0;
}
surf[12] = 0;
/* Emit relocation to surface contents */
@ -286,6 +306,8 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
struct gl_context *ctx = &brw->ctx;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
struct intel_mipmap_tree *mt = irb->mt;
struct intel_mipmap_tree *aux_mt = NULL;
uint32_t aux_mode = 0;
unsigned width = mt->logical_width0;
unsigned height = mt->logical_height0;
unsigned pitch = mt->pitch;
@ -338,6 +360,11 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
__FUNCTION__, _mesa_get_format_name(rb_format));
}
if (mt->mcs_mt) {
aux_mt = mt->mcs_mt;
aux_mode = GEN8_SURFACE_AUX_MODE_MCS;
}
uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 13 * 4, 64,
&brw->wm.base.surf_offset[surf_index]);
@ -364,7 +391,13 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
surf[5] = irb->mt_level - irb->mt->first_level;
surf[6] = 0; /* Nothing of relevance. */
if (aux_mt) {
surf[6] = SET_FIELD(mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) |
SET_FIELD((aux_mt->pitch / 128) - 1, GEN8_SURFACE_AUX_PITCH) |
aux_mode;
} else {
surf[6] = 0;
}
surf[7] = mt->fast_clear_color_value |
SET_FIELD(HSW_SCS_RED, GEN7_SURFACE_SCS_R) |
@ -374,9 +407,16 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
*((uint64_t *) &surf[8]) = mt->bo->offset64; /* reloc */
/* Nothing of relevance. */
surf[10] = 0;
surf[11] = 0;
if (aux_mt) {
*((uint64_t *) &surf[10]) = aux_mt->bo->offset64;
drm_intel_bo_emit_reloc(brw->batch.bo,
brw->wm.base.surf_offset[surf_index] + 10 * 4,
aux_mt->bo, 0,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER);
} else {
surf[10] = 0;
surf[11] = 0;
}
surf[12] = 0;
drm_intel_bo_emit_reloc(brw->batch.bo,

5
dist/Mesa/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp vendored
View File

@ -183,7 +183,9 @@ gen8_vec4_generator::generate_gs_set_vertex_count(struct brw_reg eot_mrf_header,
/* Move the vertex count into the second MRF for the EOT write. */
assert(eot_mrf_header.file == BRW_MESSAGE_REGISTER_FILE);
int dst_nr = GEN7_MRF_HACK_START + eot_mrf_header.nr + 1;
MOV(retype(brw_vec8_grf(dst_nr, 0), BRW_REGISTER_TYPE_UD), src);
gen8_instruction *inst =
MOV(retype(brw_vec8_grf(dst_nr, 0), BRW_REGISTER_TYPE_UD), src);
gen8_set_mask_control(inst, BRW_MASK_DISABLE);
}
void
@ -894,6 +896,7 @@ gen8_vec4_generator::generate_code(exec_list *instructions)
default_state.predicate = ir->predicate;
default_state.predicate_inverse = ir->predicate_inverse;
default_state.saturate = ir->saturate;
default_state.mask_control = ir->force_writemask_all;
const unsigned pre_emit_nr_inst = nr_inst;

2
dist/Mesa/src/mesa/main/format_pack.c vendored
View File

@ -888,7 +888,7 @@ pack_float_R_UNORM8(const GLfloat src[4], void *dst)
static void
pack_ubyte_R8G8_UNORM(const GLubyte src[4], void *dst)
{
GLubyte *d = ((GLubyte *) dst);
GLushort *d = ((GLushort *) dst);
*d = PACK_COLOR_88(src[GCOMP], src[RCOMP]);
}

1
dist/Mesa/src/mesa/main/get_hash_params.py vendored
View File

@ -84,6 +84,7 @@ descriptor=[
[ "SAMPLES_ARB", "BUFFER_INT(Visual.samples), extra_new_buffers" ],
# GL_ARB_sample_shading
[ "SAMPLE_SHADING_ARB", "CONTEXT_BOOL(Multisample.SampleShading), extra_gl40_ARB_sample_shading" ],
[ "MIN_SAMPLE_SHADING_VALUE_ARB", "CONTEXT_FLOAT(Multisample.MinSampleShadingValue), extra_gl40_ARB_sample_shading" ],
# GL_SGIS_generate_mipmap

164
dist/Mesa/src/mesa/main/glformats.c vendored
View File

@ -355,6 +355,170 @@ _mesa_bytes_per_vertex_attrib(GLint comps, GLenum type)
}
}
/**
* Test if the given format is unsized.
*/
GLboolean
_mesa_is_enum_format_unsized(GLenum format)
{
switch (format) {
case GL_RGBA:
case GL_BGRA:
case GL_ABGR_EXT:
case GL_RGB:
case GL_BGR:
case GL_RG:
case GL_RED:
case GL_GREEN:
case GL_BLUE:
case GL_ALPHA:
case GL_INTENSITY:
case GL_LUMINANCE:
case GL_LUMINANCE_ALPHA:
case GL_SRGB:
case GL_SRGB_ALPHA:
case GL_SLUMINANCE:
case GL_SLUMINANCE_ALPHA:
case GL_RGBA_SNORM:
case GL_RGB_SNORM:
case GL_RG_SNORM:
case GL_RED_SNORM:
case GL_ALPHA_SNORM:
case GL_INTENSITY_SNORM:
case GL_LUMINANCE_SNORM:
case GL_LUMINANCE_ALPHA_SNORM:
case GL_RED_INTEGER:
case GL_GREEN_INTEGER:
case GL_BLUE_INTEGER:
case GL_ALPHA_INTEGER:
case GL_RGB_INTEGER:
case GL_RGBA_INTEGER:
case GL_BGR_INTEGER:
case GL_BGRA_INTEGER:
case GL_RG_INTEGER:
case GL_LUMINANCE_INTEGER_EXT:
case GL_LUMINANCE_ALPHA_INTEGER_EXT:
case GL_DEPTH_COMPONENT:
case GL_DEPTH_STENCIL:
case GL_STENCIL_INDEX:
return GL_TRUE;
default:
return GL_FALSE;
}
}
/**
* Test if the given format is a UNORM (unsigned-normalized) format.
*/
GLboolean
_mesa_is_enum_format_unorm(GLenum format)
{
switch(format) {
case GL_RED:
case GL_GREEN:
case GL_BLUE:
case GL_ALPHA:
case GL_ALPHA4:
case GL_ALPHA8:
case GL_ALPHA12:
case GL_ALPHA16:
case 1:
case GL_LUMINANCE:
case GL_SLUMINANCE:
case GL_LUMINANCE4:
case GL_LUMINANCE8:
case GL_LUMINANCE12:
case GL_LUMINANCE16:
case 2:
case GL_LUMINANCE_ALPHA:
case GL_SLUMINANCE_ALPHA:
case GL_LUMINANCE4_ALPHA4:
case GL_LUMINANCE6_ALPHA2:
case GL_LUMINANCE8_ALPHA8:
case GL_LUMINANCE12_ALPHA4:
case GL_LUMINANCE12_ALPHA12:
case GL_LUMINANCE16_ALPHA16:
case GL_INTENSITY:
case GL_INTENSITY4:
case GL_INTENSITY8:
case GL_INTENSITY12:
case GL_INTENSITY16:
case GL_R8:
case GL_R16:
case GL_RG:
case GL_RG8:
case GL_RG16:
case 3:
case GL_RGB:
case GL_BGR:
case GL_SRGB:
case GL_R3_G3_B2:
case GL_RGB4:
case GL_RGB5:
case GL_RGB565:
case GL_RGB8:
case GL_RGB10:
case GL_RGB12:
case GL_RGB16:
case 4:
case GL_ABGR_EXT:
case GL_RGBA:
case GL_BGRA:
case GL_SRGB_ALPHA:
case GL_RGBA2:
case GL_RGBA4:
case GL_RGB5_A1:
case GL_RGBA8:
case GL_RGB10_A2:
case GL_RGBA12:
case GL_RGBA16:
return GL_TRUE;
default:
return GL_FALSE;
}
}
/**
* Test if the given format is a SNORM (signed-normalized) format.
*/
GLboolean
_mesa_is_enum_format_snorm(GLenum format)
{
switch (format) {
/* signed, normalized texture formats */
case GL_RED_SNORM:
case GL_R8_SNORM:
case GL_R16_SNORM:
case GL_RG_SNORM:
case GL_RG8_SNORM:
case GL_RG16_SNORM:
case GL_RGB_SNORM:
case GL_RGB8_SNORM:
case GL_RGB16_SNORM:
case GL_RGBA_SNORM:
case GL_RGBA8_SNORM:
case GL_RGBA16_SNORM:
case GL_ALPHA_SNORM:
case GL_ALPHA8_SNORM:
case GL_ALPHA16_SNORM:
case GL_LUMINANCE_SNORM:
case GL_LUMINANCE8_SNORM:
case GL_LUMINANCE16_SNORM:
case GL_LUMINANCE_ALPHA_SNORM:
case GL_LUMINANCE8_ALPHA8_SNORM:
case GL_LUMINANCE16_ALPHA16_SNORM:
case GL_INTENSITY_SNORM:
case GL_INTENSITY8_SNORM:
case GL_INTENSITY16_SNORM:
return GL_TRUE;
default:
return GL_FALSE;
}
}
/**
* Test if the given format is an integer (non-normalized) format.

9
dist/Mesa/src/mesa/main/glformats.h vendored
View File

@ -59,6 +59,15 @@ _mesa_is_type_integer(GLenum type);
extern GLboolean
_mesa_is_type_unsigned(GLenum type);
extern GLboolean
_mesa_is_enum_format_unsized(GLenum format);
extern GLboolean
_mesa_is_enum_format_unorm(GLenum format);
extern GLboolean
_mesa_is_enum_format_snorm(GLenum format);
extern GLboolean
_mesa_is_enum_format_integer(GLenum format);

25
dist/Mesa/src/mesa/main/texstorage.c vendored
View File

@ -41,6 +41,7 @@
#include "texstorage.h"
#include "textureview.h"
#include "mtypes.h"
#include "glformats.h"
@ -53,6 +54,13 @@
static GLboolean
legal_texobj_target(struct gl_context *ctx, GLuint dims, GLenum target)
{
if (_mesa_is_gles3(ctx)
&& target != GL_TEXTURE_2D
&& target != GL_TEXTURE_CUBE_MAP
&& target != GL_TEXTURE_3D
&& target != GL_TEXTURE_2D_ARRAY)
return GL_FALSE;
switch (dims) {
case 1:
switch (target) {
@ -294,6 +302,23 @@ tex_storage_error_check(struct gl_context *ctx, GLuint dims, GLenum target,
return GL_TRUE;
}
/* From section 3.8.6, page 146 of OpenGL ES 3.0 spec:
*
* "The ETC2/EAC texture compression algorithm supports only
* two-dimensional images. If internalformat is an ETC2/EAC format,
* CompressedTexImage3D will generate an INVALID_OPERATION error if
* target is not TEXTURE_2D_ARRAY."
*
* This should also be applicable for glTexStorage3D().
*/
if (_mesa_is_compressed_format(ctx, internalformat)
&& !_mesa_target_can_be_compressed(ctx, target, internalformat)) {
_mesa_error(ctx, _mesa_is_desktop_gl(ctx)?
GL_INVALID_ENUM : GL_INVALID_OPERATION,
"glTexStorage3D(internalformat = %s)",
_mesa_lookup_enum_by_nr(internalformat));
}
/* levels check */
if (levels < 1) {
_mesa_error(ctx, GL_INVALID_VALUE, "glTexStorage%uD(levels < 1)",

64
dist/Mesa/src/mesa/state_tracker/st_glsl_to_tgsi.cpp vendored
View File

@ -74,14 +74,6 @@ extern "C" {
(1 << PROGRAM_CONSTANT) | \
(1 << PROGRAM_UNIFORM))
/**
* Maximum number of temporary registers.
*
* It is too big for stack allocated arrays -- it will cause stack overflow on
* Windows and likely Mac OS X.
*/
#define MAX_TEMPS 4096
/**
* Maximum number of arrays
*/
@ -1364,7 +1356,7 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir)
/* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
*/
if (ir->operation == ir_binop_logic_and) {
if (!native_integers && ir->operation == ir_binop_logic_and) {
if (try_emit_mad_for_and_not(ir, 1))
return;
if (try_emit_mad_for_and_not(ir, 0))
@ -2776,7 +2768,13 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir)
}
break;
case ir_txb:
opcode = is_cube_array ? TGSI_OPCODE_TXB2 : TGSI_OPCODE_TXB;
if (is_cube_array ||
sampler_type == glsl_type::samplerCubeShadow_type) {
opcode = TGSI_OPCODE_TXB2;
}
else {
opcode = TGSI_OPCODE_TXB;
}
ir->lod_info.bias->accept(this);
lod_info = this->result;
if (ir->offset) {
@ -3255,14 +3253,10 @@ get_src_arg_mask(st_dst_reg dst, st_src_reg src)
void
glsl_to_tgsi_visitor::simplify_cmp(void)
{
unsigned *tempWrites;
int tempWritesSize = 0;
unsigned *tempWrites = NULL;
unsigned outputWrites[MAX_PROGRAM_OUTPUTS];
tempWrites = new unsigned[MAX_TEMPS];
if (!tempWrites) {
return;
}
memset(tempWrites, 0, sizeof(unsigned) * MAX_TEMPS);
memset(outputWrites, 0, sizeof(outputWrites));
foreach_list(node, &this->instructions) {
@ -3285,7 +3279,19 @@ glsl_to_tgsi_visitor::simplify_cmp(void)
prevWriteMask = outputWrites[inst->dst.index];
outputWrites[inst->dst.index] |= inst->dst.writemask;
} else if (inst->dst.file == PROGRAM_TEMPORARY) {
assert(inst->dst.index < MAX_TEMPS);
if (inst->dst.index >= tempWritesSize) {
const int inc = 4096;
tempWrites = (unsigned*)
realloc(tempWrites,
(tempWritesSize + inc) * sizeof(unsigned));
if (!tempWrites)
return;
memset(tempWrites + tempWritesSize, 0, inc * sizeof(unsigned));
tempWritesSize += inc;
}
prevWriteMask = tempWrites[inst->dst.index];
tempWrites[inst->dst.index] |= inst->dst.writemask;
} else
@ -3304,7 +3310,7 @@ glsl_to_tgsi_visitor::simplify_cmp(void)
}
}
delete [] tempWrites;
free(tempWrites);
}
/* Replaces all references to a temporary register index with another index. */
@ -4165,7 +4171,9 @@ struct label {
struct st_translate {
struct ureg_program *ureg;
struct ureg_dst temps[MAX_TEMPS];
unsigned temps_size;
struct ureg_dst *temps;
struct ureg_dst arrays[MAX_ARRAYS];
struct ureg_src *constants;
struct ureg_src *immediates;
@ -4298,9 +4306,20 @@ dst_register(struct st_translate *t,
return ureg_dst_undef();
case PROGRAM_TEMPORARY:
assert(index >= 0);
assert(index < (int) Elements(t->temps));
/* Allocate space for temporaries on demand. */
if (index >= t->temps_size) {
const int inc = 4096;
t->temps = (struct ureg_dst*)
realloc(t->temps,
(t->temps_size + inc) * sizeof(struct ureg_dst));
if (!t->temps)
return ureg_dst_undef();
memset(t->temps + t->temps_size, 0, inc * sizeof(struct ureg_dst));
t->temps_size += inc;
}
if (ureg_dst_is_undef(t->temps[index]))
t->temps[index] = ureg_DECL_local_temporary(t->ureg);
@ -5123,6 +5142,7 @@ st_translate_program(
out:
if (t) {
free(t->temps);
free(t->insn);
free(t->labels);
free(t->constants);