Import Mesa 19.0.8

This commit is contained in:
jsg 2019-07-01 07:44:02 +00:00
parent b61f69c71c
commit b1b22c2ae6
23 changed files with 477 additions and 49 deletions

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@ -31,7 +31,8 @@ Compatibility contexts may report a lower version depending on each driver.
<h2>SHA256 checksums</h2>
<pre>
TBD
b6e6b78c23bec15d1e7887c78b7ad00ce395ea1b20ad8aab6ce441f55f724e70 mesa-19.0.5.tar.gz
6aecb7f67c136768692fb3c33a54196186c6c4fcafab7973516a355e1a54f831 mesa-19.0.5.tar.xz
</pre>

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@ -0,0 +1,153 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 19.0.5 Release Notes / May 21, 2019</h1>
<p>
Mesa 19.0.6 is a bug fix release which fixes bugs found since the 19.0.5 release.
</p>
<p>
Mesa 19.0.6 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
SHA256: ac8e9ea388ec5c69f5a690190edf8ede602afdbaeea62d49e108057737430ac7 mesa-19.0.6.tar.gz
SHA256: 2db2f2fcaa4048b16e066fad76b8a93944f7d06d329972b0f5fd5ce692ce3d24 mesa-19.0.6.tar.xz
</pre>
<h2>New features</h2>
<p>N/A</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=110721">Bug 110721</a> - graphics corruption on steam client with mesa 19.1.0 rc3 on polaris</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=110761">Bug 110761</a> - Huge problems between Mesa and Electron engine apps</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=110784">Bug 110784</a> - [regression][bisected] Reverting 'expose 0 shader binary formats for compat profiles for Qt' causes get_program_binary failures on Iris</li>
</ul>
<h2>Changes</h2>
<p>Alok Hota (2):</p>
<ul>
<li>gallium/swr: Param defaults for unhandled PIPE_CAPs</li>
<li>gallium/aux: add PIPE_CAP_MAX_VARYINGS to u_screen</li>
</ul>
<p>Bas Nieuwenhuizen (1):</p>
<ul>
<li>nir: Actually propagate progress in nir_opt_move_load_ubo.</li>
</ul>
<p>Chenglei Ren (1):</p>
<ul>
<li>anv/android: fix missing dependencies issue during parallel build</li>
</ul>
<p>Christian Gmeiner (1):</p>
<ul>
<li>etnaviv: use the correct uniform dirty bits</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>Revert "mesa: unreference current winsys buffers when unbinding winsys buffers"</li>
</ul>
<p>Deepak Rawat (1):</p>
<ul>
<li>winsys/drm: Fix out of scope variable usage</li>
</ul>
<p>Dylan Baker (6):</p>
<ul>
<li>docs: Add Sha256 sums for 19.0.5</li>
<li>cherry-ignore: Add a commit that was manually backported</li>
<li>cherry-ignore: add another 19.1 only patch</li>
<li>cherry-ignore: add another 19.1 only patch</li>
<li>gallium: wrap u_screen in extern "C" for c++</li>
<li>VERSION: bump to 19.0.6</li>
</ul>
<p>Emil Velikov (1):</p>
<ul>
<li>egl/dri: flesh out and use dri2_create_drawable()</li>
</ul>
<p>Jan Zielinski (1):</p>
<ul>
<li>swr/rast: fix 32-bit compilation on Linux</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>vulkan: fix build dependency issue with generated files</li>
</ul>
<p>Marek Olšák (2):</p>
<ul>
<li>u_blitter: don't fail mipmap generation for depth formats containing stencil</li>
<li>ac: fix a typo in ac_build_wg_scan_bottom</li>
</ul>
<p>Philipp Zabel (1):</p>
<ul>
<li>etnaviv: fill missing offset in etna_resource_get_handle</li>
</ul>
<p>Rob Clark (3):</p>
<ul>
<li>freedreno/ir3: dynamic UBO indexing vs 64b pointers</li>
<li>freedreno/ir3: set more barrier bits</li>
<li>freedreno/a6xx: fix GPU crash on small render targets</li>
</ul>
<p>Sagar Ghuge (1):</p>
<ul>
<li>intel/compiler: Fix assertions in brw_alu3</li>
</ul>
<p>Samuel Pitoiset (2):</p>
<ul>
<li>radv: allocate more space in the CS when emitting events</li>
<li>radv: do not use gfx fast depth clears for layered depth/stencil images</li>
</ul>
<p>Timothy Arceri (2):</p>
<ul>
<li>Revert "st/mesa: expose 0 shader binary formats for compat profiles for Qt"</li>
<li>st/glsl: make sure to propagate initialisers to driver storage</li>
</ul>
</div>
</body>
</html>

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@ -0,0 +1,150 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 19.0.6 Release Notes / June 24, 2019</h1>
<p>
Mesa 19.0.7 is a bug fix release which fixes bugs found since the 19.0.6 release.
</p>
<p>
Mesa 19.0.7 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
81119f0cbbd1fbe7c0574e1e2690e0dae8868124d24c875f5fb76f165db3a54d mesa-19.0.7.tar.gz
d7bf3db2e442fe5eeb96144f8508d94f04aededdf37af477e644638d366b2b28 mesa-19.0.7.tar.xz
</pre>
<h2>New features</h2>
<p>N/A</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=110302">Bug 110302</a> - [bisected][regression] piglit egl-create-pbuffer-surface and egl-gl-colorspace regressions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=110921">Bug 110921</a> - virgl on OpenGL 3.3 host regressed to OpenGL 2.1</li>
</ul>
<h2>Changes</h2>
<p>Bas Nieuwenhuizen (5):</p>
<ul>
<li>radv: Prevent out of bound shift on 32-bit builds.</li>
<li>radv: Decompress DCC when the image format is not allowed for buffers.</li>
<li>radv: Fix vulkan build in meson.</li>
<li>anv: Fix vulkan build in meson.</li>
<li>meson: Allow building radeonsi with just the android platform.</li>
</ul>
<p>Charmaine Lee (1):</p>
<ul>
<li>svga: Remove unnecessary check for the pre flush bit for setting vertex buffers</li>
</ul>
<p>Deepak Rawat (1):</p>
<ul>
<li>winsys/svga/drm: Fix 32-bit RPCI send message</li>
</ul>
<p>Dylan Baker (3):</p>
<ul>
<li>docs: Add SHA256 sums for 19.0.6</li>
<li>cherry-ignore: add additional 19.1 only patches</li>
<li>Bump version for 19.0.7 release</li>
</ul>
<p>Emil Velikov (1):</p>
<ul>
<li>mapi: correctly handle the full offset table</li>
</ul>
<p>Gert Wollny (2):</p>
<ul>
<li>virgl: Add a caps feature check version</li>
<li>virgl: Assume sRGB write control for older guest kernels or virglrenderer hosts</li>
</ul>
<p>Haihao Xiang (1):</p>
<ul>
<li>i965: support UYVY for external import only</li>
</ul>
<p>Jason Ekstrand (2):</p>
<ul>
<li>nir/propagate_invariant: Don't add NULL vars to the hash table</li>
<li>anv: Set STATE_BASE_ADDRESS upper bounds on gen7</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>glsl: Fix out of bounds read in shader_cache_read_program_metadata</li>
</ul>
<p>Kevin Strasser (2):</p>
<ul>
<li>gallium/winsys/kms: Fix dumb buffer bpp</li>
<li>st/mesa: Add rgbx handling for fp formats</li>
</ul>
<p>Lionel Landwerlin (2):</p>
<ul>
<li>intel/perf: fix EuThreadsCount value in performance equations</li>
<li>intel/perf: improve dynamic loading config detection</li>
</ul>
<p>Mathias Fröhlich (1):</p>
<ul>
<li>egl: Don't add hardware device if there is no render node v2.</li>
</ul>
<p>Nanley Chery (1):</p>
<ul>
<li>anv/cmd_buffer: Initalize the clear color struct for CNL+</li>
</ul>
<p>Nataraj Deshpande (1):</p>
<ul>
<li>anv: Fix check for isl_fmt in assert</li>
</ul>
<p>Samuel Pitoiset (5):</p>
<ul>
<li>radv: fix alpha-to-coverage when there is unused color attachments</li>
<li>radv: fix setting CB_SHADER_MASK for dual source blending</li>
<li>radv: fix occlusion queries on VegaM</li>
<li>radv: fix VK_EXT_memory_budget if one heap isn't available</li>
<li>radv: fix FMASK expand with SRGB formats</li>
</ul>
</div>
</body>
</html>

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@ -0,0 +1,61 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 19.0.8 Release Notes / June 26, 2019</h1>
<p>
Mesa 19.0.8 is an emergency bug fix release which fixes a critical bug found in the 19.0.7 release.
</p>
<p>
Mesa 19.0.8 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
TBD
</pre>
<h2>New features</h2>
<p>N/A</p>
<h2>Bug fixes</h2>
<p>None</p>
<h2>Changes</h2>
<p>Dylan Baker (2):</p>
<ul>
<li>docs: Add SHA256 sums for 19.0.7</li>
<li>version: bump to 19.0.8</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>egl/x11: calloc dri2_surf so it's properly zeroed</li>
</ul>
</div>
</body>
</html>

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@ -327,12 +327,12 @@ else
with_egl = false
endif
if with_egl and not (with_platform_drm or with_platform_surfaceless)
if with_egl and not (with_platform_drm or with_platform_surfaceless or with_platform_android)
if with_gallium_radeonsi
error('RadeonSI requires drm or surfaceless platform when using EGL')
error('RadeonSI requires the drm, surfaceless or android platform when using EGL')
endif
if with_gallium_virgl
error('Virgl requires drm or surfaceless platform when using EGL')
error('Virgl requires the drm, surfaceless or android platform when using EGL')
endif
endif

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@ -128,21 +128,26 @@ if with_xlib_lease
radv_flags += '-DVK_USE_PLATFORM_XLIB_XRANDR_EXT'
endif
if with_platform_android
radv_flags += [
'-DVK_USE_PLATFORM_ANDROID_KHR'
]
libradv_files += files('radv_android.c')
endif
libvulkan_radeon = shared_library(
'vulkan_radeon',
[libradv_files, radv_entrypoints, radv_extensions_c, vk_format_table_c, sha1_h],
include_directories : [
inc_common, inc_amd, inc_amd_common, inc_compiler, inc_vulkan_util,
inc_vulkan_wsi,
inc_common, inc_amd, inc_amd_common, inc_compiler, inc_vulkan_wsi,
],
link_with : [
libamd_common, libamdgpu_addrlib, libvulkan_util, libvulkan_wsi,
libmesa_util,
libamd_common, libamdgpu_addrlib, libvulkan_wsi, libmesa_util,
],
dependencies : [
dep_llvm, dep_libdrm_amdgpu, dep_thread, dep_elf, dep_dl, dep_m,
dep_valgrind, radv_deps,
idep_nir,
idep_nir, idep_vulkan_util,
],
c_args : [c_vis_args, no_override_init_args, radv_flags],
cpp_args : [cpp_vis_args, radv_flags],

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@ -24,6 +24,7 @@
#include "radv_meta.h"
#include "radv_private.h"
#include "vk_format.h"
static nir_shader *
build_fmask_expand_compute_shader(struct radv_device *device, int samples)
@ -132,7 +133,7 @@ radv_expand_fmask_image_inplace(struct radv_cmd_buffer *cmd_buffer,
.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
.image = radv_image_to_handle(image),
.viewType = radv_meta_get_view_type(image),
.format = image->vk_format,
.format = vk_format_no_srgb(image->vk_format),
.subresourceRange = {
.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
.baseMipLevel = 0,

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@ -91,7 +91,7 @@ move_load_ubo(nir_block *block)
}
}
return false;
return progress;
}
bool

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@ -65,12 +65,21 @@ add_cf_node(nir_cf_node *cf, struct set *invariants)
static void
add_var(nir_variable *var, struct set *invariants)
{
_mesa_set_add(invariants, var);
/* Because we pass the result of nir_intrinsic_get_var directly to this
* function, it's possible for var to be NULL if, for instance, there's a
* cast somewhere in the chain.
*/
if (var != NULL)
_mesa_set_add(invariants, var);
}
static bool
var_is_invariant(nir_variable *var, struct set * invariants)
{
/* Because we pass the result of nir_intrinsic_get_var directly to this
* function, it's possible for var to be NULL if, for instance, there's a
* cast somewhere in the chain.
*/
return var && (var->data.invariant || _mesa_set_search(invariants, var));
}

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@ -108,9 +108,9 @@ static int
_eglAddDRMDevice(drmDevicePtr device, _EGLDevice **out_dev)
{
_EGLDevice *dev;
const int wanted_nodes = 1 << DRM_NODE_RENDER | 1 << DRM_NODE_PRIMARY;
if ((device->available_nodes & (1 << DRM_NODE_PRIMARY |
1 << DRM_NODE_RENDER)) == 0)
if ((device->available_nodes & wanted_nodes) != wanted_nodes)
return -1;
dev = _eglGlobal.DeviceList;

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@ -686,8 +686,8 @@ emit_intrinsic_load_ubo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
base_lo = create_uniform(b, ubo + (src0->regs[1]->iim_val * ptrsz));
base_hi = create_uniform(b, ubo + (src0->regs[1]->iim_val * ptrsz) + 1);
} else {
base_lo = create_uniform_indirect(b, ubo, ir3_get_addr(ctx, src0, 4));
base_hi = create_uniform_indirect(b, ubo + 1, ir3_get_addr(ctx, src0, 4));
base_lo = create_uniform_indirect(b, ubo, ir3_get_addr(ctx, src0, ptrsz));
base_hi = create_uniform_indirect(b, ubo + 1, ir3_get_addr(ctx, src0, ptrsz));
}
/* note: on 32bit gpu's base_hi is ignored and DCE'd */
@ -1511,6 +1511,7 @@ emit_intrinsic_barrier(struct ir3_context *ctx, nir_intrinsic_instr *intr)
barrier->cat7.g = true;
barrier->cat7.r = true;
barrier->cat7.w = true;
barrier->cat7.l = true;
barrier->barrier_class = IR3_BARRIER_IMAGE_W |
IR3_BARRIER_BUFFER_W;
barrier->barrier_conflict =

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@ -337,6 +337,9 @@ u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen,
case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL:
return 1;
case PIPE_CAP_MAX_VARYINGS:
return 8;
default:
unreachable("bad PIPE_CAP_*");
}

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@ -24,6 +24,14 @@
struct pipe_screen;
enum pipe_cap;
#ifdef __cplusplus
extern "C" {
#endif
int
u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen,
enum pipe_cap param);
#ifdef __cplusplus
};
#endif

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@ -588,6 +588,13 @@ set_blit_scissor(struct fd_batch *batch, struct fd_ringbuffer *ring)
blit_scissor.maxx = MIN2(pfb->width, batch->max_scissor.maxx);
blit_scissor.maxy = MIN2(pfb->height, batch->max_scissor.maxy);
/* NOTE: blob switches to CP_BLIT instead of CP_EVENT_WRITE:BLIT for
* small render targets. But since we align pitch to binw I think
* we can get away avoiding GPU hangs a simpler way, by just rounding
* up the blit scissor:
*/
blit_scissor.maxx = MAX2(blit_scissor.maxx, batch->ctx->screen->gmem_alignw);
OUT_PKT4(ring, REG_A6XX_RB_BLIT_SCISSOR_TL, 2);
OUT_RING(ring,
A6XX_RB_BLIT_SCISSOR_TL_X(blit_scissor.minx) |

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@ -358,6 +358,7 @@ struct virgl_caps_v2 {
uint32_t max_atomic_counter_buffers[6];
uint32_t max_combined_atomic_counters;
uint32_t max_combined_atomic_counter_buffers;
uint32_t host_feature_check_version;
};
union virgl_caps {

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@ -150,5 +150,6 @@ static inline void virgl_ws_fill_new_caps_defaults(struct virgl_drm_caps *caps)
caps->caps.v2.max_image_samples = 0;
caps->caps.v2.max_compute_work_group_invocations = 0;
caps->caps.v2.max_compute_shared_memory_size = 0;
caps->caps.v2.host_feature_check_version = 0;
}
#endif

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@ -177,17 +177,23 @@ typedef uint64_t VMW_REG;
typedef uint32_t VMW_REG;
/* In the 32-bit version of this macro, we use "m" because there is no
* more register left for bp
/* In the 32-bit version of this macro, we store bp in a memory location
* because we've ran out of registers.
* Now we can't reference that memory location while we've modified
* %esp or %ebp, so we first push it on the stack, just before we push
* %ebp, and then when we need it we read it from the stack where we
* just pushed it.
*/
#define VMW_PORT_HB_OUT(cmd, in_cx, in_si, in_di, \
port_num, magic, bp, \
ax, bx, cx, dx, si, di) \
({ \
__asm__ volatile ("push %%ebp;" \
"mov %12, %%ebp;" \
__asm__ volatile ("push %12;" \
"push %%ebp;" \
"mov 0x04(%%esp), %%ebp;" \
"rep outsb;" \
"pop %%ebp;" : \
"pop %%ebp;" \
"add $0x04, %%esp;" : \
"=a"(ax), \
"=b"(bx), \
"=c"(cx), \
@ -209,10 +215,12 @@ typedef uint32_t VMW_REG;
port_num, magic, bp, \
ax, bx, cx, dx, si, di) \
({ \
__asm__ volatile ("push %%ebp;" \
"mov %12, %%ebp;" \
__asm__ volatile ("push %12;" \
"push %%ebp;" \
"mov 0x04(%%esp), %%ebp;" \
"rep insb;" \
"pop %%ebp" : \
"pop %%ebp;" \
"add $0x04, %%esp;" : \
"=a"(ax), \
"=b"(bx), \
"=c"(cx), \
@ -418,6 +426,7 @@ vmw_svga_winsys_host_log(struct svga_winsys_screen *sws, const char *log)
struct rpc_channel channel;
char *msg;
int msg_len;
int ret;
#ifdef MSG_NOT_IMPLEMENTED
return;
@ -435,12 +444,14 @@ vmw_svga_winsys_host_log(struct svga_winsys_screen *sws, const char *log)
util_sprintf(msg, "log %s", log);
if (vmw_open_channel(&channel, RPCI_PROTOCOL_NUM) ||
vmw_send_msg(&channel, msg) ||
vmw_close_channel(&channel)) {
debug_printf("Failed to send log\n");
if (!(ret = vmw_open_channel(&channel, RPCI_PROTOCOL_NUM))) {
ret = vmw_send_msg(&channel, msg);
vmw_close_channel(&channel);
}
if (ret)
debug_printf("Failed to send log\n");
FREE(msg);
return;

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@ -182,7 +182,7 @@ kms_sw_displaytarget_create(struct sw_winsys *ws,
kms_sw_dt->format = format;
memset(&create_req, 0, sizeof(create_req));
create_req.bpp = 32;
create_req.bpp = util_format_get_blocksizebits(format);
create_req.width = width;
create_req.height = height;
ret = drmIoctl(kms_sw->fd, DRM_IOCTL_MODE_CREATE_DUMB, &create_req);

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@ -98,20 +98,20 @@ foreach g : [['70', ['gen7_cmd_buffer.c']], ['75', ['gen7_cmd_buffer.c']],
'anv_gen@0@'.format(_gen),
[anv_gen_files, g[1], anv_entrypoints[0], anv_extensions_h],
include_directories : [
inc_common, inc_compiler, inc_drm_uapi, inc_intel, inc_vulkan_util,
inc_vulkan_wsi,
inc_common, inc_compiler, inc_drm_uapi, inc_intel, inc_vulkan_wsi,
],
c_args : [
c_vis_args, no_override_init_args, c_sse2_args,
'-DGEN_VERSIONx10=@0@'.format(_gen),
],
dependencies : [dep_libdrm, dep_valgrind, idep_nir_headers, idep_genxml],
dependencies : [
dep_libdrm, dep_valgrind, idep_nir_headers, idep_genxml, idep_vulkan_util_headers,
],
)
endforeach
libanv_files = files(
'anv_allocator.c',
'anv_android_stubs.c',
'anv_android.h',
'anv_batch_chain.c',
'anv_blorp.c',
@ -144,6 +144,7 @@ anv_deps = [
dep_libdrm,
dep_valgrind,
idep_nir_headers,
idep_vulkan_util_headers,
]
anv_flags = [
c_vis_args,
@ -176,6 +177,13 @@ if with_xlib_lease
anv_flags += '-DVK_USE_PLATFORM_XLIB_XRANDR_EXT'
endif
if with_platform_android
anv_flags += '-DVK_USE_PLATFORM_ANDROID_KHR'
libanv_files += files('anv_android.c')
else
libanv_files += files('anv_android_stubs.c')
endif
libanv_common = static_library(
'anv_common',
[
@ -183,7 +191,7 @@ libanv_common = static_library(
gen_xml_pack,
],
include_directories : [
inc_common, inc_intel, inc_compiler, inc_drm_uapi, inc_vulkan_util,
inc_common, inc_intel, inc_compiler, inc_drm_uapi,
inc_vulkan_wsi,
],
c_args : anv_flags,
@ -194,16 +202,15 @@ libvulkan_intel = shared_library(
'vulkan_intel',
[files('anv_gem.c'), anv_entrypoints[0], anv_extensions_h],
include_directories : [
inc_common, inc_intel, inc_compiler, inc_drm_uapi, inc_vulkan_util,
inc_vulkan_wsi,
inc_common, inc_intel, inc_compiler, inc_drm_uapi, inc_vulkan_wsi,
],
link_whole : [libanv_common, libanv_gen_libs],
link_with : [
libintel_compiler, libintel_common, libintel_dev, libisl, libblorp,
libvulkan_util, libvulkan_wsi, libmesa_util,
libvulkan_wsi, libmesa_util,
],
dependencies : [
dep_thread, dep_dl, dep_m, anv_deps, idep_nir, idep_genxml,
dep_thread, dep_dl, dep_m, anv_deps, idep_nir, idep_genxml, idep_vulkan_util
],
c_args : anv_flags,
link_args : ['-Wl,--build-id=sha1', ld_args_bsymbolic, ld_args_gc_sections],
@ -215,16 +222,15 @@ if with_tests
'vulkan_intel_test',
[files('anv_gem_stubs.c'), anv_entrypoints[0], anv_extensions_h],
include_directories : [
inc_common, inc_intel, inc_compiler, inc_drm_uapi, inc_vulkan_util,
inc_vulkan_wsi,
inc_common, inc_intel, inc_compiler, inc_drm_uapi, inc_vulkan_wsi,
],
link_whole : libanv_common,
link_with : [
libanv_gen_libs, libintel_compiler, libintel_common, libintel_dev,
libisl, libblorp, libvulkan_util, libvulkan_wsi, libmesa_util,
libisl, libblorp, libvulkan_wsi, libmesa_util,
],
dependencies : [
dep_thread, dep_dl, dep_m, anv_deps, idep_nir,
dep_thread, dep_dl, dep_m, anv_deps, idep_nir, idep_vulkan_util
],
c_args : anv_flags,
)
@ -239,9 +245,9 @@ if with_tests
['tests/@0@.c'.format(t), anv_entrypoints[0], anv_extensions_h],
c_args : [ c_sse2_args ],
link_with : libvulkan_intel_test,
dependencies : [dep_libdrm, dep_thread, dep_m, dep_valgrind],
dependencies : [dep_libdrm, dep_thread, dep_m, dep_valgrind, idep_vulkan_util, ],
include_directories : [
inc_common, inc_intel, inc_compiler, inc_vulkan_util, inc_vulkan_wsi,
inc_common, inc_intel, inc_compiler, inc_vulkan_wsi,
],
),
suite : ['intel'],

View File

@ -35,8 +35,7 @@ struct pipe_screen;
extern void st_init_limits(struct pipe_screen *screen,
struct gl_constants *c,
struct gl_extensions *extensions,
gl_api api);
struct gl_extensions *extensions);
extern void st_init_extensions(struct pipe_screen *screen,
struct gl_constants *consts,

View File

@ -20,7 +20,6 @@
vk_api_xml = files('registry/vk.xml')
inc_vulkan_util = include_directories('util')
inc_vulkan_wsi = include_directories('wsi')
subdir('util')

View File

@ -43,3 +43,15 @@ libvulkan_util = static_library(
c_args : [c_vis_args],
build_by_default : false,
)
idep_vulkan_util_headers = declare_dependency(
sources : vk_enum_to_str[1],
include_directories : include_directories('.')
)
idep_vulkan_util = declare_dependency(
sources : vk_enum_to_str[1],
link_with : libvulkan_util,
include_directories : include_directories('.'),
dependencies : idep_vulkan_util_headers
)

View File

@ -62,8 +62,8 @@ endif
libvulkan_wsi = static_library(
'vulkan_wsi',
files_vulkan_wsi,
include_directories : [inc_common, inc_vulkan_util, inc_drm_uapi],
dependencies : [vulkan_wsi_deps, dep_libdrm],
include_directories : [inc_common, inc_drm_uapi],
dependencies : [vulkan_wsi_deps, dep_libdrm, idep_vulkan_util],
c_args : [c_vis_args, vulkan_wsi_args],
build_by_default : false,
)