Bring back the local patch that has a habit of vanishing every time we
update mesa. Specifically, we disallow in radeondrm for dri clients mapping registers, so don't try and map them (and thus fail as we currently were). for r300+ this was only used for falling back on old drm versions (doesn't matter). For r100, the new BO abstraction used the SWI number (in hardware scratch reg 3) for the buffer age, so use the newly added getparam member to grab that info instead of trying to read the mapped registers. Update to the lastest kernel headers before you even think about building this or trying to use a snapshot on r100/r200. So now radeon works with mesa again, hoorah! Tested on rv250 by Josh Elsasser, and on R420 (and x800) by myself.
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67c78d50a7
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@ -171,25 +171,24 @@ static int legacy_free_handle(struct bo_manager_legacy *bom, uint32_t handle)
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static void legacy_get_current_age(struct bo_manager_legacy *boml)
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{
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drm_radeon_getparam_t gp;
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unsigned char *RADEONMMIO = NULL;
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int r;
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/* R300 we emit scratch writes in mesa. on r100/r200 we use the IRQ
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* emit ioctl and thus we need to ask for a different scratch register.
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*/
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if ( IS_R300_CLASS(boml->screen)
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|| IS_R600_CLASS(boml->screen) )
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{
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gp.param = RADEON_PARAM_LAST_CLEAR;
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gp.value = (int *)&boml->current_age;
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r = drmCommandWriteRead(boml->base.fd, DRM_RADEON_GETPARAM,
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&gp, sizeof(gp));
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if (r) {
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fprintf(stderr, "%s: drmRadeonGetParam: %d\n", __FUNCTION__, r);
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exit(1);
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}
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}
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else {
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RADEONMMIO = boml->screen->mmio.map;
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boml->current_age = boml->screen->scratch[3];
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boml->current_age = INREG(RADEON_GUI_SCRATCH_REG3);
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gp.param = RADEON_PARAM_LAST_CLEAR;
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} else {
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gp.param = RADEON_PARAM_LAST_SWI;
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}
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gp.value = (int *)&boml->current_age;
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r = drmCommandWriteRead(boml->base.fd, DRM_RADEON_GETPARAM,
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&gp, sizeof(gp));
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if (r) {
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fprintf(stderr, "%s: drmRadeonGetParam: %d\n", __FUNCTION__, r);
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exit(1);
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}
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}
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@ -917,7 +917,6 @@ radeonCreateScreen( __DRIscreen *sPriv )
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{
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radeonScreenPtr screen;
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RADEONDRIPtr dri_priv = (RADEONDRIPtr)sPriv->pDevPriv;
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unsigned char *RADEONMMIO = NULL;
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int i;
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int ret;
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uint32_t temp = 0;
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@ -986,26 +985,12 @@ radeonCreateScreen( __DRIscreen *sPriv )
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if (ret == -1)
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return NULL;
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screen->mmio.handle = dri_priv->registerHandle;
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screen->mmio.size = dri_priv->registerSize;
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if ( drmMap( sPriv->fd,
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screen->mmio.handle,
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screen->mmio.size,
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&screen->mmio.map ) ) {
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FREE( screen );
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__driUtilMessage("%s: drmMap failed\n", __FUNCTION__ );
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return NULL;
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}
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RADEONMMIO = screen->mmio.map;
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screen->status.handle = dri_priv->statusHandle;
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screen->status.size = dri_priv->statusSize;
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if ( drmMap( sPriv->fd,
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screen->status.handle,
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screen->status.size,
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&screen->status.map ) ) {
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drmUnmap( screen->mmio.map, screen->mmio.size );
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FREE( screen );
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__driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
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return NULL;
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@ -1020,7 +1005,6 @@ radeonCreateScreen( __DRIscreen *sPriv )
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screen->buffers = drmMapBufs( sPriv->fd );
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if ( !screen->buffers ) {
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drmUnmap( screen->status.map, screen->status.size );
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drmUnmap( screen->mmio.map, screen->mmio.size );
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FREE( screen );
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__driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__ );
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return NULL;
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@ -1035,7 +1019,6 @@ radeonCreateScreen( __DRIscreen *sPriv )
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(drmAddressPtr)&screen->gartTextures.map ) ) {
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drmUnmapBufs( screen->buffers );
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drmUnmap( screen->status.map, screen->status.size );
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drmUnmap( screen->mmio.map, screen->mmio.size );
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FREE( screen );
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__driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__);
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return NULL;
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@ -1090,14 +1073,9 @@ radeonCreateScreen( __DRIscreen *sPriv )
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{
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if (ret)
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{
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if (screen->chip_family < CHIP_FAMILY_RS600 && !screen->kernel_mm)
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screen->fbLocation = ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff) << 16;
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else
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{
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FREE( screen );
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fprintf(stderr, "Unable to get fb location need newer drm\n");
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return NULL;
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}
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}
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else
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{
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@ -1425,7 +1403,6 @@ radeonDestroyScreen( __DRIscreen *sPriv )
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}
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drmUnmapBufs( screen->buffers );
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drmUnmap( screen->status.map, screen->status.size );
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drmUnmap( screen->mmio.map, screen->mmio.size );
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}
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/* free all option information */
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@ -78,7 +78,6 @@ typedef struct radeon_screen {
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int texSize[RADEON_NR_TEX_HEAPS];
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int logTexGranularity[RADEON_NR_TEX_HEAPS];
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radeonRegionRec mmio;
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radeonRegionRec status;
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radeonRegionRec gartTextures;
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