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Import libdrm 2.4.73

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This commit is contained in:
jsg 2016-11-19 05:36:14 +00:00
parent 5c15bd8953
commit 90bdad6ae7
21 changed files with 1684 additions and 12 deletions
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1
lib/libdrm/Makefile.sources
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@ -13,6 +13,7 @@ LIBDRM_FILES := \
util_math.h
LIBDRM_H_FILES := \
libsync.h \
xf86drm.h \
xf86drmMode.h

1
lib/libdrm/amdgpu/Makefile.sources
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@ -1,4 +1,5 @@
LIBDRM_AMDGPU_FILES := \
amdgpu_asic_id.h \
amdgpu_bo.c \
amdgpu_cs.c \
amdgpu_device.c \

1
lib/libdrm/amdgpu/amdgpu-symbol-check
View File

@ -35,6 +35,7 @@ amdgpu_cs_submit
amdgpu_cs_wait_semaphore
amdgpu_device_deinitialize
amdgpu_device_initialize
amdgpu_get_marketing_name
amdgpu_query_buffer_size_alignment
amdgpu_query_crtc_from_id
amdgpu_query_firmware_version

10
lib/libdrm/amdgpu/amdgpu.h
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@ -1245,4 +1245,14 @@ int amdgpu_cs_wait_semaphore(amdgpu_context_handle ctx,
*/
int amdgpu_cs_destroy_semaphore(amdgpu_semaphore_handle sem);
/**
* Get the ASIC marketing name
*
* \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
*
* \return the constant string of the marketing name
* "NULL" means the ASIC is not found
*/
const char *amdgpu_get_marketing_name(amdgpu_device_handle dev);
#endif /* #ifdef _AMDGPU_H_ */

165
lib/libdrm/amdgpu/amdgpu_asic_id.h Normal file
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@ -0,0 +1,165 @@
/*
* Copyright © 2016 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __AMDGPU_ASIC_ID_H__
#define __AMDGPU_ASIC_ID_H__
static struct amdgpu_asic_id_table_t {
uint32_t did;
uint32_t rid;
const char *marketing_name;
} const amdgpu_asic_id_table [] = {
{0x6600, 0x0, "AMD Radeon HD 8600/8700M"},
{0x6600, 0x81, "AMD Radeon R7 M370"},
{0x6601, 0x0, "AMD Radeon HD 8500M/8700M"},
{0x6604, 0x0, "AMD Radeon R7 M265 Series"},
{0x6604, 0x81, "AMD Radeon R7 M350"},
{0x6605, 0x0, "AMD Radeon R7 M260 Series"},
{0x6605, 0x81, "AMD Radeon R7 M340"},
{0x6606, 0x0, "AMD Radeon HD 8790M"},
{0x6607, 0x0, "AMD Radeon HD8530M"},
{0x6608, 0x0, "AMD FirePro W2100"},
{0x6610, 0x0, "AMD Radeon HD 8600 Series"},
{0x6610, 0x81, "AMD Radeon R7 350"},
{0x6610, 0x83, "AMD Radeon R5 340"},
{0x6611, 0x0, "AMD Radeon HD 8500 Series"},
{0x6613, 0x0, "AMD Radeon HD 8500 series"},
{0x6617, 0xC7, "AMD Radeon R7 240 Series"},
{0x6640, 0x0, "AMD Radeon HD 8950"},
{0x6640, 0x80, "AMD Radeon R9 M380"},
{0x6646, 0x0, "AMD Radeon R9 M280X"},
{0x6646, 0x80, "AMD Radeon R9 M470X"},
{0x6647, 0x0, "AMD Radeon R9 M270X"},
{0x6647, 0x80, "AMD Radeon R9 M380"},
{0x6649, 0x0, "AMD FirePro W5100"},
{0x6658, 0x0, "AMD Radeon R7 200 Series"},
{0x665C, 0x0, "AMD Radeon HD 7700 Series"},
{0x665D, 0x0, "AMD Radeon R7 200 Series"},
{0x665F, 0x81, "AMD Radeon R7 300 Series"},
{0x6660, 0x0, "AMD Radeon HD 8600M Series"},
{0x6660, 0x81, "AMD Radeon R5 M335"},
{0x6660, 0x83, "AMD Radeon R5 M330"},
{0x6663, 0x0, "AMD Radeon HD 8500M Series"},
{0x6663, 0x83, "AMD Radeon R5 M320"},
{0x6664, 0x0, "AMD Radeon R5 M200 Series"},
{0x6665, 0x0, "AMD Radeon R5 M200 Series"},
{0x6665, 0x83, "AMD Radeon R5 M320"},
{0x6667, 0x0, "AMD Radeon R5 M200 Series"},
{0x666F, 0x0, "AMD Radeon HD 8500M"},
{0x6780, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
{0x678A, 0x0, "ATI FirePro V (FireGL V) Graphics Adapter"},
{0x6798, 0x0, "AMD Radeon HD 7900 Series"},
{0x679A, 0x0, "AMD Radeon HD 7900 Series"},
{0x679B, 0x0, "AMD Radeon HD 7900 Series"},
{0x679E, 0x0, "AMD Radeon HD 7800 Series"},
{0x67A0, 0x0, "HAWAII XTGL (67A0)"},
{0x67A1, 0x0, "HAWAII GL40 (67A1)"},
{0x67B0, 0x0, "AMD Radeon R9 200 Series"},
{0x67B0, 0x80, "AMD Radeon R9 390 Series"},
{0x67B1, 0x0, "AMD Radeon R9 200 Series"},
{0x67B1, 0x80, "AMD Radeon R9 390 Series"},
{0x67B9, 0x0, "AMD Radeon R9 200 Series"},
{0x67DF, 0xC4, "AMD Radeon RX 480 Graphics"},
{0x67DF, 0xC5, "AMD Radeon RX 470 Graphics"},
{0x67DF, 0xC7, "AMD Radeon RX 480 Graphics"},
{0x67DF, 0xCF, "AMD Radeon RX 470 Graphics"},
{0x67C4, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
{0x67C7, 0x00, "AMD Radeon Pro WX 5100 Graphics"},
{0x67C0, 0x00, "AMD Radeon Pro WX 7100 Graphics"},
{0x67E0, 0x00, "AMD Radeon Pro WX Series Graphics"},
{0x67E3, 0x00, "AMD Radeon Pro WX 4100 Graphics"},
{0x67E8, 0x00, "AMD Radeon Pro WX Series Graphics"},
{0x67E8, 0x01, "AMD Radeon Pro WX Series Graphics"},
{0x67E8, 0x80, "AMD Radeon E9260 Graphics"},
{0x67EB, 0x00, "AMD Radeon Pro WX Series Graphics"},
{0x67EF, 0xC0, "AMD Radeon RX Graphics"},
{0x67EF, 0xC1, "AMD Radeon RX 460 Graphics"},
{0x67EF, 0xC5, "AMD Radeon RX 460 Graphics"},
{0x67EF, 0xC7, "AMD Radeon RX Graphics"},
{0x67EF, 0xCF, "AMD Radeon RX 460 Graphics"},
{0x67EF, 0xEF, "AMD Radeon RX Graphics"},
{0x67FF, 0xC0, "AMD Radeon RX Graphics"},
{0x67FF, 0xC1, "AMD Radeon RX Graphics"},
{0x6800, 0x0, "AMD Radeon HD 7970M"},
{0x6801, 0x0, "AMD Radeon(TM) HD8970M"},
{0x6808, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
{0x6809, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
{0x6810, 0x0, "AMD Radeon(TM) HD 8800 Series"},
{0x6810, 0x81, "AMD Radeon R7 370 Series"},
{0x6811, 0x0, "AMD Radeon(TM) HD8800 Series"},
{0x6811, 0x81, "AMD Radeon R7 300 Series"},
{0x6818, 0x0, "AMD Radeon HD 7800 Series"},
{0x6819, 0x0, "AMD Radeon HD 7800 Series"},
{0x6820, 0x0, "AMD Radeon HD 8800M Series"},
{0x6820, 0x81, "AMD Radeon R9 M375"},
{0x6820, 0x83, "AMD Radeon R9 M375X"},
{0x6821, 0x0, "AMD Radeon HD 8800M Series"},
{0x6821, 0x87, "AMD Radeon R7 M380"},
{0x6821, 0x83, "AMD Radeon R9 M370X"},
{0x6822, 0x0, "AMD Radeon E8860"},
{0x6823, 0x0, "AMD Radeon HD 8800M Series"},
{0x6825, 0x0, "AMD Radeon HD 7800M Series"},
{0x6827, 0x0, "AMD Radeon HD 7800M Series"},
{0x6828, 0x0, "ATI FirePro V(FireGL V) Graphics Adapter"},
{0x682B, 0x0, "AMD Radeon HD 8800M Series"},
{0x682B, 0x87, "AMD Radeon R9 M360"},
{0x682C, 0x0, "AMD FirePro W4100"},
{0x682D, 0x0, "AMD Radeon HD 7700M Series"},
{0x682F, 0x0, "AMD Radeon HD 7700M Series"},
{0x6835, 0x0, "AMD Radeon R7 Series / HD 9000 Series"},
{0x6837, 0x0, "AMD Radeon HD7700 Series"},
{0x683D, 0x0, "AMD Radeon HD 7700 Series"},
{0x683F, 0x0, "AMD Radeon HD 7700 Series"},
{0x6900, 0x0, "AMD Radeon R7 M260"},
{0x6900, 0x81, "AMD Radeon R7 M360"},
{0x6900, 0x83, "AMD Radeon R7 M340"},
{0x6901, 0x0, "AMD Radeon R5 M255"},
{0x6907, 0x0, "AMD Radeon R5 M255"},
{0x6907, 0x87, "AMD Radeon R5 M315"},
{0x6920, 0x0, "AMD Radeon R9 M395X"},
{0x6920, 0x1, "AMD Radeon R9 M390X"},
{0x6921, 0x0, "AMD Radeon R9 M295X"},
{0x6929, 0x0, "AMD FirePro S7150"},
{0x692B, 0x0, "AMD FirePro W7100"},
{0x6938, 0x0, "AMD Radeon R9 200 Series"},
{0x6938, 0xF0, "AMD Radeon R9 200 Series"},
{0x6938, 0xF1, "AMD Radeon R9 380 Series"},
{0x6939, 0xF0, "AMD Radeon R9 200 Series"},
{0x6939, 0x0, "AMD Radeon R9 200 Series"},
{0x6939, 0xF1, "AMD Radeon R9 380 Series"},
{0x7300, 0xC8, "AMD Radeon R9 Fury Series"},
{0x7300, 0xCB, "AMD Radeon R9 Fury Series"},
{0x7300, 0xCA, "AMD Radeon R9 Fury Series"},
{0x9874, 0xC4, "AMD Radeon R7 Graphics"},
{0x9874, 0xC5, "AMD Radeon R6 Graphics"},
{0x9874, 0xC6, "AMD Radeon R6 Graphics"},
{0x9874, 0xC7, "AMD Radeon R5 Graphics"},
{0x9874, 0x81, "AMD Radeon R6 Graphics"},
{0x9874, 0x87, "AMD Radeon R5 Graphics"},
{0x9874, 0x85, "AMD Radeon R6 Graphics"},
{0x9874, 0x84, "AMD Radeon R7 Graphics"},
{0x0000, 0x0, "\0"},
};
#endif

15
lib/libdrm/amdgpu/amdgpu_device.c
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@ -44,6 +44,7 @@
#include "amdgpu_internal.h"
#include "util_hash_table.h"
#include "util_math.h"
#include "amdgpu_asic_id.h"
#define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
#define UINT_TO_PTR(x) ((void *)((intptr_t)(x)))
@ -303,3 +304,17 @@ int amdgpu_device_deinitialize(amdgpu_device_handle dev)
amdgpu_device_reference(&dev, NULL);
return 0;
}
const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
{
const struct amdgpu_asic_id_table_t *t = amdgpu_asic_id_table;
while (t->did) {
if ((t->did == dev->info.asic_id) &&
(t->rid == dev->info.pci_rev_id))
return t->marketing_name;
t++;
}
return NULL;
}

2
lib/libdrm/amdgpu/amdgpu_gpu_info.c
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@ -230,6 +230,8 @@ drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
int amdgpu_query_gpu_info(amdgpu_device_handle dev,
struct amdgpu_gpu_info *info)
{
if ((dev == NULL) || (info == NULL))
return -EINVAL;
/* Get ASIC info*/
*info = dev->info;

1
lib/libdrm/freedreno/freedreno-symbol-check
View File

@ -49,6 +49,7 @@ fd_ringbuffer_timestamp
fd_ringmarker_del
fd_ringmarker_dwords
fd_ringmarker_flush
fd_ringbuffer_flush2
fd_ringmarker_mark
fd_ringmarker_new
EOF

1
lib/libdrm/freedreno/freedreno_drmif.h
View File

@ -92,6 +92,7 @@ int fd_device_fd(struct fd_device *dev);
enum fd_version {
FD_VERSION_MADVISE = 1, /* kernel supports madvise */
FD_VERSION_UNLIMITED_CMDS = 1, /* submits w/ >4 cmd buffers (growable ringbuffer) */
FD_VERSION_FENCE_FD = 2, /* submit command supports in/out fences */
};
enum fd_version fd_device_version(struct fd_device *dev);

3
lib/libdrm/freedreno/freedreno_priv.h
View File

@ -133,7 +133,8 @@ struct fd_ringmarker {
struct fd_ringbuffer_funcs {
void * (*hostptr)(struct fd_ringbuffer *ring);
int (*flush)(struct fd_ringbuffer *ring, uint32_t *last_start);
int (*flush)(struct fd_ringbuffer *ring, uint32_t *last_start,
int in_fence_fd, int *out_fence_fd);
void (*grow)(struct fd_ringbuffer *ring, uint32_t size);
void (*reset)(struct fd_ringbuffer *ring);
void (*emit_reloc)(struct fd_ringbuffer *ring,

11
lib/libdrm/freedreno/freedreno_ringbuffer.c
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@ -80,10 +80,15 @@ void fd_ringbuffer_reset(struct fd_ringbuffer *ring)
ring->funcs->reset(ring);
}
/* maybe get rid of this and use fd_ringmarker_flush() from DDX too? */
int fd_ringbuffer_flush(struct fd_ringbuffer *ring)
{
return ring->funcs->flush(ring, ring->last_start);
return ring->funcs->flush(ring, ring->last_start, -1, NULL);
}
int fd_ringbuffer_flush2(struct fd_ringbuffer *ring, int in_fence_fd,
int *out_fence_fd)
{
return ring->funcs->flush(ring, ring->last_start, in_fence_fd, out_fence_fd);
}
void fd_ringbuffer_grow(struct fd_ringbuffer *ring, uint32_t ndwords)
@ -177,5 +182,5 @@ uint32_t fd_ringmarker_dwords(struct fd_ringmarker *start,
int fd_ringmarker_flush(struct fd_ringmarker *marker)
{
struct fd_ringbuffer *ring = marker->ring;
return ring->funcs->flush(ring, marker->cur);
return ring->funcs->flush(ring, marker->cur, -1, NULL);
}

5
lib/libdrm/freedreno/freedreno_ringbuffer.h
View File

@ -56,6 +56,11 @@ void fd_ringbuffer_set_parent(struct fd_ringbuffer *ring,
struct fd_ringbuffer *parent);
void fd_ringbuffer_reset(struct fd_ringbuffer *ring);
int fd_ringbuffer_flush(struct fd_ringbuffer *ring);
/* in_fence_fd: -1 for no in-fence, else fence fd
* out_fence_fd: NULL for no output-fence requested, else ptr to return out-fence
*/
int fd_ringbuffer_flush2(struct fd_ringbuffer *ring, int in_fence_fd,
int *out_fence_fd);
void fd_ringbuffer_grow(struct fd_ringbuffer *ring, uint32_t ndwords);
uint32_t fd_ringbuffer_timestamp(struct fd_ringbuffer *ring);

6
lib/libdrm/freedreno/kgsl/kgsl_ringbuffer.c
View File

@ -113,7 +113,8 @@ static void * kgsl_ringbuffer_hostptr(struct fd_ringbuffer *ring)
return kgsl_ring->bo->hostptr;
}
static int kgsl_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start)
static int kgsl_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start,
int in_fence_fd, int *out_fence_fd)
{
struct kgsl_ringbuffer *kgsl_ring = to_kgsl_ringbuffer(ring);
struct kgsl_pipe *kgsl_pipe = to_kgsl_pipe(ring->pipe);
@ -131,6 +132,9 @@ static int kgsl_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_star
};
int ret;
assert(in_fence_fd == -1);
assert(out_fence_fd == NULL);
kgsl_pipe_pre_submit(kgsl_pipe);
/* z180_cmdstream_issueibcmds() is made of fail: */

22
lib/libdrm/freedreno/msm/msm_drm.h
View File

@ -50,6 +50,15 @@ extern "C" {
#define MSM_PIPE_2D1 0x02
#define MSM_PIPE_3D0 0x10
/* The pipe-id just uses the lower bits, so can be OR'd with flags in
* the upper 16 bits (which could be extended further, if needed, maybe
* we extend/overload the pipe-id some day to deal with multiple rings,
* but even then I don't think we need the full lower 16 bits).
*/
#define MSM_PIPE_ID_MASK 0xffff
#define MSM_PIPE_ID(x) ((x) & MSM_PIPE_ID_MASK)
#define MSM_PIPE_FLAGS(x) ((x) & ~MSM_PIPE_ID_MASK)
/* timeouts are specified in clock-monotonic absolute times (to simplify
* restarting interrupted ioctls). The following struct is logically the
* same as 'struct timespec' but 32/64b ABI safe.
@ -183,17 +192,28 @@ struct drm_msm_gem_submit_bo {
__u64 presumed; /* in/out, presumed buffer address */
};
/* Valid submit ioctl flags: */
#define MSM_SUBMIT_NO_IMPLICIT 0x80000000 /* disable implicit sync */
#define MSM_SUBMIT_FENCE_FD_IN 0x40000000 /* enable input fence_fd */
#define MSM_SUBMIT_FENCE_FD_OUT 0x20000000 /* enable output fence_fd */
#define MSM_SUBMIT_FLAGS ( \
MSM_SUBMIT_NO_IMPLICIT | \
MSM_SUBMIT_FENCE_FD_IN | \
MSM_SUBMIT_FENCE_FD_OUT | \
0)
/* Each cmdstream submit consists of a table of buffers involved, and
* one or more cmdstream buffers. This allows for conditional execution
* (context-restore), and IB buffers needed for per tile/bin draw cmds.
*/
struct drm_msm_gem_submit {
__u32 pipe; /* in, MSM_PIPE_x */
__u32 flags; /* MSM_PIPE_x | MSM_SUBMIT_x */
__u32 fence; /* out */
__u32 nr_bos; /* in, number of submit_bo's */
__u32 nr_cmds; /* in, number of submit_cmd's */
__u64 __user bos; /* in, ptr to array of submit_bo's */
__u64 __user cmds; /* in, ptr to array of submit_cmd's */
__s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */
};
/* The normal way to synchronize with the GPU is just to CPU_PREP on

18
lib/libdrm/freedreno/msm/msm_ringbuffer.c
View File

@ -395,15 +395,25 @@ static void dump_submit(struct msm_ringbuffer *msm_ring)
}
}
static int msm_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start)
static int msm_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start,
int in_fence_fd, int *out_fence_fd)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
struct drm_msm_gem_submit req = {
.pipe = to_msm_pipe(ring->pipe)->pipe,
.flags = to_msm_pipe(ring->pipe)->pipe,
};
uint32_t i;
int ret;
if (in_fence_fd != -1) {
req.flags |= MSM_SUBMIT_FENCE_FD_IN | MSM_SUBMIT_NO_IMPLICIT;
req.fence_fd = in_fence_fd;
}
if (out_fence_fd) {
req.flags |= MSM_SUBMIT_FENCE_FD_OUT;
}
finalize_current_cmd(ring, last_start);
/* needs to be after get_cmd() as that could create bos/cmds table: */
@ -435,6 +445,10 @@ static int msm_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start
struct msm_cmd *msm_cmd = msm_ring->cmds[i];
msm_cmd->ring->last_timestamp = req.fence;
}
if (out_fence_fd) {
*out_fence_fd = req.fence_fd;
}
}
flush_reset(ring);

157
lib/libdrm/include/drm/README Normal file
View File

@ -0,0 +1,157 @@
What are these headers ?
------------------------
This is the canonical source of drm headers that user space should use for
communicating with the kernel DRM subsystem.
They flow from the kernel, thus any changes must be merged there first.
Do _not_ attempt to "fix" these by deviating from the kernel ones !
Non-linux platforms - changes/patches
-------------------------------------
If your platform has local changes, please send them upstream for inclusion.
Even if your patches don't get accepted in their current form, devs will
give you feedback on how to address things properly.
git send-email --subject-prefix="PATCH libdrm" your patches to dri-devel
mailing list.
Before doing so, please consider the following:
- Have the [libdrm vs kernel] headers on your platform deviated ?
Consider unifying them first.
- Have you introduced additional ABI that's not available in Linux ?
Propose it for [Linux kernel] upstream inclusion.
If that doesn't work out (hopefully it never does), move it to another header
and/or keep the change(s) local ?
- Are your changes DRI1/UMS specific ?
There is virtually no interest/power in keeping those legacy interfaces. They
are around due to the kernel "thou shalt not break existing user space" rule.
Consider porting the driver to DRI2/KMS - all (almost?) sensible hardware is
capable of supporting those.
Which headers go where ?
------------------------
A snipped from the, now removed, Makefile.am used to state:
XXX airlied says, nothing besides *_drm.h and drm*.h should be necessary.
however, r300 and via need their reg headers installed in order to build.
better solutions are welcome.
Obviously the r300 and via headers are no longer around ;-)
Reason behind is that the drm headers can be used as a basic communications
channel with the respective kernel modules. If more advanced functionality is
required one can pull the specific libdrm_$driver which is free to pull
additional files from the kernel.
For example: nouveau has nouveau/nvif/*.h while vc4 has vc4/*.h
If your driver is still in prototyping/staging state, consider moving the
$driver_drm.h into $driver and _not_ installing it. An header providing opaque
definitions and access [via $driver_drmif.h or similar] would be better fit.
When and which headers to update
--------------------------------
Ideally all files will be synced (updated) with the latest released kernel on
each libdrm release. Sadly that's not yet possible since quite a few headers
differ significantly - see Outdated or Broken Headers section below.
That said, it's up-to the individual developers to sync with newer version
(from drm-next) as they see fit.
When and how to update these files
----------------------------------
In order to update the files do the following:
- Switch to a Linux kernel tree/branch which is not rebased.
For example: airlied/drm-next
- Install the headers via `make headers_install' to a separate location.
- Copy the drm header[s] + git add + git commit.
- Note: Your commit message must include:
a) Brief summary on the delta. If there's any change that looks like an
API/ABI break one _must_ explicitly state why it's safe to do so.
b) "Generated using make headers_install."
c) "Generated from $tree/branch commit $sha"
Outdated or Broken Headers
--------------------------
This section contains a list of headers and the respective "issues" they might
have relative to their kernel equivalent.
Nearly all headers:
- Missing extern C notation.
Status: Trivial.
Most UMS headers:
- Not using fixed size interers - compat ioctls are broken.
Status: ?
Promote to fixed size ints, which match the current (32bit) ones.
amdgpu_drm.h
- Using the stdint.h uint*_t over the respective __u* ones
Status: Trivial.
drm_mode.h
- Missing DPI encode/connector pair.
Status: Trivial.
i915_drm.h
- Missing PARAMS - HAS_POOLED_EU, MIN_EU_IN_POOL CONTEXT_PARAM_NO_ERROR_CAPTURE
Status: Trivial.
mga_drm.h
- Typo fix, use struct over typedef.
Status: Trivial.
nouveau_drm.h
- Missing macros NOUVEAU_GETPARAM*, NOUVEAU_DRM_HEADER_PATCHLEVEL, structs,
enums, using stdint.h over the __u* types.
Status: ?
qxl_drm.h
- Using the stdint.h uint*_t over the respective __u* ones
Status: Trivial.
r128_drm.h
- Broken compat ioctls.
radeon_drm.h
- Missing RADEON_TILING_R600_NO_SCANOUT, CIK_TILE_MODE_*, broken UMS ioctls,
using stdint types.
- Both kernel and libdrm: missing padding -
drm_radeon_gem_{create,{g,s}et_tiling,set_domain} others ?
Status: ?
savage_drm.h
- Renamed ioctls - DRM_IOCTL_SAVAGE_{,BCI}_EVENT_EMIT, compat ioctls are broken.
Status: ?
sis_drm.h
- Borken ioctls + libdrm uses int vs kernel long
Status: ?
via_drm.h
- Borken ioctls - libdrm int vs kernel long
Status: ?
omap_drm.h (living in $TOP/omap)
- License mismatch, missing DRM_IOCTL_OMAP_GEM_NEW and related struct
Status: ?
msm_drm.h (located in $TOP/freedreno/msm/)
- License mismatch, missing MSM_PIPE_*, MSM_SUBMIT_*. Renamed
drm_msm_gem_submit::flags, missing drm_msm_gem_submit::fence_fd.
Status: ?
exynos_drm.h (living in $TOP/exynos)
- License mismatch, now using fixed size ints (but not everywhere). Lots of
new stuff.
Status: ?

49
lib/libdrm/include/drm/drm_mode.h
View File

@ -29,6 +29,10 @@
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
#define DRM_DISPLAY_INFO_LEN 32
#define DRM_CONNECTOR_NAME_LEN 32
#define DRM_DISPLAY_MODE_LEN 32
@ -202,6 +206,7 @@ struct drm_mode_get_plane_res {
#define DRM_MODE_ENCODER_VIRTUAL 5
#define DRM_MODE_ENCODER_DSI 6
#define DRM_MODE_ENCODER_DPMST 7
#define DRM_MODE_ENCODER_DPI 8
struct drm_mode_get_encoder {
__u32 encoder_id;
@ -241,6 +246,7 @@ struct drm_mode_get_encoder {
#define DRM_MODE_CONNECTOR_eDP 14
#define DRM_MODE_CONNECTOR_VIRTUAL 15
#define DRM_MODE_CONNECTOR_DSI 16
#define DRM_MODE_CONNECTOR_DPI 17
struct drm_mode_get_connector {
@ -514,7 +520,13 @@ struct drm_color_lut {
#define DRM_MODE_PAGE_FLIP_EVENT 0x01
#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC)
#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
#define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8
#define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \
DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)
#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \
DRM_MODE_PAGE_FLIP_ASYNC | \
DRM_MODE_PAGE_FLIP_TARGET)
/*
* Request a page flip on the specified crtc.
@ -537,8 +549,7 @@ struct drm_color_lut {
* 'as soon as possible', meaning that it not delay waiting for vblank.
* This may cause tearing on the screen.
*
* The reserved field must be zero until we figure out something
* clever to use it for.
* The reserved field must be zero.
*/
struct drm_mode_crtc_page_flip {
@ -549,6 +560,34 @@ struct drm_mode_crtc_page_flip {
__u64 user_data;
};
/*
* Request a page flip on the specified crtc.
*
* Same as struct drm_mode_crtc_page_flip, but supports new flags and
* re-purposes the reserved field:
*
* The sequence field must be zero unless either of the
* DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is specified. When
* the ABSOLUTE flag is specified, the sequence field denotes the absolute
* vblank sequence when the flip should take effect. When the RELATIVE
* flag is specified, the sequence field denotes the relative (to the
* current one when the ioctl is called) vblank sequence when the flip
* should take effect. NOTE: DRM_IOCTL_WAIT_VBLANK must still be used to
* make sure the vblank sequence before the target one has passed before
* calling this ioctl. The purpose of the
* DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is merely to clarify
* the target for when code dealing with a page flip runs during a
* vertical blank period.
*/
struct drm_mode_crtc_page_flip_target {
__u32 crtc_id;
__u32 fb_id;
__u32 flags;
__u32 sequence;
__u64 user_data;
};
/* create a dumb scanout buffer */
struct drm_mode_create_dumb {
__u32 height;
@ -621,4 +660,8 @@ struct drm_mode_destroy_blob {
__u32 blob_id;
};
#if defined(__cplusplus)
}
#endif
#endif

3
lib/libdrm/intel/Makefile.sources
View File

@ -6,7 +6,8 @@ LIBDRM_INTEL_FILES := \
intel_decode.c \
intel_chipset.h \
mm.c \
mm.h
mm.h \
uthash.h
LIBDRM_INTEL_H_FILES := \
intel_bufmgr.h \

3
lib/libdrm/intel/intel-symbol-check
View File

@ -70,6 +70,9 @@ drm_intel_gem_bo_aub_dump_bmp
drm_intel_gem_bo_clear_relocs
drm_intel_gem_bo_context_exec
drm_intel_gem_bo_get_reloc_count
drm_intel_gem_bo_map__cpu
drm_intel_gem_bo_map__gtt
drm_intel_gem_bo_map__wc
drm_intel_gem_bo_map_gtt
drm_intel_gem_bo_map_unsynchronized
drm_intel_gem_bo_start_gtt_access

1074
lib/libdrm/intel/uthash.h Normal file
View File

File diff suppressed because it is too large Load Diff

148
lib/libdrm/libsync.h Normal file
View File

@ -0,0 +1,148 @@
/*
* sync abstraction
* Copyright 2015-2016 Collabora Ltd.
*
* Based on the implementation from the Android Open Source Project,
*
* Copyright 2012 Google, Inc
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _LIBSYNC_H
#define _LIBSYNC_H
#include <assert.h>
#include <errno.h>
#include <stdint.h>
#include <string.h>
#include <sys/ioctl.h>
#include <sys/poll.h>
#include <unistd.h>
#if defined(__cplusplus)
extern "C" {
#endif
#ifndef SYNC_IOC_MERGE
/* duplicated from linux/sync_file.h to avoid build-time dependency
* on new (v4.7) kernel headers. Once distro's are mostly using
* something newer than v4.7 drop this and #include <linux/sync_file.h>
* instead.
*/
struct sync_merge_data {
char name[32];
int32_t fd2;
int32_t fence;
uint32_t flags;
uint32_t pad;
};
#define SYNC_IOC_MAGIC '>'
#define SYNC_IOC_MERGE _IOWR(SYNC_IOC_MAGIC, 3, struct sync_merge_data)
#endif
static inline int sync_wait(int fd, int timeout)
{
struct pollfd fds = {0};
int ret;
fds.fd = fd;
fds.events = POLLIN;
do {
ret = poll(&fds, 1, timeout);
if (ret > 0) {
if (fds.revents & (POLLERR | POLLNVAL)) {
errno = EINVAL;
return -1;
}
return 0;
} else if (ret == 0) {
errno = ETIME;
return -1;
}
} while (ret == -1 && (errno == EINTR || errno == EAGAIN));
return ret;
}
static inline int sync_merge(const char *name, int fd1, int fd2)
{
struct sync_merge_data data = {0};
int ret;
data.fd2 = fd2;
strncpy(data.name, name, sizeof(data.name));
do {
ret = ioctl(fd1, SYNC_IOC_MERGE, &data);
} while (ret == -1 && (errno == EINTR || errno == EAGAIN));
if (ret < 0)
return ret;
return data.fence;
}
/* accumulate fd2 into fd1. If *fd1 is not a valid fd then dup fd2,
* otherwise sync_merge() and close the old *fd1. This can be used
* to implement the pattern:
*
* init()
* {
* batch.fence_fd = -1;
* }
*
* // does *NOT* take ownership of fd
* server_sync(int fd)
* {
* if (sync_accumulate("foo", &batch.fence_fd, fd)) {
* ... error ...
* }
* }
*/
static inline int sync_accumulate(const char *name, int *fd1, int fd2)
{
int ret;
assert(fd2 >= 0);
if (*fd1 < 0) {
*fd1 = dup(fd2);
return 0;
}
ret = sync_merge(name, *fd1, fd2);
if (ret < 0) {
/* leave *fd1 as it is */
return ret;
}
close(*fd1);
*fd1 = ret;
return 0;
}
#if defined(__cplusplus)
}
#endif
#endif