Merge intel driver version 2.2.0.90.
This commit is contained in:
matthieu
parent
bc47e6dc51
commit
43e542a007
60
driver/xf86-video-intel/configure
vendored
60
driver/xf86-video-intel/configure
vendored
@ -1,6 +1,6 @@
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#! /bin/sh
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# Guess values for system-dependent variables and create Makefiles.
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# Generated by GNU Autoconf 2.59 for xf86-video-intel 2.2.0.
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# Generated by GNU Autoconf 2.59 for xf86-video-intel 2.2.0.90.
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#
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# Report bugs to <https://bugs.freedesktop.org/enter_bug.cgi?product=xorg>.
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#
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@ -423,8 +423,8 @@ SHELL=${CONFIG_SHELL-/bin/sh}
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# Identity of this package.
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PACKAGE_NAME='xf86-video-intel'
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PACKAGE_TARNAME='xf86-video-intel'
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PACKAGE_VERSION='2.2.0'
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PACKAGE_STRING='xf86-video-intel 2.2.0'
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PACKAGE_VERSION='2.2.0.90'
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PACKAGE_STRING='xf86-video-intel 2.2.0.90'
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PACKAGE_BUGREPORT='https://bugs.freedesktop.org/enter_bug.cgi?product=xorg'
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ac_unique_file="Makefile.am"
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@ -990,7 +990,7 @@ if test "$ac_init_help" = "long"; then
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# Omit some internal or obsolete options to make the list less imposing.
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# This message is too long to be a string in the A/UX 3.1 sh.
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cat <<_ACEOF
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\`configure' configures xf86-video-intel 2.2.0 to adapt to many kinds of systems.
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\`configure' configures xf86-video-intel 2.2.0.90 to adapt to many kinds of systems.
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Usage: $0 [OPTION]... [VAR=VALUE]...
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@ -1056,7 +1056,7 @@ fi
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if test -n "$ac_init_help"; then
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case $ac_init_help in
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short | recursive ) echo "Configuration of xf86-video-intel 2.2.0:";;
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short | recursive ) echo "Configuration of xf86-video-intel 2.2.0.90:";;
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esac
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cat <<\_ACEOF
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@ -1218,7 +1218,7 @@ fi
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test -n "$ac_init_help" && exit 0
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if $ac_init_version; then
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cat <<\_ACEOF
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xf86-video-intel configure 2.2.0
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xf86-video-intel configure 2.2.0.90
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generated by GNU Autoconf 2.59
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Copyright (C) 2003 Free Software Foundation, Inc.
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@ -1232,7 +1232,7 @@ cat >&5 <<_ACEOF
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This file contains any messages produced by compilers while
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running configure, to aid debugging if configure makes a mistake.
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It was created by xf86-video-intel $as_me 2.2.0, which was
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It was created by xf86-video-intel $as_me 2.2.0.90, which was
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generated by GNU Autoconf 2.59. Invocation command line was
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$ $0 $@
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@ -1880,7 +1880,7 @@ fi
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# Define the identity of the package.
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PACKAGE='xf86-video-intel'
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VERSION='2.2.0'
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VERSION='2.2.0.90'
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cat >>confdefs.h <<_ACEOF
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@ -20703,12 +20703,12 @@ if test -n "$PKG_CONFIG"; then
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pkg_cv_PCIACCESS_CFLAGS="$PCIACCESS_CFLAGS"
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else
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if test -n "$PKG_CONFIG" && \
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{ (echo "$as_me:$LINENO: \$PKG_CONFIG --exists --print-errors \"pciaccess >= 0.5.0\"") >&5
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($PKG_CONFIG --exists --print-errors "pciaccess >= 0.5.0") 2>&5
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{ (echo "$as_me:$LINENO: \$PKG_CONFIG --exists --print-errors \"pciaccess >= 0.10.0\"") >&5
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($PKG_CONFIG --exists --print-errors "pciaccess >= 0.10.0") 2>&5
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ac_status=$?
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echo "$as_me:$LINENO: \$? = $ac_status" >&5
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(exit $ac_status); }; then
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pkg_cv_PCIACCESS_CFLAGS=`$PKG_CONFIG --cflags "pciaccess >= 0.5.0" 2>/dev/null`
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pkg_cv_PCIACCESS_CFLAGS=`$PKG_CONFIG --cflags "pciaccess >= 0.10.0" 2>/dev/null`
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else
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pkg_failed=yes
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fi
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@ -20721,12 +20721,12 @@ if test -n "$PKG_CONFIG"; then
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pkg_cv_PCIACCESS_LIBS="$PCIACCESS_LIBS"
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else
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if test -n "$PKG_CONFIG" && \
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{ (echo "$as_me:$LINENO: \$PKG_CONFIG --exists --print-errors \"pciaccess >= 0.5.0\"") >&5
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($PKG_CONFIG --exists --print-errors "pciaccess >= 0.5.0") 2>&5
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{ (echo "$as_me:$LINENO: \$PKG_CONFIG --exists --print-errors \"pciaccess >= 0.10.0\"") >&5
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($PKG_CONFIG --exists --print-errors "pciaccess >= 0.10.0") 2>&5
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ac_status=$?
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echo "$as_me:$LINENO: \$? = $ac_status" >&5
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(exit $ac_status); }; then
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pkg_cv_PCIACCESS_LIBS=`$PKG_CONFIG --libs "pciaccess >= 0.5.0" 2>/dev/null`
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pkg_cv_PCIACCESS_LIBS=`$PKG_CONFIG --libs "pciaccess >= 0.10.0" 2>/dev/null`
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else
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pkg_failed=yes
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fi
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@ -20745,9 +20745,9 @@ else
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_pkg_short_errors_supported=no
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fi
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if test $_pkg_short_errors_supported = yes; then
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PCIACCESS_PKG_ERRORS=`$PKG_CONFIG --short-errors --errors-to-stdout --print-errors "pciaccess >= 0.5.0"`
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PCIACCESS_PKG_ERRORS=`$PKG_CONFIG --short-errors --errors-to-stdout --print-errors "pciaccess >= 0.10.0"`
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else
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PCIACCESS_PKG_ERRORS=`$PKG_CONFIG --errors-to-stdout --print-errors "pciaccess >= 0.5.0"`
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PCIACCESS_PKG_ERRORS=`$PKG_CONFIG --errors-to-stdout --print-errors "pciaccess >= 0.10.0"`
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fi
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# Put the nasty error message in config.log where it belongs
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echo "$PCIACCESS_PKG_ERRORS" >&5
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@ -20765,7 +20765,6 @@ echo "${ECHO_T}yes" >&6
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have_libpciaccess=yes
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fi
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fi
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have_libpciaccess=no
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if test "x$XSERVER_LIBPCIACCESS" = xyes; then
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@ -21175,6 +21174,29 @@ DRIVER_NAME=intel
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XORG_MACROS_needed_version=1.1.3
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XORG_MACROS_needed_major=`echo $XORG_MACROS_needed_version | sed 's/\..*$//'`
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XORG_MACROS_needed_minor=`echo $XORG_MACROS_needed_version | sed -e 's/^[0-9]*\.//' -e 's/\..*$//'`
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echo "$as_me:$LINENO: checking if xorg-macros used to generate configure is at least ${XORG_MACROS_needed_major}.${XORG_MACROS_needed_minor}" >&5
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echo $ECHO_N "checking if xorg-macros used to generate configure is at least ${XORG_MACROS_needed_major}.${XORG_MACROS_needed_minor}... $ECHO_C" >&6
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XORG_MACROS_version=1.1.5
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XORG_MACROS_major=`echo $XORG_MACROS_version | sed 's/\..*$//'`
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XORG_MACROS_minor=`echo $XORG_MACROS_version | sed -e 's/^[0-9]*\.//' -e 's/\..*$//'`
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if test $XORG_MACROS_major -ne $XORG_MACROS_needed_major ; then
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{ { echo "$as_me:$LINENO: error: configure built with incompatible version of xorg-macros.m4 - requires version ${XORG_MACROS_major}.x" >&5
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echo "$as_me: error: configure built with incompatible version of xorg-macros.m4 - requires version ${XORG_MACROS_major}.x" >&2;}
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{ (exit 1); exit 1; }; }
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fi
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if test $XORG_MACROS_minor -lt $XORG_MACROS_needed_minor ; then
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{ { echo "$as_me:$LINENO: error: configure built with too old of a version of xorg-macros.m4 - requires version ${XORG_MACROS_major}.${XORG_MACROS_minor}.0 or newer" >&5
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echo "$as_me: error: configure built with too old of a version of xorg-macros.m4 - requires version ${XORG_MACROS_major}.${XORG_MACROS_minor}.0 or newer" >&2;}
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{ (exit 1); exit 1; }; }
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fi
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echo "$as_me:$LINENO: result: yes, $XORG_MACROS_version" >&5
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echo "${ECHO_T}yes, $XORG_MACROS_version" >&6
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if test x$APP_MAN_SUFFIX = x ; then
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APP_MAN_SUFFIX=1
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@ -21901,7 +21923,7 @@ _ASBOX
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} >&5
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cat >&5 <<_CSEOF
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This file was extended by xf86-video-intel $as_me 2.2.0, which was
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This file was extended by xf86-video-intel $as_me 2.2.0.90, which was
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generated by GNU Autoconf 2.59. Invocation command line was
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CONFIG_FILES = $CONFIG_FILES
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@ -21964,7 +21986,7 @@ _ACEOF
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cat >>$CONFIG_STATUS <<_ACEOF
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ac_cs_version="\\
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xf86-video-intel config.status 2.2.0
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xf86-video-intel config.status 2.2.0.90
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configured by $0, generated by GNU Autoconf 2.59,
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with options \\"`echo "$ac_configure_args" | sed 's/[\\""\`\$]/\\\\&/g'`\\"
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@ -298,6 +298,16 @@ extern int I810_DEBUG;
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#define PCI_CHIP_I815_BRIDGE 0x1130
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#endif
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#ifndef PCI_CHIP_I830_M
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#define PCI_CHIP_I830_M 0x3577
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#define PCI_CHIP_I830_M_BRIDGE 0x3575
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#endif
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#ifndef PCI_CHIP_845_G
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#define PCI_CHIP_845_G 0x2562
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#define PCI_CHIP_845_G_BRIDGE 0x2560
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#endif
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#ifndef PCI_CHIP_I855_GM
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#define PCI_CHIP_I855_GM 0x3582
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#define PCI_CHIP_I855_GM_BRIDGE 0x3580
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@ -339,9 +349,9 @@ extern int I810_DEBUG;
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#define PCI_CHIP_I945_GME_BRIDGE 0x27AC
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#endif
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#ifndef PCI_CHIP_I965_G_1
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#define PCI_CHIP_I965_G_1 0x2982
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#define PCI_CHIP_I965_G_1_BRIDGE 0x2980
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#ifndef PCI_CHIP_G35_G
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#define PCI_CHIP_G35_G 0x2982
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#define PCI_CHIP_G35_G_BRIDGE 0x2980
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#endif
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#ifndef PCI_CHIP_I965_Q
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@ -384,6 +394,11 @@ extern int I810_DEBUG;
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#define PCI_CHIP_Q33_G_BRIDGE 0x29D0
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#endif
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#ifndef PCI_CHIP_IGD_GM
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#define PCI_CHIP_IGD_GM 0x2A42
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#define PCI_CHIP_IGD_GM_BRIDGE 0x2A40
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#endif
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#if XSERVER_LIBPCIACCESS
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#define I810_MEMBASE(p,n) (p)->regions[(n)].base_addr
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#define VENDOR_ID(p) (p)->vendor_id
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@ -415,14 +430,15 @@ extern int I810_DEBUG;
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#define IS_I915GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I915_GM)
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#define IS_I945G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_G)
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#define IS_I945GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GME)
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#define IS_IGD_GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGD_GM)
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#define IS_I965GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
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#define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G_1 || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
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#define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G35_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME || IS_IGD_GM(pI810))
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#define IS_G33CLASS(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G33_G ||\
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DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q35_G ||\
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DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q33_G)
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#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810) || IS_G33CLASS(pI810))
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#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810))
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#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810) || IS_IGD_GM(pI810))
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/* mark chipsets for using gfx VM offset for overlay */
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#define OVERLAY_NOPHYSICAL(pI810) (IS_G33CLASS(pI810))
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@ -144,7 +144,7 @@ static const struct pci_id_match intel_device_match[] = {
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INTEL_DEVICE_MATCH (PCI_CHIP_I945_GM, 0 ),
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INTEL_DEVICE_MATCH (PCI_CHIP_I945_GME, 0 ),
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INTEL_DEVICE_MATCH (PCI_CHIP_I965_G, 0 ),
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INTEL_DEVICE_MATCH (PCI_CHIP_I965_G_1, 0 ),
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INTEL_DEVICE_MATCH (PCI_CHIP_G35_G, 0 ),
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INTEL_DEVICE_MATCH (PCI_CHIP_I965_Q, 0 ),
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INTEL_DEVICE_MATCH (PCI_CHIP_I946_GZ, 0 ),
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INTEL_DEVICE_MATCH (PCI_CHIP_I965_GM, 0 ),
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@ -152,6 +152,7 @@ static const struct pci_id_match intel_device_match[] = {
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INTEL_DEVICE_MATCH (PCI_CHIP_G33_G, 0 ),
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INTEL_DEVICE_MATCH (PCI_CHIP_Q35_G, 0 ),
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INTEL_DEVICE_MATCH (PCI_CHIP_Q33_G, 0 ),
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INTEL_DEVICE_MATCH (PCI_CHIP_IGD_GM, 0 ),
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{ 0, 0, 0 },
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};
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@ -196,7 +197,7 @@ static SymTabRec I810Chipsets[] = {
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{PCI_CHIP_I945_GM, "945GM"},
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{PCI_CHIP_I945_GME, "945GME"},
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{PCI_CHIP_I965_G, "965G"},
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{PCI_CHIP_I965_G_1, "965G"},
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{PCI_CHIP_G35_G, "G35"},
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{PCI_CHIP_I965_Q, "965Q"},
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{PCI_CHIP_I946_GZ, "946GZ"},
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{PCI_CHIP_I965_GM, "965GM"},
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@ -204,6 +205,7 @@ static SymTabRec I810Chipsets[] = {
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{PCI_CHIP_G33_G, "G33"},
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{PCI_CHIP_Q35_G, "Q35"},
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{PCI_CHIP_Q33_G, "Q33"},
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{PCI_CHIP_IGD_GM, "Intel Integrated Graphics Device"},
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{-1, NULL}
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};
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@ -225,7 +227,7 @@ static PciChipsets I810PciChipsets[] = {
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{PCI_CHIP_I945_GM, PCI_CHIP_I945_GM, RES_SHARED_VGA},
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{PCI_CHIP_I945_GME, PCI_CHIP_I945_GME, RES_SHARED_VGA},
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{PCI_CHIP_I965_G, PCI_CHIP_I965_G, RES_SHARED_VGA},
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{PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA},
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{PCI_CHIP_G35_G, PCI_CHIP_G35_G, RES_SHARED_VGA},
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{PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA},
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{PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA},
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{PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA},
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@ -233,6 +235,7 @@ static PciChipsets I810PciChipsets[] = {
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{PCI_CHIP_G33_G, PCI_CHIP_G33_G, RES_SHARED_VGA},
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{PCI_CHIP_Q35_G, PCI_CHIP_Q35_G, RES_SHARED_VGA},
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{PCI_CHIP_Q33_G, PCI_CHIP_Q33_G, RES_SHARED_VGA},
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{PCI_CHIP_IGD_GM, PCI_CHIP_IGD_GM, RES_SHARED_VGA},
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{-1, -1, RES_UNDEFINED }
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};
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||||
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@ -788,7 +791,7 @@ I810Probe(DriverPtr drv, int flags)
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case PCI_CHIP_I945_GM:
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case PCI_CHIP_I945_GME:
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case PCI_CHIP_I965_G:
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case PCI_CHIP_I965_G_1:
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case PCI_CHIP_G35_G:
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case PCI_CHIP_I965_Q:
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case PCI_CHIP_I946_GZ:
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case PCI_CHIP_I965_GM:
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@ -796,6 +799,7 @@ I810Probe(DriverPtr drv, int flags)
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case PCI_CHIP_G33_G:
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case PCI_CHIP_Q35_G:
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case PCI_CHIP_Q33_G:
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case PCI_CHIP_IGD_GM:
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xf86SetEntitySharable(usedChips[i]);
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/* Allocate an entity private if necessary */
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@ -950,7 +954,7 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
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pScrn->monitor = pScrn->confScreen->monitor;
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flags24 = Support24bppFb | PreferConvert32to24 | SupportConvert32to24;
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if (!xf86SetDepthBpp(pScrn, 0, 0, 0, flags24)) {
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if (!xf86SetDepthBpp(pScrn, 16, 0, 16, flags24)) {
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return FALSE;
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} else {
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switch (pScrn->depth) {
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@ -1249,7 +1249,7 @@ I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
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||||
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
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||||
I830Ptr pI830 = I830PTR(pScrn);
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||||
BoxPtr pboxTmp, pboxNext, pboxBase;
|
||||
DDXPointPtr pptTmp, pptNew2;
|
||||
DDXPointPtr pptTmp, pptNew2 = NULL;
|
||||
int xdir, ydir;
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||||
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||||
#if 0
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||||
@ -1277,12 +1277,12 @@ I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
|
||||
|
||||
if (nbox > 1) {
|
||||
/* Keep ordering in each band, reverse order of bands */
|
||||
pboxNew1 = (BoxPtr) ALLOCATE_LOCAL(sizeof(BoxRec) * nbox);
|
||||
pboxNew1 = (BoxPtr) xalloc(sizeof(BoxRec) * nbox);
|
||||
if (!pboxNew1)
|
||||
return;
|
||||
pptNew1 = (DDXPointPtr) ALLOCATE_LOCAL(sizeof(DDXPointRec) * nbox);
|
||||
pptNew1 = (DDXPointPtr) xalloc(sizeof(DDXPointRec) * nbox);
|
||||
if (!pptNew1) {
|
||||
DEALLOCATE_LOCAL(pboxNew1);
|
||||
xfree(pboxNew1);
|
||||
return;
|
||||
}
|
||||
pboxBase = pboxNext = pbox + nbox - 1;
|
||||
@ -1313,16 +1313,16 @@ I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
|
||||
|
||||
if (nbox > 1) {
|
||||
/*reverse orderof rects in each band */
|
||||
pboxNew2 = (BoxPtr) ALLOCATE_LOCAL(sizeof(BoxRec) * nbox);
|
||||
pptNew2 = (DDXPointPtr) ALLOCATE_LOCAL(sizeof(DDXPointRec) * nbox);
|
||||
pboxNew2 = (BoxPtr) xalloc(sizeof(BoxRec) * nbox);
|
||||
pptNew2 = (DDXPointPtr) xalloc(sizeof(DDXPointRec) * nbox);
|
||||
if (!pboxNew2 || !pptNew2) {
|
||||
if (pptNew2)
|
||||
DEALLOCATE_LOCAL(pptNew2);
|
||||
xfree(pptNew2);
|
||||
if (pboxNew2)
|
||||
DEALLOCATE_LOCAL(pboxNew2);
|
||||
xfree(pboxNew2);
|
||||
if (pboxNew1) {
|
||||
DEALLOCATE_LOCAL(pptNew1);
|
||||
DEALLOCATE_LOCAL(pboxNew1);
|
||||
xfree(pptNew1);
|
||||
xfree(pboxNew1);
|
||||
}
|
||||
return;
|
||||
}
|
||||
@ -1393,12 +1393,12 @@ I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
|
||||
I830EmitFlush(pScrn);
|
||||
|
||||
if (pboxNew2) {
|
||||
DEALLOCATE_LOCAL(pptNew2);
|
||||
DEALLOCATE_LOCAL(pboxNew2);
|
||||
xfree(pptNew2);
|
||||
xfree(pboxNew2);
|
||||
}
|
||||
if (pboxNew1) {
|
||||
DEALLOCATE_LOCAL(pptNew1);
|
||||
DEALLOCATE_LOCAL(pboxNew1);
|
||||
xfree(pptNew1);
|
||||
xfree(pboxNew1);
|
||||
}
|
||||
i830MarkSync(pScrn);
|
||||
}
|
||||
|
||||
@ -236,7 +236,7 @@ static SymTabRec I830Chipsets[] = {
|
||||
{PCI_CHIP_I945_GM, "945GM"},
|
||||
{PCI_CHIP_I945_GME, "945GME"},
|
||||
{PCI_CHIP_I965_G, "965G"},
|
||||
{PCI_CHIP_I965_G_1, "965G"},
|
||||
{PCI_CHIP_G35_G, "G35"},
|
||||
{PCI_CHIP_I965_Q, "965Q"},
|
||||
{PCI_CHIP_I946_GZ, "946GZ"},
|
||||
{PCI_CHIP_I965_GM, "965GM"},
|
||||
@ -244,6 +244,7 @@ static SymTabRec I830Chipsets[] = {
|
||||
{PCI_CHIP_G33_G, "G33"},
|
||||
{PCI_CHIP_Q35_G, "Q35"},
|
||||
{PCI_CHIP_Q33_G, "Q33"},
|
||||
{PCI_CHIP_IGD_GM, "Intel Integrated Graphics Device"},
|
||||
{-1, NULL}
|
||||
};
|
||||
|
||||
@ -259,7 +260,7 @@ static PciChipsets I830PciChipsets[] = {
|
||||
{PCI_CHIP_I945_GM, PCI_CHIP_I945_GM, RES_SHARED_VGA},
|
||||
{PCI_CHIP_I945_GME, PCI_CHIP_I945_GME, RES_SHARED_VGA},
|
||||
{PCI_CHIP_I965_G, PCI_CHIP_I965_G, RES_SHARED_VGA},
|
||||
{PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA},
|
||||
{PCI_CHIP_G35_G, PCI_CHIP_G35_G, RES_SHARED_VGA},
|
||||
{PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA},
|
||||
{PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA},
|
||||
{PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA},
|
||||
@ -267,6 +268,7 @@ static PciChipsets I830PciChipsets[] = {
|
||||
{PCI_CHIP_G33_G, PCI_CHIP_G33_G, RES_SHARED_VGA},
|
||||
{PCI_CHIP_Q35_G, PCI_CHIP_Q35_G, RES_SHARED_VGA},
|
||||
{PCI_CHIP_Q33_G, PCI_CHIP_Q33_G, RES_SHARED_VGA},
|
||||
{PCI_CHIP_IGD_GM, PCI_CHIP_IGD_GM, RES_SHARED_VGA},
|
||||
{-1, -1, RES_UNDEFINED}
|
||||
};
|
||||
|
||||
@ -296,6 +298,7 @@ typedef enum {
|
||||
OPTION_INTELTEXPOOL,
|
||||
#endif
|
||||
OPTION_TRIPLEBUFFER,
|
||||
OPTION_FORCEENABLEPIPEA
|
||||
} I830Opts;
|
||||
|
||||
static OptionInfoRec I830Options[] = {
|
||||
@ -318,6 +321,7 @@ static OptionInfoRec I830Options[] = {
|
||||
{OPTION_INTELTEXPOOL,"Legacy3D", OPTV_BOOLEAN, {0}, FALSE},
|
||||
#endif
|
||||
{OPTION_TRIPLEBUFFER, "TripleBuffer", OPTV_BOOLEAN, {0}, FALSE},
|
||||
{OPTION_FORCEENABLEPIPEA, "ForceEnablePipeA", OPTV_BOOLEAN, {0}, FALSE},
|
||||
{-1, NULL, OPTV_NONE, {0}, FALSE}
|
||||
};
|
||||
/* *INDENT-ON* */
|
||||
@ -453,6 +457,15 @@ I830DetectMemory(ScrnInfoPtr pScrn)
|
||||
case PGETBL_SIZE_128KB:
|
||||
gtt_size = 128;
|
||||
break;
|
||||
case PGETBL_SIZE_1MB:
|
||||
gtt_size = 1024;
|
||||
break;
|
||||
case PGETBL_SIZE_2MB:
|
||||
gtt_size = 2048;
|
||||
break;
|
||||
case PGETBL_SIZE_1_5MB:
|
||||
gtt_size = 1024 + 512;
|
||||
break;
|
||||
default:
|
||||
FatalError("Unknown GTT size value: %08x\n", (int)INREG(PGETBL_CTL));
|
||||
}
|
||||
@ -507,11 +520,11 @@ I830DetectMemory(ScrnInfoPtr pScrn)
|
||||
memsize = MB(64) - KB(range);
|
||||
break;
|
||||
case G33_GMCH_GMS_STOLEN_128M:
|
||||
if (IS_G33CLASS(pI830))
|
||||
if (IS_I9XX(pI830))
|
||||
memsize = MB(128) - KB(range);
|
||||
break;
|
||||
case G33_GMCH_GMS_STOLEN_256M:
|
||||
if (IS_G33CLASS(pI830))
|
||||
if (IS_I9XX(pI830))
|
||||
memsize = MB(256) - KB(range);
|
||||
break;
|
||||
}
|
||||
@ -597,8 +610,13 @@ I830MapMMIO(ScrnInfoPtr pScrn)
|
||||
|
||||
if (IS_I965G(pI830))
|
||||
{
|
||||
gttaddr = pI830->MMIOAddr + (512 * 1024);
|
||||
pI830->GTTMapSize = 512 * 1024;
|
||||
if (IS_IGD_GM(pI830)) {
|
||||
gttaddr = pI830->MMIOAddr + MB(2);
|
||||
pI830->GTTMapSize = MB(2);
|
||||
} else {
|
||||
gttaddr = pI830->MMIOAddr + KB(512);
|
||||
pI830->GTTMapSize = KB(512);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -1177,6 +1195,9 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
|
||||
pI830->debug_modes = FALSE;
|
||||
}
|
||||
|
||||
if (xf86ReturnOptValBool(pI830->Options, OPTION_FORCEENABLEPIPEA, FALSE))
|
||||
pI830->quirk_flag |= QUIRK_PIPEA_FORCE;
|
||||
|
||||
/* We have to use PIO to probe, because we haven't mapped yet. */
|
||||
I830SetPIOAccess(pI830);
|
||||
|
||||
@ -1237,9 +1258,11 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
|
||||
chipname = "945GME";
|
||||
break;
|
||||
case PCI_CHIP_I965_G:
|
||||
case PCI_CHIP_I965_G_1:
|
||||
chipname = "965G";
|
||||
break;
|
||||
case PCI_CHIP_G35_G:
|
||||
chipname = "G35";
|
||||
break;
|
||||
case PCI_CHIP_I965_Q:
|
||||
chipname = "965Q";
|
||||
break;
|
||||
@ -1261,6 +1284,9 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
|
||||
case PCI_CHIP_Q33_G:
|
||||
chipname = "Q33";
|
||||
break;
|
||||
case PCI_CHIP_IGD_GM:
|
||||
chipname = "Intel Integrated Graphics Device";
|
||||
break;
|
||||
default:
|
||||
chipname = "unknown chipset";
|
||||
break;
|
||||
@ -1906,6 +1932,7 @@ SaveHWState(ScrnInfoPtr pScrn)
|
||||
pI830->saveFBC_LL_BASE = INREG(FBC_LL_BASE);
|
||||
pI830->saveFBC_CONTROL2 = INREG(FBC_CONTROL2);
|
||||
pI830->saveFBC_CONTROL = INREG(FBC_CONTROL);
|
||||
pI830->saveFBC_FENCE_OFF = INREG(FBC_FENCE_OFF);
|
||||
}
|
||||
|
||||
/* Save video mode information for native mode-setting. */
|
||||
@ -1991,6 +2018,13 @@ SaveHWState(ScrnInfoPtr pScrn)
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
/* Wait for the PLL to settle down after programming */
|
||||
static void
|
||||
i830_dpll_settle(void)
|
||||
{
|
||||
usleep(10000); /* 10 ms *should* be plenty */
|
||||
}
|
||||
|
||||
static Bool
|
||||
RestoreHWState(ScrnInfoPtr pScrn)
|
||||
{
|
||||
@ -2025,6 +2059,23 @@ RestoreHWState(ScrnInfoPtr pScrn)
|
||||
if (!IS_I830(pI830) && !IS_845G(pI830))
|
||||
OUTREG(PFIT_CONTROL, pI830->savePFIT_CONTROL);
|
||||
|
||||
/*
|
||||
* Pipe regs
|
||||
* To restore the saved state, we first need to program the PLL regs,
|
||||
* followed by the pipe configuration and finally the display plane
|
||||
* configuration. The VGA registers can program one, both or neither
|
||||
* of the PLL regs, depending on their VGA_MOD_DIS bit value.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Since either or both pipes may use the VGA clocks, make sure the
|
||||
* regs are valid.
|
||||
*/
|
||||
OUTREG(VCLK_DIVISOR_VGA0, pI830->saveVCLK_DIVISOR_VGA0);
|
||||
OUTREG(VCLK_DIVISOR_VGA1, pI830->saveVCLK_DIVISOR_VGA1);
|
||||
OUTREG(VCLK_POST_DIV, pI830->saveVCLK_POST_DIV);
|
||||
|
||||
/* If the pipe A PLL is active, we can restore the pipe & plane config */
|
||||
if (pI830->saveDPLL_A & DPLL_VCO_ENABLE)
|
||||
{
|
||||
OUTREG(DPLL_A, pI830->saveDPLL_A & ~DPLL_VCO_ENABLE);
|
||||
@ -2033,13 +2084,14 @@ RestoreHWState(ScrnInfoPtr pScrn)
|
||||
OUTREG(FPA0, pI830->saveFPA0);
|
||||
OUTREG(FPA1, pI830->saveFPA1);
|
||||
OUTREG(DPLL_A, pI830->saveDPLL_A);
|
||||
usleep(150);
|
||||
i830_dpll_settle();
|
||||
if (IS_I965G(pI830))
|
||||
OUTREG(DPLL_A_MD, pI830->saveDPLL_A_MD);
|
||||
else
|
||||
OUTREG(DPLL_A, pI830->saveDPLL_A);
|
||||
usleep(150);
|
||||
i830_dpll_settle();
|
||||
|
||||
/* Restore mode config */
|
||||
OUTREG(HTOTAL_A, pI830->saveHTOTAL_A);
|
||||
OUTREG(HBLANK_A, pI830->saveHBLANK_A);
|
||||
OUTREG(HSYNC_A, pI830->saveHSYNC_A);
|
||||
@ -2058,20 +2110,31 @@ RestoreHWState(ScrnInfoPtr pScrn)
|
||||
OUTREG(DSPASURF, pI830->saveDSPASURF);
|
||||
OUTREG(DSPATILEOFF, pI830->saveDSPATILEOFF);
|
||||
}
|
||||
/*
|
||||
* Make sure the DPLL is active and not in VGA mode or the
|
||||
* write of PIPEnCONF may cause a crash
|
||||
*/
|
||||
if ((pI830->saveDPLL_A & DPLL_VCO_ENABLE) &&
|
||||
(pI830->saveDPLL_A & DPLL_VGA_MODE_DIS))
|
||||
OUTREG(PIPEACONF, pI830->savePIPEACONF);
|
||||
i830WaitForVblank(pScrn);
|
||||
OUTREG(DSPACNTR, pI830->saveDSPACNTR);
|
||||
OUTREG(DSPABASE, INREG(DSPABASE));
|
||||
|
||||
OUTREG(PIPEACONF, pI830->savePIPEACONF);
|
||||
i830WaitForVblank(pScrn);
|
||||
|
||||
/*
|
||||
* Program Pipe A's plane
|
||||
* The corresponding display plane may be disabled, and should only be
|
||||
* enabled if pipe A is actually on (otherwise we have a bug in the initial
|
||||
* state).
|
||||
*/
|
||||
if (pI830->saveDSPACNTR & DISPPLANE_SEL_PIPE_A) {
|
||||
OUTREG(DSPACNTR, pI830->saveDSPACNTR);
|
||||
OUTREG(DSPABASE, INREG(DSPABASE));
|
||||
i830WaitForVblank(pScrn);
|
||||
}
|
||||
if (pI830->saveDSPBCNTR & DISPPLANE_SEL_PIPE_A) {
|
||||
OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
|
||||
OUTREG(DSPBBASE, INREG(DSPBBASE));
|
||||
i830WaitForVblank(pScrn);
|
||||
}
|
||||
|
||||
/* See note about pipe programming above */
|
||||
if(xf86_config->num_crtc == 2)
|
||||
{
|
||||
/* If the pipe B PLL is active, we can restore the pipe & plane config */
|
||||
if (pI830->saveDPLL_B & DPLL_VCO_ENABLE)
|
||||
{
|
||||
OUTREG(DPLL_B, pI830->saveDPLL_B & ~DPLL_VCO_ENABLE);
|
||||
@ -2080,13 +2143,14 @@ RestoreHWState(ScrnInfoPtr pScrn)
|
||||
OUTREG(FPB0, pI830->saveFPB0);
|
||||
OUTREG(FPB1, pI830->saveFPB1);
|
||||
OUTREG(DPLL_B, pI830->saveDPLL_B);
|
||||
usleep(150);
|
||||
i830_dpll_settle();
|
||||
if (IS_I965G(pI830))
|
||||
OUTREG(DPLL_B_MD, pI830->saveDPLL_B_MD);
|
||||
else
|
||||
OUTREG(DPLL_B, pI830->saveDPLL_B);
|
||||
usleep(150);
|
||||
i830_dpll_settle();
|
||||
|
||||
/* Restore mode config */
|
||||
OUTREG(HTOTAL_B, pI830->saveHTOTAL_B);
|
||||
OUTREG(HBLANK_B, pI830->saveHBLANK_B);
|
||||
OUTREG(HSYNC_B, pI830->saveHSYNC_B);
|
||||
@ -2105,18 +2169,28 @@ RestoreHWState(ScrnInfoPtr pScrn)
|
||||
OUTREG(DSPBTILEOFF, pI830->saveDSPBTILEOFF);
|
||||
}
|
||||
|
||||
OUTREG(PIPEBCONF, pI830->savePIPEBCONF);
|
||||
i830WaitForVblank(pScrn);
|
||||
|
||||
/*
|
||||
* See PIPEnCONF note above
|
||||
* Program Pipe B's plane
|
||||
* Note that pipe B may be disabled, and in that case, the plane
|
||||
* should also be disabled or we must have had a bad initial state.
|
||||
*/
|
||||
if ((pI830->saveDPLL_B & DPLL_VCO_ENABLE) &&
|
||||
(pI830->saveDPLL_B & DPLL_VGA_MODE_DIS))
|
||||
OUTREG(PIPEBCONF, pI830->savePIPEBCONF);
|
||||
i830WaitForVblank(pScrn);
|
||||
OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
|
||||
OUTREG(DSPBBASE, INREG(DSPBBASE));
|
||||
i830WaitForVblank(pScrn);
|
||||
if (pI830->saveDSPACNTR & DISPPLANE_SEL_PIPE_B) {
|
||||
OUTREG(DSPACNTR, pI830->saveDSPACNTR);
|
||||
OUTREG(DSPABASE, INREG(DSPABASE));
|
||||
i830WaitForVblank(pScrn);
|
||||
}
|
||||
if (pI830->saveDSPBCNTR & DISPPLANE_SEL_PIPE_B) {
|
||||
OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
|
||||
OUTREG(DSPBBASE, INREG(DSPBBASE));
|
||||
i830WaitForVblank(pScrn);
|
||||
}
|
||||
}
|
||||
|
||||
OUTREG(VGACNTRL, pI830->saveVGACNTRL);
|
||||
|
||||
/* Restore outputs */
|
||||
for (i = 0; i < xf86_config->num_output; i++) {
|
||||
xf86OutputPtr output = xf86_config->output[i];
|
||||
@ -2124,12 +2198,6 @@ RestoreHWState(ScrnInfoPtr pScrn)
|
||||
output->funcs->restore(output);
|
||||
}
|
||||
|
||||
OUTREG(VGACNTRL, pI830->saveVGACNTRL);
|
||||
|
||||
OUTREG(VCLK_DIVISOR_VGA0, pI830->saveVCLK_DIVISOR_VGA0);
|
||||
OUTREG(VCLK_DIVISOR_VGA1, pI830->saveVCLK_DIVISOR_VGA1);
|
||||
OUTREG(VCLK_POST_DIV, pI830->saveVCLK_POST_DIV);
|
||||
|
||||
i830_restore_palette(pI830, PIPE_A);
|
||||
i830_restore_palette(pI830, PIPE_B);
|
||||
|
||||
@ -2145,6 +2213,7 @@ RestoreHWState(ScrnInfoPtr pScrn)
|
||||
if (pI830->fb_compression) {
|
||||
OUTREG(FBC_CFB_BASE, pI830->saveFBC_CFB_BASE);
|
||||
OUTREG(FBC_LL_BASE, pI830->saveFBC_LL_BASE);
|
||||
OUTREG(FBC_FENCE_OFF, pI830->saveFBC_FENCE_OFF);
|
||||
OUTREG(FBC_CONTROL2, pI830->saveFBC_CONTROL2);
|
||||
OUTREG(FBC_CONTROL, pI830->saveFBC_CONTROL);
|
||||
}
|
||||
@ -2286,6 +2355,7 @@ I830BlockHandler(int i,
|
||||
|
||||
(*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
|
||||
|
||||
pI830->BlockHandler = pScreen->BlockHandler;
|
||||
pScreen->BlockHandler = I830BlockHandler;
|
||||
|
||||
I830VideoBlockHandler(i, blockData, pTimeout, pReadmask);
|
||||
@ -2448,7 +2518,8 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
|
||||
}
|
||||
|
||||
/* Enable FB compression if possible */
|
||||
if (i830_fb_compression_supported(pI830) && !IS_I965GM(pI830))
|
||||
if (i830_fb_compression_supported(pI830) && !IS_I965GM(pI830)
|
||||
&& !IS_IGD_GM(pI830))
|
||||
pI830->fb_compression = TRUE;
|
||||
else
|
||||
pI830->fb_compression = FALSE;
|
||||
@ -2740,7 +2811,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
|
||||
* alone in that case.
|
||||
* Also make sure the DRM can handle the swap.
|
||||
*/
|
||||
if (I830LVDSPresent(pScrn) && !IS_I965GM(pI830) &&
|
||||
if (I830LVDSPresent(pScrn) && !IS_I965GM(pI830) && !IS_IGD_GM(pI830) &&
|
||||
(!pI830->directRenderingEnabled ||
|
||||
(pI830->directRenderingEnabled && pI830->drmMinor >= 10))) {
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "adjusting plane->pipe mappings "
|
||||
@ -2865,9 +2936,25 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
|
||||
pI830->directRenderingEnabled = I830DRIFinishScreenInit(pScreen);
|
||||
#endif
|
||||
|
||||
/* Must force it before EnterVT, so we are in control of VT and
|
||||
* later memory should be bound when allocating, e.g rotate_mem */
|
||||
pScrn->vtSema = TRUE;
|
||||
|
||||
if (!I830EnterVT(scrnIndex, 0))
|
||||
return FALSE;
|
||||
|
||||
pI830->BlockHandler = pScreen->BlockHandler;
|
||||
pScreen->BlockHandler = I830BlockHandler;
|
||||
|
||||
pScreen->SaveScreen = xf86SaveScreen;
|
||||
pI830->CloseScreen = pScreen->CloseScreen;
|
||||
pScreen->CloseScreen = I830CloseScreen;
|
||||
pI830->CreateScreenResources = pScreen->CreateScreenResources;
|
||||
pScreen->CreateScreenResources = i830CreateScreenResources;
|
||||
|
||||
if (!xf86CrtcScreenInit (pScreen))
|
||||
return FALSE;
|
||||
|
||||
DPRINTF(PFX, "assert( if(!miCreateDefColormap(pScreen)) )\n");
|
||||
if (!miCreateDefColormap(pScreen))
|
||||
return FALSE;
|
||||
@ -2904,17 +2991,6 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: Not available\n");
|
||||
#endif
|
||||
|
||||
pI830->BlockHandler = pScreen->BlockHandler;
|
||||
pScreen->BlockHandler = I830BlockHandler;
|
||||
|
||||
pScreen->SaveScreen = xf86SaveScreen;
|
||||
pI830->CloseScreen = pScreen->CloseScreen;
|
||||
pScreen->CloseScreen = I830CloseScreen;
|
||||
pI830->CreateScreenResources = pScreen->CreateScreenResources;
|
||||
pScreen->CreateScreenResources = i830CreateScreenResources;
|
||||
|
||||
if (!xf86CrtcScreenInit (pScreen))
|
||||
return FALSE;
|
||||
|
||||
/* Wrap pointer motion to flip touch screen around */
|
||||
pI830->PointerMoved = pScrn->PointerMoved;
|
||||
|
||||
@ -97,6 +97,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
#endif
|
||||
|
||||
#include <assert.h>
|
||||
#include <inttypes.h>
|
||||
#include <string.h>
|
||||
#include <errno.h>
|
||||
#include <sys/types.h>
|
||||
@ -274,12 +275,16 @@ i830_free_memory(ScrnInfoPtr pScrn, i830_memory *mem)
|
||||
I830Ptr pI830 = I830PTR(pScrn);
|
||||
|
||||
drmBOUnreference(pI830->drmSubFD, &mem->bo);
|
||||
if (pI830->bo_list == mem)
|
||||
if (pI830->bo_list == mem) {
|
||||
pI830->bo_list = mem->next;
|
||||
if (mem->next)
|
||||
mem->next->prev = NULL;
|
||||
if (mem->prev)
|
||||
mem->prev->next = NULL;
|
||||
if (mem->next)
|
||||
mem->next->prev = NULL;
|
||||
} else {
|
||||
if (mem->prev)
|
||||
mem->prev->next = mem->next;
|
||||
if (mem->next)
|
||||
mem->next->prev = mem->prev;
|
||||
}
|
||||
xfree(mem->name);
|
||||
xfree(mem);
|
||||
return;
|
||||
@ -596,8 +601,8 @@ i830_get_stolen_physical(ScrnInfoPtr pScrn, unsigned long offset,
|
||||
|
||||
if ((scan - offset) != (scan_physical - physical)) {
|
||||
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
|
||||
"Non-contiguous GTT entries: (%ld,0x16%llx) vs "
|
||||
"(%ld,0x%16llx)\n",
|
||||
"Non-contiguous GTT entries: (%ld,0x16%" PRIx64 ") vs "
|
||||
"(%ld,0x%" PRIx64 ")\n",
|
||||
scan, scan_physical, offset, physical);
|
||||
return -1;
|
||||
}
|
||||
@ -945,7 +950,7 @@ i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity, const char *prefix)
|
||||
|
||||
if (mem->bus_addr != 0)
|
||||
snprintf(phys_suffix, sizeof(phys_suffix),
|
||||
", 0x%016llx physical\n", mem->bus_addr);
|
||||
", 0x%016" PRIx64 " physical\n", mem->bus_addr);
|
||||
if (mem->tiling == TILE_XMAJOR)
|
||||
tile_suffix = " X tiled";
|
||||
else if (mem->tiling == TILE_YMAJOR)
|
||||
@ -1930,7 +1935,8 @@ i830_bind_all_memory(ScrnInfoPtr pScrn)
|
||||
}
|
||||
#endif
|
||||
}
|
||||
i830_update_cursor_offsets(pScrn);
|
||||
if (!pI830->SWCursor)
|
||||
i830_update_cursor_offsets(pScrn);
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
@ -50,6 +50,7 @@
|
||||
#include "config.h"
|
||||
#endif
|
||||
|
||||
#include <inttypes.h>
|
||||
#include <math.h>
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
@ -462,7 +463,8 @@ i830_overlay_continue(ScrnInfoPtr pScrn, Bool update_filter)
|
||||
flip_addr = pI830->overlay_regs->bus_addr;
|
||||
if (update_filter)
|
||||
flip_addr |= OFC_UPDATE;
|
||||
OVERLAY_DEBUG ("overlay_continue cmd 0x%08lx -> 0x%08lx sta 0x%08lx\n",
|
||||
OVERLAY_DEBUG ("overlay_continue cmd 0x%08" PRIx32 " -> 0x%08" PRIx32
|
||||
" sta 0x%08" PRIx32 "\n",
|
||||
overlay->OCMD, INREG(OCMD_REGISTER), INREG(DOVSTA));
|
||||
BEGIN_LP_RING(4);
|
||||
OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE);
|
||||
@ -503,7 +505,7 @@ i830_overlay_off(ScrnInfoPtr pScrn)
|
||||
*/
|
||||
{
|
||||
overlay->OCMD &= ~OVERLAY_ENABLE;
|
||||
OVERLAY_DEBUG ("overlay_off cmd 0x%08lx -> 0x%08lx sta 0x%08lx\n",
|
||||
OVERLAY_DEBUG ("overlay_off cmd 0x%08" PRIx32 " -> 0x%08" PRIx32 " sta 0x%08" PRIx32 "\n",
|
||||
overlay->OCMD, INREG(OCMD_REGISTER), INREG(DOVSTA));
|
||||
BEGIN_LP_RING(6);
|
||||
OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE);
|
||||
@ -675,7 +677,7 @@ I830ResetVideo(ScrnInfoPtr pScrn)
|
||||
{
|
||||
int i;
|
||||
for (i = 0x30000; i < 0x31000; i += 4)
|
||||
ErrorF("0x%x 0x%lx\n", i, INREG(i));
|
||||
ErrorF("0x%x 0x%" PRIx32 "\n", i, INREG(i));
|
||||
}
|
||||
#endif
|
||||
}
|
||||
@ -1905,7 +1907,7 @@ i830_display_video(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
|
||||
overlay->OBUF_1V = pPriv->VBuf1offset;
|
||||
}
|
||||
|
||||
OVERLAY_DEBUG("pos: 0x%lx, size: 0x%lx\n",
|
||||
OVERLAY_DEBUG("pos: 0x%" PRIx32 ", size: 0x%" PRIx32 "\n",
|
||||
overlay->DWINPOS, overlay->DWINSZ);
|
||||
OVERLAY_DEBUG("dst: %d x %d, src: %d x %d\n", drw_w, drw_h, src_w, src_h);
|
||||
|
||||
@ -2067,7 +2069,7 @@ i830_display_video(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
|
||||
OCMD |= BUFFER1;
|
||||
|
||||
overlay->OCMD = OCMD;
|
||||
OVERLAY_DEBUG("OCMD is 0x%lx\n", OCMD);
|
||||
OVERLAY_DEBUG("OCMD is 0x%" PRIx32 "\n", OCMD);
|
||||
|
||||
/* make sure the overlay is on */
|
||||
i830_overlay_on (pScrn);
|
||||
@ -2575,6 +2577,7 @@ I830VideoBlockHandler(int i, pointer blockData, pointer pTimeout,
|
||||
*/
|
||||
I830Sync(pScrn);
|
||||
i830_free_memory(pScrn, pPriv->buf);
|
||||
pPriv->buf = NULL;
|
||||
pPriv->videoStatus = 0;
|
||||
}
|
||||
}
|
||||
@ -2687,6 +2690,7 @@ I830FreeSurface(XF86SurfacePtr surface)
|
||||
/* Sync before freeing the buffer, because the pages will be unbound. */
|
||||
I830Sync(pScrn);
|
||||
i830_free_memory(surface->pScrn, pPriv->buf);
|
||||
pPriv->buf = NULL;
|
||||
xfree(surface->pitches);
|
||||
xfree(surface->offsets);
|
||||
xfree(surface->devPrivate.ptr);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user