Update to xf86-video-openchrome 0.2.906

This commit is contained in:
matthieu 2012-06-11 21:21:54 +00:00
parent 4b78f29c94
commit 3cbf28410e
16 changed files with 409 additions and 55 deletions

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@ -1,3 +1,14 @@
openchrome 0.2.906 (15/05/2012)
-------------------------------
* New features :
- VX900 Xv support.
- EXA is now the default although compositing is buggy and thus disabled.
* Bugfixes and enhancements :
- Fix I420 Xv surface on CME engine.
- Fix EXA to not require XAA module in X server.
openchrome 0.2.905 (10/02/2012)
-------------------------------
* New features :

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@ -55,11 +55,8 @@ KNOWN BUGS/LIMITATIONS :
- CX700, VX800 and VX855 integrated TMDS is supported.
* Chrome9
- Chrome9 chipsets' family (P4M900, K8M890, VX800, VX855) currently doesn't
support neither AGP DMA nor 3D acceleration.
* VX900
- Xv is not yet supported.
- Chrome9 chipsets' family (P4M900, K8M890, VX800, VX855, VX900) currently
doesn't support neither AGP DMA nor 3D acceleration.
Please note that 3D acceleration is provided by Mesa (http://mesa3d.org) and is

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@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.62 for xf86-video-openchrome 0.2.905.
# Generated by GNU Autoconf 2.62 for xf86-video-openchrome 0.2.906.
#
# Report bugs to <http://www.openchrome.org/trac/report/1>.
#
@ -616,8 +616,8 @@ SHELL=${CONFIG_SHELL-/bin/sh}
# Identity of this package.
PACKAGE_NAME='xf86-video-openchrome'
PACKAGE_TARNAME='xf86-video-openchrome'
PACKAGE_VERSION='0.2.905'
PACKAGE_STRING='xf86-video-openchrome 0.2.905'
PACKAGE_VERSION='0.2.906'
PACKAGE_STRING='xf86-video-openchrome 0.2.906'
PACKAGE_BUGREPORT='http://www.openchrome.org/trac/report/1'
ac_unique_file="Makefile.am"
@ -1406,7 +1406,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures xf86-video-openchrome 0.2.905 to adapt to many kinds of systems.
\`configure' configures xf86-video-openchrome 0.2.906 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@ -1477,7 +1477,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of xf86-video-openchrome 0.2.905:";;
short | recursive ) echo "Configuration of xf86-video-openchrome 0.2.906:";;
esac
cat <<\_ACEOF
@ -1608,7 +1608,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
xf86-video-openchrome configure 0.2.905
xf86-video-openchrome configure 0.2.906
generated by GNU Autoconf 2.62
Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
@ -1622,7 +1622,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
It was created by xf86-video-openchrome $as_me 0.2.905, which was
It was created by xf86-video-openchrome $as_me 0.2.906, which was
generated by GNU Autoconf 2.62. Invocation command line was
$ $0 $@
@ -14230,7 +14230,7 @@ fi
# Define the identity of the package.
PACKAGE='xf86-video-openchrome'
VERSION='0.2.905'
VERSION='0.2.906'
cat >>confdefs.h <<_ACEOF
@ -25031,7 +25031,7 @@ exec 6>&1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by xf86-video-openchrome $as_me 0.2.905, which was
This file was extended by xf86-video-openchrome $as_me 0.2.906, which was
generated by GNU Autoconf 2.62. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@ -25084,7 +25084,7 @@ Report bugs to <bug-autoconf@gnu.org>."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_version="\\
xf86-video-openchrome config.status 0.2.905
xf86-video-openchrome config.status 0.2.906
configured by $0, generated by GNU Autoconf 2.62,
with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"

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@ -22,7 +22,7 @@
AC_PREREQ(2.57)
AC_INIT([xf86-video-openchrome],
0.2.905,
0.2.906,
[http://www.openchrome.org/trac/report/1],
xf86-video-openchrome)

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@ -14,7 +14,7 @@
@SET_MAKE@
# $Id: Makefile.in,v 1.8 2012/05/15 21:32:57 matthieu Exp $
# $Id: Makefile.in,v 1.9 2012/06/11 21:21:55 matthieu Exp $
#
# Copyright 2005 Sun Microsystems, Inc. All rights reserved.
#

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@ -37,6 +37,7 @@ openchrome_drv_la_SOURCES = \
via_3d.c \
via_3d.h \
via_3d_reg.h \
via_rop.h \
via_accel.c \
via_bandwidth.c \
via_bios.h \

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@ -96,7 +96,7 @@ openchrome_drv_laLTLIBRARIES_INSTALL = $(INSTALL)
LTLIBRARIES = $(openchrome_drv_la_LTLIBRARIES)
openchrome_drv_la_LIBADD =
am__openchrome_drv_la_SOURCES_DIST = via.h via_3d.c via_3d.h \
via_3d_reg.h via_accel.c via_bandwidth.c via_bios.h \
via_3d_reg.h via_rop.h via_accel.c via_bandwidth.c via_bios.h \
via_ch7xxx.c via_ch7xxx.h via_cursor.c via_crtc.c via_dga.c \
via_display.c via_dmabuffer.h via_driver.c via_driver.h \
via_i2c.c via_id.c via_id.h via_lvds.c via_memcpy.c \
@ -292,7 +292,7 @@ openchrome_drv_la_LTLIBRARIES = openchrome_drv.la
openchrome_drv_la_LDFLAGS = -module -avoid-version
openchrome_drv_ladir = @moduledir@/drivers
openchrome_drv_la_SOURCES = via.h via_3d.c via_3d.h via_3d_reg.h \
via_accel.c via_bandwidth.c via_bios.h via_ch7xxx.c \
via_rop.h via_accel.c via_bandwidth.c via_bios.h via_ch7xxx.c \
via_ch7xxx.h via_cursor.c via_crtc.c via_dga.c via_display.c \
via_dmabuffer.h via_driver.c via_driver.h via_i2c.c via_id.c \
via_id.h via_lvds.c via_memcpy.c via_memcpy.h via_memory.c \

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@ -1 +1 @@
#define BUILDCOMMENT "(openchrome 0.2.905 release)"
#define BUILDCOMMENT "(openchrome 0.2.906 release)"

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@ -260,7 +260,7 @@
#define V1_EXPIRE_NUM_A 0x000a0000
#define V1_EXPIRE_NUM_F 0x000f0000 /* jason */
#define V1_FIFO_EXTENDED 0x00200000
#define V1_ON_CRT 0x00000000
#define V1_ON_PRI 0x00000000
#define V1_ON_SND_DISPLAY 0x80000000
#define V1_FIFO_32V1_32V2 0x00000000
#define V1_FIFO_48V1_32V2 0x00200000
@ -608,6 +608,7 @@
#define HQV_DST_DATA_OFFSET_CTRL2 0x184
#define HQV_DST_DATA_OFFSET_CTRL3 0x188
#define HQV_DST_DATA_OFFSET_CTRL4 0x18C
#define HQV_SHARPNESS_DECODER_HANDSHAKE_CTRL_410 0x1A4
#define HQV_RESIDUE_PIXEL_FRAME_STARTADDR 0x1BC
#define HQV_BACKGROUND_DATA_OFFSET 0x1CC
#define HQV_SUBP_HSCALE_CTRL 0x1E0

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@ -35,7 +35,6 @@
#include <X11/Xarch.h>
#include "xaalocal.h"
#include "xaarop.h"
#include "miline.h"
#include "via.h"
@ -43,14 +42,7 @@
#include "via_regs.h"
#include "via_id.h"
#include "via_dmabuffer.h"
#ifdef X_HAVE_XAAGETROP
#define VIAACCELPATTERNROP(vRop) (XAAGetPatternROP(vRop) << 24)
#define VIAACCELCOPYROP(vRop) (XAAGetCopyROP(vRop) << 24)
#else
#define VIAACCELPATTERNROP(vRop) (XAAPatternROP[vRop] << 24)
#define VIAACCELCOPYROP(vRop) (XAACopyROP[vRop] << 24)
#endif
#include "via_rop.h"
enum VIA_2D_Regs {
GECMD,

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@ -682,7 +682,8 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
pVia->shadowFB = FALSE;
pVia->NoAccel = FALSE;
pVia->noComposite = FALSE;
pVia->noComposite = TRUE;
pVia->useEXA = TRUE;
pVia->exaScratchSize = VIA_SCRATCH_SIZE / 1024;
pVia->hwcursor = TRUE;
pVia->VQEnable = TRUE;
@ -1215,12 +1216,12 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
if (!pVia->NoAccel) {
from = X_DEFAULT;
if ((s = (char *)xf86GetOptValString(VIAOptions, OPTION_ACCELMETHOD))) {
if (!xf86NameCmp(s, "XAA")) {
from = X_CONFIG;
pVia->useEXA = FALSE;
} else if (!xf86NameCmp(s, "EXA")) {
if (!xf86NameCmp(s, "EXA")) {
from = X_CONFIG;
pVia->useEXA = TRUE;
} else if (!xf86NameCmp(s, "XAA")) {
from = X_CONFIG;
pVia->useEXA = FALSE;
}
}
xf86DrvMsg(pScrn->scrnIndex, from,
@ -1809,12 +1810,13 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
VIAFreeRec(pScrn);
return FALSE;
}
}
} else {
if (!xf86LoadSubModule(pScrn, "xaa")) {
VIAFreeRec(pScrn);
return FALSE;
}
}
}
if (pVia->hwcursor) {
if (!xf86LoadSubModule(pScrn, "ramdac")) {

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@ -104,7 +104,7 @@
#define DRIVER_NAME "openchrome"
#define VERSION_MAJOR 0
#define VERSION_MINOR 2
#define PATCHLEVEL 905
#define PATCHLEVEL 906
#define VIA_VERSION ((VERSION_MAJOR<<24) | (VERSION_MINOR<<16) | PATCHLEVEL)
#define VIA_VQ_SIZE (256 * 1024)

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@ -1749,6 +1749,12 @@ ViaModeSet(ScrnInfoPtr pScrn, DisplayModePtr mode)
(pVia->Chipset == VIA_K8M800) ||
(pVia->Chipset == VIA_VX900) )) {
pBIOSInfo->FirstCRTC->IsActive=TRUE;
if (pVia->DDC1) {
pBIOSInfo->SecondCRTC->IsActive=TRUE;
} else {
//We need to disable the secondary to properly work XVideo on VX900
pBIOSInfo->SecondCRTC->IsActive=FALSE;
}
ViaModeFirstCRTC(pScrn, mode);
}
if (pBIOSInfo->Simultaneous->IsActive) {

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@ -0,0 +1,322 @@
/*
* Copyright 2008 Maarten Maathuis
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
/* Ternary Raster Operations as defined by GDI
* 0 = black
* 1 = white
* D = destination
* S = source
* P = pattern
* o = bitwise OR
* a = bitwise AND
* n = bitwise inverse
* x = bitwise XOR
*
* The notation is reverse polish.
* Example:
* ROP_PDSonon: !(P | !(D | S))
*/
#define ROP_0 0x00
#define ROP_DPSoon 0x01
#define ROP_DPSona 0x02
#define ROP_PSon 0x03
#define ROP_SDPona 0x04
#define ROP_DPon 0x05
#define ROP_PDSxnon 0x06
#define ROP_PDSaon 0x07
#define ROP_SDPnaa 0x08
#define ROP_PDSxon 0x09
#define ROP_DPna 0x0A
#define ROP_PSDnaon 0x0B
#define ROP_SPna 0x0C
#define ROP_PDSnaon 0x0D
#define ROP_PDSonon 0x0E
#define ROP_Pn 0x0F
#define ROP_PDSona 0x10
#define ROP_DSon 0x11
#define ROP_SDPxnon 0x12
#define ROP_SDPaon 0x13
#define ROP_DPSxnon 0x14
#define ROP_DPSaon 0x15
#define ROP_PSDPSanaxx 0x16
#define ROP_SSPxDSxaxn 0x17
#define ROP_SPxPDxa 0x18
#define ROP_SDPSanaxn 0x19
#define ROP_PDSPaox 0x1A
#define ROP_SDPSxaxn 0x1B
#define ROP_PSDPaox 0x1C
#define ROP_DSPDxaxn 0x1D
#define ROP_PDSox 0x1E
#define ROP_PDSoan 0x1F
#define ROP_DPSnaa 0x20
#define ROP_SDPxon 0x21
#define ROP_DSna 0x22
#define ROP_SPDnaon 0x23
#define ROP_SPxDSxa 0x24
#define ROP_PDSPanaxn 0x25
#define ROP_SDPSaox 0x26
#define ROP_SDPSxnox 0x27
#define ROP_DPSxa 0x28
#define ROP_PSDPSaoxxn 0x29
#define ROP_DPSana 0x2A
#define ROP_SSPxPDxaxn 0x2B
#define ROP_SPDSoax 0x2C
#define ROP_PSDnox 0x2D
#define ROP_PSDPxox 0x2E
#define ROP_PSDnoan 0x2F
#define ROP_PSna 0x30
#define ROP_SDPnaon 0x31
#define ROP_SDPSoox 0x32
#define ROP_Sn 0x33
#define ROP_SPDSaox 0x34
#define ROP_SPDSxnox 0x35
#define ROP_SDPox 0x36
#define ROP_SDPoan 0x37
#define ROP_PSDPoax 0x38
#define ROP_SPDnox 0x39
#define ROP_SPDSxox 0x3A
#define ROP_SPDnoan 0x3B
#define ROP_PSx 0x3C
#define ROP_SPDSonox 0x3D
#define ROP_SPDSnaox 0x3E
#define ROP_PSan 0x3F
#define ROP_PSDnaa 0x40
#define ROP_DPSxon 0x41
#define ROP_SDxPDxa 0x42
#define ROP_SPDSanaxn 0x43
#define ROP_SDna 0x44
#define ROP_DPSnaon 0x45
#define ROP_DSPDaox 0x46
#define ROP_PSDPxaxn 0x47
#define ROP_SDPxa 0x48
#define ROP_PDSPDaoxxn 0x49
#define ROP_DPSDoax 0x4A
#define ROP_PDSnox 0x4B
#define ROP_SDPana 0x4C
#define ROP_SSPxDSxoxn 0x4D
#define ROP_PDSPxox 0x4E
#define ROP_PDSnoan 0x4F
#define ROP_PDna 0x50
#define ROP_DSPnaon 0x51
#define ROP_DPSDaox 0x52
#define ROP_SPDSxaxn 0x53
#define ROP_DPSonon 0x54
#define ROP_Dn 0x55
#define ROP_DPSox 0x56
#define ROP_DPSoan 0x57
#define ROP_PDSPoax 0x58
#define ROP_DPSnox 0x59
#define ROP_DPx 0x5A
#define ROP_DPSDonox 0x5B
#define ROP_DPSDxox 0x5C
#define ROP_DPSnoan 0x5D
#define ROP_DPSDnaox 0x5E
#define ROP_DPan 0x5F
#define ROP_PDSxa 0x60
#define ROP_DSPDSaoxxn 0x61
#define ROP_DSPDoax 0x62
#define ROP_SDPnox 0x63
#define ROP_SDPSoax 0x64
#define ROP_DSPnox 0x65
#define ROP_DSx 0x66
#define ROP_SDPSonox 0x67
#define ROP_DSPDSonoxxn 0x68
#define ROP_PDSxxn 0x69
#define ROP_DPSax 0x6A
#define ROP_PSDPSoaxxn 0x6B
#define ROP_SDPax 0x6C
#define ROP_PDSPDoaxxn 0x6D
#define ROP_SDPSnoax 0x6E
#define ROP_PDSxnan 0x6F
#define ROP_PDSana 0x70
#define ROP_SSDxPDxaxn 0x71
#define ROP_SDPSxox 0x72
#define ROP_SDPnoan 0x73
#define ROP_DSPDxox 0x74
#define ROP_DSPnoan 0x75
#define ROP_SDPSnaox 0x76
#define ROP_DSan 0x77
#define ROP_PDSax 0x78
#define ROP_DSPDSoaxxn 0x79
#define ROP_DPSDnoax 0x7A
#define ROP_SDPxnan 0x7B
#define ROP_SPDSnoax 0x7C
#define ROP_DPSxnan 0x7D
#define ROP_SPxDSxo 0x7E
#define ROP_DPSaan 0x7F
#define ROP_DPSaa 0x80
#define ROP_SPxDSxon 0x81
#define ROP_DPSxna 0x82
#define ROP_SPDSnoaxn 0x83
#define ROP_SDPxna 0x84
#define ROP_PDSPnoaxn 0x85
#define ROP_DSPDSoaxx 0x86
#define ROP_PDSaxn 0x87
#define ROP_DSa 0x88
#define ROP_SDPSnaoxn 0x89
#define ROP_DSPnoa 0x8A
#define ROP_DSPDxoxn 0x8B
#define ROP_SDPnoa 0x8C
#define ROP_SDPSxoxn 0x8D
#define ROP_SSDxPDxax 0x8E
#define ROP_PDSanan 0x8F
#define ROP_PDSxna 0x90
#define ROP_SDPSnoaxn 0x91
#define ROP_DPSDPoaxx 0x92
#define ROP_SPDaxn 0x93
#define ROP_PSDPSoaxx 0x94
#define ROP_DPSaxn 0x95
#define ROP_DPSxx 0x96
#define ROP_PSDPSonoxx 0x97
#define ROP_SDPSonoxn 0x98
#define ROP_DSxn 0x99
#define ROP_DPSnax 0x9A
#define ROP_SDPSoaxn 0x9B
#define ROP_SPDnax 0x9C
#define ROP_DSPDoaxn 0x9D
#define ROP_DSPDSaoxx 0x9E
#define ROP_PDSxan 0x9F
#define ROP_DPa 0xA0
#define ROP_PDSPnaoxn 0xA1
#define ROP_DPSnoa 0xA2
#define ROP_DPSDxoxn 0xA3
#define ROP_PDSPonoxn 0xA4
#define ROP_PDxn 0xA5
#define ROP_DSPnax 0xA6
#define ROP_PDSPoaxn 0xA7
#define ROP_DPSoa 0xA8
#define ROP_DPSoxn 0xA9
#define ROP_D 0xAA
#define ROP_DPSono 0xAB
#define ROP_SPDSxax 0xAC
#define ROP_DPSDaoxn 0xAD
#define ROP_DSPnao 0xAE
#define ROP_DPno 0xAF
#define ROP_PDSnoa 0xB0
#define ROP_PDSPxoxn 0xB1
#define ROP_SSPxDSxox 0xB2
#define ROP_SDPanan 0xB3
#define ROP_PSDnax 0xB4
#define ROP_DPSDoaxn 0xB5
#define ROP_DPSDPaoxx 0xB6
#define ROP_SDPxan 0xB7
#define ROP_PSDPxax 0xB8
#define ROP_DSPDaoxn 0xB9
#define ROP_DPSnao 0xBA
#define ROP_DSno 0xBB
#define ROP_SPDSanax 0xBC
#define ROP_SDxPDxan 0xBD
#define ROP_DPSxo 0xBE
#define ROP_DPSano 0xBF
#define ROP_Psa 0xC0
#define ROP_SPDSnaoxn 0xC1
#define ROP_SPDSonoxn 0xC2
#define ROP_PSxn 0xC3
#define ROP_SPDnoa 0xC4
#define ROP_SPDSxoxn 0xC5
#define ROP_SDPnax 0xC6
#define ROP_PSDPoaxn 0xC7
#define ROP_SDPoa 0xC8
#define ROP_SPDoxn 0xC9
#define ROP_DPSDxax 0xCA
#define ROP_SPDSaoxn 0xCB
#define ROP_S 0xCC
#define ROP_SDPono 0xCD
#define ROP_SDPnao 0xCE
#define ROP_SPno 0xCF
#define ROP_PSDnoa 0xD0
#define ROP_PSDPxoxn 0xD1
#define ROP_PDSnax 0xD2
#define ROP_SPDSoaxn 0xD3
#define ROP_SSPxPDxax 0xD4
#define ROP_DPSanan 0xD5
#define ROP_PSDPSaoxx 0xD6
#define ROP_DPSxan 0xD7
#define ROP_PDSPxax 0xD8
#define ROP_SDPSaoxn 0xD9
#define ROP_DPSDanax 0xDA
#define ROP_SPxDSxan 0xDB
#define ROP_SPDnao 0xDC
#define ROP_SDno 0xDD
#define ROP_SDPxo 0xDE
#define ROP_SDPano 0xDF
#define ROP_PDSoa 0xE0
#define ROP_PDSoxn 0xE1
#define ROP_DSPDxax 0xE2
#define ROP_PSDPaoxn 0xE3
#define ROP_SDPSxax 0xE4
#define ROP_PDSPaoxn 0xE5
#define ROP_SDPSanax 0xE6
#define ROP_SPxPDxan 0xE7
#define ROP_SSPxDSxax 0xE8
#define ROP_DSPDSanaxxn 0xE9
#define ROP_DPSao 0xEA
#define ROP_DPSxno 0xEB
#define ROP_SDPao 0xEC
#define ROP_SDPxno 0xED
#define ROP_DSo 0xEE
#define ROP_SDPnoo 0xEF
#define ROP_P 0xF0
#define ROP_PDSono 0xF1
#define ROP_PDSnao 0xF2
#define ROP_PSno 0xF3
#define ROP_PSDnao 0xF4
#define ROP_PDno 0xF5
#define ROP_PDSxo 0xF6
#define ROP_PDSano 0xF7
#define ROP_PDSao 0xF8
#define ROP_PDSxno 0xF9
#define ROP_DPo 0xFA
#define ROP_DPSnoo 0xFB
#define ROP_PSo 0xFC
#define ROP_PSDnoo 0xFD
#define ROP_DPSoo 0xFE
#define ROP_1 0xFF
/* derived from XAA */
static struct {
int copy;
int copy_planemask;
int pattern;
int pattern_planemask;
} VIAROP[] = {
{ ROP_0, ROP_0, ROP_0, ROP_DPna }, /* GXclear */
{ ROP_DSa, ROP_DSPnoa, ROP_DPa, ROP_DPSnoa }, /* GXand */
{ ROP_SDna, ROP_DPSnaon, ROP_PDna, ROP_DSPnaon }, /* GXandReverse */
{ ROP_S, ROP_DPSDxax, ROP_P, ROP_DSPDxax }, /* GXcopy */
{ ROP_DSna, ROP_DPSana, ROP_DPna, ROP_DPSana }, /* GXandInverted */
{ ROP_D, ROP_D, ROP_D, ROP_D }, /* GXnoop */
{ ROP_DSx, ROP_DPSax, ROP_DPx, ROP_DPSax }, /* GXxor */
{ ROP_DSo, ROP_DPSao, ROP_DPo, ROP_DPSao }, /* GXor */
{ ROP_DSon, ROP_DPSaon, ROP_DPon, ROP_DPSaon }, /* GXnor */
{ ROP_DSxn, ROP_DPSaxn, ROP_PDxn, ROP_DPSaxn }, /* GXequiv */
{ ROP_Dn, ROP_Dn, ROP_Dn, ROP_DPx }, /* GXinvert */
{ ROP_SDno, ROP_DPSanan, ROP_PDno, ROP_DPSanan }, /* GXorReverse */
{ ROP_Sn, ROP_PSDPxox, ROP_Pn, ROP_SPDSxox }, /* GXcopyInverted */
{ ROP_DSno, ROP_DPSnao, ROP_DPno, ROP_DSPnao }, /* GXorInverted */
{ ROP_DSan, ROP_DSPnoan, ROP_DPan, ROP_DPSnoan }, /* GXnand */
{ ROP_1, ROP_1, ROP_1, ROP_DPo } /* GXset */
};
#define VIAACCELCOPYROP(vRop) (VIAROP[vRop].copy << 24)
#define VIAACCELPATTERNROP(vRop) (VIAROP[vRop].pattern << 24)

View File

@ -335,6 +335,7 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
HWDiff->HQVCmeRegs = hqv_cme_regs;
break;
case VIA_VX855:
case VIA_VX900:
HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
HWDiff->dwSupportTwoColorKey = VID_HWDIFF_TRUE;
@ -889,6 +890,7 @@ viaCalculateVideoColor(VIAPtr pVia, int hue, int saturation,
case PCI_CHIP_VT3327:
case PCI_CHIP_VT3353:
case PCI_CHIP_VT3409:
case PCI_CHIP_VT3410:
model = 0;
break;
case PCI_CHIP_CLE3122:
@ -1028,6 +1030,7 @@ viaSetColorSpace(VIAPtr pVia, int hue, int saturation, int brightness,
case PCI_CHIP_VT3364:
case PCI_CHIP_VT3353:
case PCI_CHIP_VT3409:
case PCI_CHIP_VT3410:
case PCI_CHIP_CLE3122:
VIDOutD(V1_ColorSpaceReg_2, col2);
VIDOutD(V1_ColorSpaceReg_1, col1);
@ -1058,6 +1061,7 @@ ViaInitVideoStatusFlag(VIAPtr pVia)
case PCI_CHIP_VT3364:
case PCI_CHIP_VT3353:
case PCI_CHIP_VT3409:
case PCI_CHIP_VT3410:
return (VIDEO_HQV_INUSE | SW_USE_HQV | VIDEO_1_INUSE
| VIDEO_ACTIVE | VIDEO_SHOW);
case PCI_CHIP_CLE3122:
@ -1098,6 +1102,7 @@ ViaSetVidCtl(VIAPtr pVia, unsigned int videoFlag)
case PCI_CHIP_VT3353:
return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3336;
case PCI_CHIP_VT3409:
case PCI_CHIP_VT3410:
return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3409;
case PCI_CHIP_CLE3122:
if (CLE266_REV_IS_CX(pVia->ChipRev))
@ -1388,6 +1393,7 @@ SetFIFO_V3(VIAPtr pVia, CARD8 depth, CARD8 prethreshold, CARD8 threshold)
case PCI_CHIP_VT3327:
case PCI_CHIP_VT3353:
case PCI_CHIP_VT3409:
case PCI_CHIP_VT3410:
SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL,
(VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK)
| ((depth - 1) & 0xff) | ((threshold & 0xff) << 8));
@ -1453,6 +1459,7 @@ SetFIFO_V3_64or32or32(VIAPtr pVia)
case PCI_CHIP_VT3364:
case PCI_CHIP_VT3353:
case PCI_CHIP_VT3409:
case PCI_CHIP_VT3410:
SetFIFO_V3(pVia, 225, 200, 250);
break;
case PCI_CHIP_VT3204:
@ -1486,6 +1493,7 @@ SetFIFO_V3_64or32or16(VIAPtr pVia)
case PCI_CHIP_VT3364:
case PCI_CHIP_VT3353:
case PCI_CHIP_VT3409:
case PCI_CHIP_VT3410:
SetFIFO_V3(pVia, 225, 200, 250);
break;
case PCI_CHIP_VT3204:
@ -1670,7 +1678,7 @@ SetHQVFetch(VIAPtr pVia, CARD32 srcFetch, unsigned long srcHeight)
srcFetch >>= 3; /* fetch unit is 8 bytes */
}
if (pVia->ChipId != PCI_CHIP_VT3409)
if ((pVia->ChipId != PCI_CHIP_VT3409) && (pVia->ChipId != PCI_CHIP_VT3410))
SaveVideoRegister(pVia, HQV_SRC_FETCH_LINE + proReg,
((srcFetch - 1) << 16) | (srcHeight - 1));
}
@ -1877,9 +1885,9 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
*/
if ((pVia->VideoEngine == VIDEO_ENGINE_CME
|| pVia->Chipset == VIA_VM800)
&& pVia->pBIOSInfo->Panel->IsActive) {
&& (pBIOSInfo->SecondCRTC->IsActive==TRUE)) {
/* V1_ON_SND_DISPLAY */
/* VAL_VIDEO_ON_SND_DISPLAY */
vidCtl |= V1_ON_SND_DISPLAY;
/* SECOND_DISPLAY_COLOR_KEY_ENABLE */
compose |= SECOND_DISPLAY_COLOR_KEY_ENABLE | 0x1;
@ -2142,10 +2150,13 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL1),0);
SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL3),((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) {
if ((pVia->Chipset == VIA_VX800) ||
(pVia->Chipset == VIA_VX855) ||
(pVia->Chipset == VIA_VX900)) {
SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL2),0);
SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL4),((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
if (pVia->Chipset == VIA_VX855) {
if ((pVia->Chipset == VIA_VX855) ||
(pVia->Chipset == VIA_VX900)) {
SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL1,0);
SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL3,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL2,0);
@ -2156,8 +2167,17 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
SaveVideoRegister(pVia, HQV_SUBP_HSCALE_CTRL,0);
/*0x3e8*/
SaveVideoRegister(pVia, HQV_SUBP_VSCALE_CTRL,0);
SaveVideoRegister(pVia, HQV_DEFAULT_VIDEO_COLOR, HQV_FIX_COLOR);
}
if (pVia->Chipset == VIA_VX900) {
SaveVideoRegister(pVia, HQV_SHARPNESS_DECODER_HANDSHAKE_CTRL_410, 0);
}
// TODO Need to be tested on VX800
/* 0x3B8 */
SaveVideoRegister(pVia, HQV_DEFAULT_VIDEO_COLOR, HQV_FIX_COLOR);
}
}

View File

@ -287,6 +287,7 @@ DecideOverlaySupport(ScrnInfoPtr pScrn)
pVia->ChipId != PCI_CHIP_VT3327 &&
pVia->ChipId != PCI_CHIP_VT3336 &&
pVia->ChipId != PCI_CHIP_VT3409 &&
pVia->ChipId != PCI_CHIP_VT3410 &&
pVia->ChipId != PCI_CHIP_VT3364 &&
pVia->ChipId != PCI_CHIP_VT3324 &&
pVia->ChipId != PCI_CHIP_VT3353) {
@ -660,6 +661,7 @@ viaInitVideo(ScreenPtr pScreen)
(pVia->Chipset == VIA_CX700) ||
(pVia->Chipset == VIA_VX800) ||
(pVia->Chipset == VIA_VX855) ||
(pVia->Chipset == VIA_VX900) ||
(pVia->Chipset == VIA_P4M890));
if ((pVia->drmVerMajor < 2) ||
((pVia->drmVerMajor == 2) && (pVia->drmVerMinor < 9)))
@ -679,7 +681,7 @@ viaInitVideo(ScreenPtr pScreen)
(pVia->Chipset == VIA_VM800) || (pVia->Chipset == VIA_K8M890) ||
(pVia->Chipset == VIA_P4M900) || (pVia->Chipset == VIA_CX700) ||
(pVia->Chipset == VIA_P4M890) || (pVia->Chipset == VIA_VX800) ||
(pVia->Chipset == VIA_VX855)) {
(pVia->Chipset == VIA_VX855) || (pVia->Chipset == VIA_VX900)) {
num_new = viaSetupAdaptors(pScreen, &newAdaptors);
num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
} else {
@ -1284,7 +1286,7 @@ viaPutImage(ScrnInfoPtr pScrn,
switch (id) {
case FOURCC_I420:
if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
planar420cp(pVia->swov.SWDevice.
nv12cp(pVia->swov.SWDevice.
lpSWOverlaySurface[pVia->dwFrameNum & 1],
buf, dstPitch, width, height, 1);
} else {