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Import Mesa 18.3.5

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jsg 2019-03-19 09:37:42 +00:00
parent 9dc825e6c1
commit 34c49fbb2f
30 changed files with 493 additions and 88 deletions
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3
lib/mesa/docs/relnotes/18.3.4.html
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@ -31,7 +31,8 @@ Compatibility contexts may report a lower version depending on each driver.
<h2>SHA256 checksums</h2> <h2>SHA256 checksums</h2>
<pre> <pre>
TBD e22e6fe4c3aca80fe872a0a7285b6c5523e0cfc0bfb57ffcc3b3d66d292593e4 mesa-18.3.4.tar.gz
32314da4365d37f80d84f599bd9625b00161c273c39600ba63b45002d500bb07 mesa-18.3.4.tar.xz
</pre> </pre>

270
lib/mesa/docs/relnotes/18.3.5.html Normal file
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@ -0,0 +1,270 @@
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.3.5 Release Notes / March 18, 2019</h1>
<p>
Mesa 18.3.5 is a bug fix release which fixes bugs found since the 18.3.4 release.
</p>
<p>
Mesa 18.3.5 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
TBD
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104297">Bug 104297</a> - [i965] Downward causes GPU hangs and misrendering on Haswell</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=104602">Bug 104602</a> - [apitrace] Graphical artifacts in Civilization VI on RX Vega</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107052">Bug 107052</a> - [Regression][bisected]. Crookz - The Big Heist Demo can't be launched despite the &quot;true&quot; flag in &quot;drirc&quot;</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107563">Bug 107563</a> - [RADV] Broken rendering in Unity demos</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108457">Bug 108457</a> - [OpenGL CTS] KHR-GL46.tessellation_shader.single.xfb_captures_data_from_correct_stage fails</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108999">Bug 108999</a> - Calculating the scissors fields when the y is flipped (0 on top) can generate negative numbers that will cause assertion failure later on.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109328">Bug 109328</a> - [BSW BXT GLK] dEQP-VK.subgroups.arithmetic.subgroup regressions</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109443">Bug 109443</a> - Build failure with MSVC when using Scons &gt;= 3.0.2</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109451">Bug 109451</a> - [IVB,SNB] LINE_STRIPs following a TRIANGLE_FAN fail to use primitive restart</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109594">Bug 109594</a> - totem assert failure: totem: src/intel/genxml/gen9_pack.h:72: __gen_uint: La declaración `v &lt;= max' no se cumple.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109597">Bug 109597</a> - wreckfest issues with transparent objects &amp; skybox</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109601">Bug 109601</a> - [Regression] RuneLite GPU rendering broken on 18.3.x</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109698">Bug 109698</a> - dri.pc contents invalid when built with meson</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109735">Bug 109735</a> - [Regression] broken font with mesa_vulkan_overlay</li>
</ul>
<h2>Changes</h2>
<p>Alok Hota (1):</p>
<ul>
<li>swr/rast: bypass size limit for non-sampled textures</li>
</ul>
<p>Andrii Simiklit (1):</p>
<ul>
<li>i965: re-emit index buffer state on a reset option change.</li>
</ul>
<p>Axel Davy (2):</p>
<ul>
<li>st/nine: Ignore window size if error</li>
<li>st/nine: Ignore multisample quality level if no ms</li>
</ul>
<p>Bas Nieuwenhuizen (4):</p>
<ul>
<li>radv: Sync ETC2 whitelisted devices.</li>
<li>radv: Fix float16 interpolation set up.</li>
<li>radv: Allow interpolation on non-float types.</li>
<li>radv: Interpolate less aggressively.</li>
</ul>
<p>Carlos Garnacho (1):</p>
<ul>
<li>wayland/egl: Ensure EGL surface is resized on DRI update_buffers()</li>
</ul>
<p>Danylo Piliaiev (1):</p>
<ul>
<li>glsl/linker: Fix unmatched TCS outputs being reduced to local variable</li>
</ul>
<p>David Shao (1):</p>
<ul>
<li>meson: ensure that xmlpool_options.h is generated for gallium targets that need it</li>
</ul>
<p>Eleni Maria Stea (1):</p>
<ul>
<li>i965: fixed clamping in set_scissor_bits when the y is flipped</li>
</ul>
<p>Emil Velikov (7):</p>
<ul>
<li>docs: add sha256 checksums for 18.3.4</li>
<li>meson: egl: correctly manage loader/xmlconfig</li>
<li>cherry-ignore: add 19.0 only anv/push buffer nominations</li>
<li>cherry-ignore: add gitlab-ci fixup commit</li>
<li>cherry-ignore: ignore glsl_types memory cleanup patch</li>
<li>cherry-ignore: add explicit 19.0 performance optimisations</li>
<li>Update version to 18.3.5</li>
</ul>
<p>Eric Engestrom (1):</p>
<ul>
<li>egl: fix libdrm-less builds</li>
</ul>
<p>Francisco Jerez (1):</p>
<ul>
<li>intel/fs: Implement extended strides greater than 4 for IR source regions.</li>
</ul>
<p>Ian Romanick (2):</p>
<ul>
<li>intel/fs: nir_op_extract_i8 extracts a byte, not a word</li>
<li>intel/fs: Fix extract_u8 of an odd byte from a 64-bit integer</li>
</ul>
<p>Ilia Mirkin (1):</p>
<ul>
<li>glsl: fix recording of variables for XFB in TCS shaders</li>
</ul>
<p>Jason Ekstrand (10):</p>
<ul>
<li>intel/fs: Bail in optimize_extract_to_float if we have modifiers</li>
<li>compiler/types: Add a contains_64bit helper</li>
<li>nir/xfb: Properly align 64-bit values</li>
<li>nir/xfb: Work in terms of components rather than slots</li>
<li>nir/xfb: Handle compact arrays in gather_xfb_info</li>
<li>anv: Count surfaces for non-YCbCr images in GetDescriptorSetLayoutSupport</li>
<li>spirv: OpImageQueryLod requires a sampler</li>
<li>spirv: Pull offset/stride from the pointer for OpArrayLength</li>
<li>glsl/list: Add a list variant of insert_after</li>
<li>glsl/lower_vector_derefs: Don't use a temporary for TCS outputs</li>
</ul>
<p>Jose Maria Casanova Crespo (1):</p>
<ul>
<li>glsl: TCS outputs can not be transform feedback candidates on GLES</li>
</ul>
<p>José Fonseca (1):</p>
<ul>
<li>scons: Workaround failures with MSVC when using SCons 3.0.[2-4].</li>
</ul>
<p>Juan A. Suarez Romero (3):</p>
<ul>
<li>genxml: add missing field values for 3DSTATE_SF</li>
<li>anv: advertise 8 subpixel precision bits</li>
<li>anv: destroy descriptor sets when pool gets reset</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>intel/fs: Fix opt_peephole_csel to not throw away saturates.</li>
</ul>
<p>Kevin Strasser (1):</p>
<ul>
<li>egl/dri: Avoid out of bounds array access</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>intel: fix urb size for CFL GT1</li>
</ul>
<p>Marek Olšák (5):</p>
<ul>
<li>radeonsi: add driconf option radeonsi_enable_nir</li>
<li>radeonsi: always enable NIR for Civilization 6 to fix corruption</li>
<li>driconf: add Civ6Sub executable for Civilization 6</li>
<li>tgsi: don't set tgsi_info::uses_bindless_images for constbufs and hw atomics</li>
<li>radeonsi: compile clear and copy buffer compute shaders on demand</li>
</ul>
<p>Mauro Rossi (2):</p>
<ul>
<li>android: anv: fix generated files depedencies (v2)</li>
<li>android: anv: fix libexpat shared dependency</li>
</ul>
<p>Ray Zhang (1):</p>
<ul>
<li>glx: fix shared memory leak in X11</li>
</ul>
<p>Rhys Perry (2):</p>
<ul>
<li>radv: bitcast 16-bit outputs to integers</li>
<li>radv: ensure export arguments are always float</li>
</ul>
<p>Samuel Pitoiset (8):</p>
<ul>
<li>radv: write the alpha channel of MRT0 when alpha coverage is enabled</li>
<li>radv: fix writing the alpha channel of MRT0 when alpha coverage is enabled</li>
<li>radv: fix clearing attachments in secondary command buffers</li>
<li>radv: fix out-of-bounds access when copying descriptors BO list</li>
<li>radv: don't copy buffer descriptors list for samplers</li>
<li>radv: properly align the fence and EOP bug VA on GFX9</li>
<li>radv: fix pointSizeRange limits</li>
<li>radv: always initialize HTILE when the src layout is UNDEFINED</li>
</ul>
<p>Sergii Romantsov (2):</p>
<ul>
<li>dri: meson: do not prefix user provided dri-drivers-path</li>
<li>d3d: meson: do not prefix user provided d3d-drivers-path</li>
</ul>
<p>Tapani Pälli (3):</p>
<ul>
<li>nir: initialize value in copy_prop_vars_block</li>
<li>anv: retain the is_array state in create_plane_tex_instr_implicit</li>
<li>anv: destroy descriptor sets when pool gets destroyed</li>
</ul>
<p>Timothy Arceri (1):</p>
<ul>
<li>glsl: fix shader cache for packed param list</li>
</ul>
<p>Yevhenii Kolesnikov (1):</p>
<ul>
<li>i965: Fix allow_higher_compat_version workaround limited by OpenGL 3.0</li>
</ul>
<p>pal1000 (1):</p>
<ul>
<li>scons: Compatibility with Scons development version string</li>
</ul>
</div>
</body>
</html>

6
lib/mesa/meson.build
View File

@ -64,11 +64,11 @@ endif
dri_drivers_path = get_option('dri-drivers-path') dri_drivers_path = get_option('dri-drivers-path')
if dri_drivers_path == '' if dri_drivers_path == ''
dri_drivers_path = join_paths(get_option('libdir'), 'dri') dri_drivers_path = join_paths(get_option('prefix'), get_option('libdir'), 'dri')
endif endif
dri_search_path = get_option('dri-search-path') dri_search_path = get_option('dri-search-path')
if dri_search_path == '' if dri_search_path == ''
dri_search_path = join_paths(get_option('prefix'), dri_drivers_path) dri_search_path = dri_drivers_path
endif endif
with_gles1 = get_option('gles1') with_gles1 = get_option('gles1')
@ -615,7 +615,7 @@ with_gallium_xa = _xa != 'false'
d3d_drivers_path = get_option('d3d-drivers-path') d3d_drivers_path = get_option('d3d-drivers-path')
if d3d_drivers_path == '' if d3d_drivers_path == ''
d3d_drivers_path = join_paths(get_option('libdir'), 'd3d') d3d_drivers_path = join_paths(get_option('prefix'), get_option('libdir'), 'd3d')
endif endif
with_gallium_st_nine = get_option('gallium-nine') with_gallium_st_nine = get_option('gallium-nine')

63
lib/mesa/src/amd/vulkan/radv_nir_to_llvm.c
View File

@ -94,6 +94,7 @@ struct radv_shader_context {
gl_shader_stage stage; gl_shader_stage stage;
LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4]; LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
uint64_t float16_shaded_mask;
uint64_t input_mask; uint64_t input_mask;
uint64_t output_mask; uint64_t output_mask;
@ -2097,6 +2098,7 @@ static void interp_fs_input(struct radv_shader_context *ctx,
unsigned attr, unsigned attr,
LLVMValueRef interp_param, LLVMValueRef interp_param,
LLVMValueRef prim_mask, LLVMValueRef prim_mask,
bool float16,
LLVMValueRef result[4]) LLVMValueRef result[4])
{ {
LLVMValueRef attr_number; LLVMValueRef attr_number;
@ -2129,7 +2131,12 @@ static void interp_fs_input(struct radv_shader_context *ctx,
for (chan = 0; chan < 4; chan++) { for (chan = 0; chan < 4; chan++) {
LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false); LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
if (interp) { if (interp && float16) {
result[chan] = ac_build_fs_interp_f16(&ctx->ac,
llvm_chan,
attr_number,
prim_mask, i, j);
} else if (interp) {
result[chan] = ac_build_fs_interp(&ctx->ac, result[chan] = ac_build_fs_interp(&ctx->ac,
llvm_chan, llvm_chan,
attr_number, attr_number,
@ -2141,7 +2148,30 @@ static void interp_fs_input(struct radv_shader_context *ctx,
attr_number, attr_number,
prim_mask); prim_mask);
result[chan] = LLVMBuildBitCast(ctx->ac.builder, result[chan], ctx->ac.i32, ""); result[chan] = LLVMBuildBitCast(ctx->ac.builder, result[chan], ctx->ac.i32, "");
result[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, result[chan], LLVMTypeOf(interp_param), ""); result[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, result[chan], float16 ? ctx->ac.i16 : ctx->ac.i32, "");
}
}
}
static void mark_16bit_fs_input(struct radv_shader_context *ctx,
const struct glsl_type *type,
int location)
{
if (glsl_type_is_scalar(type) || glsl_type_is_vector(type) || glsl_type_is_matrix(type)) {
unsigned attrib_count = glsl_count_attribute_slots(type, false);
if (glsl_type_is_16bit(type)) {
ctx->float16_shaded_mask |= ((1ull << attrib_count) - 1) << location;
}
} else if (glsl_type_is_array(type)) {
unsigned stride = glsl_count_attribute_slots(glsl_get_array_element(type), false);
for (unsigned i = 0; i < glsl_get_length(type); ++i) {
mark_16bit_fs_input(ctx, glsl_get_array_element(type), location + i * stride);
}
} else {
assert(glsl_type_is_struct(type));
for (unsigned i = 0; i < glsl_get_length(type); i++) {
mark_16bit_fs_input(ctx, glsl_get_struct_field(type, i), location);
location += glsl_count_attribute_slots(glsl_get_struct_field(type, i), false);
} }
} }
} }
@ -2156,9 +2186,15 @@ handle_fs_input_decl(struct radv_shader_context *ctx,
uint64_t mask; uint64_t mask;
variable->data.driver_location = idx * 4; variable->data.driver_location = idx * 4;
if (!variable->data.compact)
mark_16bit_fs_input(ctx, variable->type, idx);
mask = ((1ull << attrib_count) - 1) << variable->data.location; mask = ((1ull << attrib_count) - 1) << variable->data.location;
if (glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_FLOAT) { if (glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_FLOAT ||
glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_FLOAT16 ||
glsl_get_base_type(glsl_without_array(variable->type)) == GLSL_TYPE_STRUCT) {
unsigned interp_type; unsigned interp_type;
if (variable->data.sample) if (variable->data.sample)
interp_type = INTERP_SAMPLE; interp_type = INTERP_SAMPLE;
@ -2169,10 +2205,8 @@ handle_fs_input_decl(struct radv_shader_context *ctx,
interp = lookup_interp_param(&ctx->abi, variable->data.interpolation, interp_type); interp = lookup_interp_param(&ctx->abi, variable->data.interpolation, interp_type);
} }
bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
LLVMTypeRef type = is_16bit ? ctx->ac.i16 : ctx->ac.i32;
if (interp == NULL) if (interp == NULL)
interp = LLVMGetUndef(type); interp = LLVMGetUndef(ctx->ac.i32);
for (unsigned i = 0; i < attrib_count; ++i) for (unsigned i = 0; i < attrib_count; ++i)
ctx->inputs[ac_llvm_reg_index_soa(idx + i, 0)] = interp; ctx->inputs[ac_llvm_reg_index_soa(idx + i, 0)] = interp;
@ -2246,11 +2280,14 @@ handle_fs_inputs(struct radv_shader_context *ctx,
if (i >= VARYING_SLOT_VAR0 || i == VARYING_SLOT_PNTC || if (i >= VARYING_SLOT_VAR0 || i == VARYING_SLOT_PNTC ||
i == VARYING_SLOT_PRIMITIVE_ID || i == VARYING_SLOT_LAYER) { i == VARYING_SLOT_PRIMITIVE_ID || i == VARYING_SLOT_LAYER) {
interp_param = *inputs; interp_param = *inputs;
interp_fs_input(ctx, index, interp_param, ctx->abi.prim_mask, bool float16 = (ctx->float16_shaded_mask >> i) & 1;
interp_fs_input(ctx, index, interp_param, ctx->abi.prim_mask, float16,
inputs); inputs);
if (LLVMIsUndef(interp_param)) if (LLVMIsUndef(interp_param))
ctx->shader_info->fs.flat_shaded_mask |= 1u << index; ctx->shader_info->fs.flat_shaded_mask |= 1u << index;
if (float16)
ctx->shader_info->fs.float16_shaded_mask |= 1u << index;
if (i >= VARYING_SLOT_VAR0) if (i >= VARYING_SLOT_VAR0)
ctx->abi.fs_input_attr_indices[i - VARYING_SLOT_VAR0] = index; ctx->abi.fs_input_attr_indices[i - VARYING_SLOT_VAR0] = index;
++index; ++index;
@ -2262,7 +2299,7 @@ handle_fs_inputs(struct radv_shader_context *ctx,
interp_param = *inputs; interp_param = *inputs;
interp_fs_input(ctx, index, interp_param, interp_fs_input(ctx, index, interp_param,
ctx->abi.prim_mask, inputs); ctx->abi.prim_mask, false, inputs);
++index; ++index;
} }
} else if (i == VARYING_SLOT_POS) { } else if (i == VARYING_SLOT_POS) {
@ -2411,7 +2448,7 @@ si_llvm_init_export_args(struct radv_shader_context *ctx,
if (is_16bit) { if (is_16bit) {
for (unsigned chan = 0; chan < 4; chan++) for (unsigned chan = 0; chan < 4; chan++)
values[chan] = LLVMBuildZExt(ctx->ac.builder, values[chan] = LLVMBuildZExt(ctx->ac.builder,
values[chan], ac_to_integer(&ctx->ac, values[chan]),
ctx->ac.i32, ""); ctx->ac.i32, "");
} }
break; break;
@ -2422,7 +2459,7 @@ si_llvm_init_export_args(struct radv_shader_context *ctx,
if (is_16bit) { if (is_16bit) {
for (unsigned chan = 0; chan < 4; chan++) for (unsigned chan = 0; chan < 4; chan++)
values[chan] = LLVMBuildSExt(ctx->ac.builder, values[chan] = LLVMBuildSExt(ctx->ac.builder,
values[chan], ac_to_integer(&ctx->ac, values[chan]),
ctx->ac.i32, ""); ctx->ac.i32, "");
} }
break; break;
@ -2475,12 +2512,8 @@ si_llvm_init_export_args(struct radv_shader_context *ctx,
} else } else
memcpy(&args->out[0], values, sizeof(values[0]) * 4); memcpy(&args->out[0], values, sizeof(values[0]) * 4);
for (unsigned i = 0; i < 4; ++i) { for (unsigned i = 0; i < 4; ++i)
if (!(args->enabled_channels & (1 << i)))
continue;
args->out[i] = ac_to_float(&ctx->ac, args->out[i]); args->out[i] = ac_to_float(&ctx->ac, args->out[i]);
}
} }
static void static void

1
lib/mesa/src/amd/vulkan/radv_shader.h
View File

@ -258,6 +258,7 @@ struct radv_shader_variant_info {
unsigned num_interp; unsigned num_interp;
uint32_t input_mask; uint32_t input_mask;
uint32_t flat_shaded_mask; uint32_t flat_shaded_mask;
uint32_t float16_shaded_mask;
bool can_discard; bool can_discard;
bool early_fragment_test; bool early_fragment_test;
} fs; } fs;

5
lib/mesa/src/compiler/glsl/glcpp/glcpp-parse.h
View File

@ -1,4 +1,4 @@
/* A Bison parser, made by GNU Bison 3.1. */ /* A Bison parser, made by GNU Bison 3.2. */
/* Bison interface for Yacc-like parsers in C /* Bison interface for Yacc-like parsers in C
@ -30,6 +30,9 @@
This special exception was added by the Free Software Foundation in This special exception was added by the Free Software Foundation in
version 2.2 of Bison. */ version 2.2 of Bison. */
/* Undocumented macros, especially those whose name start with YY_,
are private implementation details. Do not rely on them. */
#ifndef YY_GLCPP_PARSER_GLSL_GLCPP_GLCPP_PARSE_H_INCLUDED #ifndef YY_GLCPP_PARSER_GLSL_GLCPP_GLCPP_PARSE_H_INCLUDED
# define YY_GLCPP_PARSER_GLSL_GLCPP_GLCPP_PARSE_H_INCLUDED # define YY_GLCPP_PARSER_GLSL_GLCPP_GLCPP_PARSE_H_INCLUDED
/* Debug traces. */ /* Debug traces. */

74
lib/mesa/src/compiler/glsl/lower_vector_derefs.cpp
View File

@ -32,8 +32,9 @@ namespace {
class vector_deref_visitor : public ir_rvalue_enter_visitor { class vector_deref_visitor : public ir_rvalue_enter_visitor {
public: public:
vector_deref_visitor() vector_deref_visitor(void *mem_ctx, gl_shader_stage shader_stage)
: progress(false) : progress(false), shader_stage(shader_stage),
factory(&factory_instructions, mem_ctx)
{ {
} }
@ -45,6 +46,9 @@ public:
virtual ir_visitor_status visit_enter(ir_assignment *ir); virtual ir_visitor_status visit_enter(ir_assignment *ir);
bool progress; bool progress;
gl_shader_stage shader_stage;
exec_list factory_instructions;
ir_factory factory;
}; };
} /* anonymous namespace */ } /* anonymous namespace */
@ -65,13 +69,63 @@ vector_deref_visitor::visit_enter(ir_assignment *ir)
ir_constant *old_index_constant = ir_constant *old_index_constant =
deref->array_index->constant_expression_value(mem_ctx); deref->array_index->constant_expression_value(mem_ctx);
if (!old_index_constant) { if (!old_index_constant) {
ir->rhs = new(mem_ctx) ir_expression(ir_triop_vector_insert, if (shader_stage == MESA_SHADER_TESS_CTRL &&
new_lhs->type, deref->variable_referenced()->data.mode == ir_var_shader_out) {
new_lhs->clone(mem_ctx, NULL), /* Tessellation control shader outputs act as if they have memory
ir->rhs, * backing them and if we have writes from multiple threads
deref->array_index); * targeting the same vec4 (this can happen for patch outputs), the
ir->write_mask = (1 << new_lhs->type->vector_elements) - 1; * load-vec-store pattern of ir_triop_vector_insert doesn't work.
ir->set_lhs(new_lhs); * Instead, we have to lower to a series of conditional write-masked
* assignments.
*/
ir_variable *const src_temp =
factory.make_temp(ir->rhs->type, "scalar_tmp");
/* The newly created variable declaration goes before the assignment
* because we're going to set it as the new LHS.
*/
ir->insert_before(factory.instructions);
ir->set_lhs(new(mem_ctx) ir_dereference_variable(src_temp));
ir_variable *const arr_index =
factory.make_temp(deref->array_index->type, "index_tmp");
factory.emit(assign(arr_index, deref->array_index));
for (unsigned i = 0; i < new_lhs->type->vector_elements; i++) {
ir_constant *const cmp_index =
ir_constant::zero(factory.mem_ctx, deref->array_index->type);
cmp_index->value.u[0] = i;
ir_rvalue *const lhs_clone = new_lhs->clone(factory.mem_ctx, NULL);
ir_dereference_variable *const src_temp_deref =
new(mem_ctx) ir_dereference_variable(src_temp);
if (new_lhs->ir_type != ir_type_swizzle) {
assert(lhs_clone->as_dereference());
ir_assignment *cond_assign =
new(mem_ctx) ir_assignment(lhs_clone->as_dereference(),
src_temp_deref,
equal(arr_index, cmp_index),
WRITEMASK_X << i);
factory.emit(cond_assign);
} else {
ir_assignment *cond_assign =
new(mem_ctx) ir_assignment(swizzle(lhs_clone, i, 1),
src_temp_deref,
equal(arr_index, cmp_index));
factory.emit(cond_assign);
}
}
ir->insert_after(factory.instructions);
} else {
ir->rhs = new(mem_ctx) ir_expression(ir_triop_vector_insert,
new_lhs->type,
new_lhs->clone(mem_ctx, NULL),
ir->rhs,
deref->array_index);
ir->write_mask = (1 << new_lhs->type->vector_elements) - 1;
ir->set_lhs(new_lhs);
}
} else if (new_lhs->ir_type != ir_type_swizzle) { } else if (new_lhs->ir_type != ir_type_swizzle) {
ir->set_lhs(new_lhs); ir->set_lhs(new_lhs);
ir->write_mask = 1 << old_index_constant->get_uint_component(0); ir->write_mask = 1 << old_index_constant->get_uint_component(0);
@ -105,7 +159,7 @@ vector_deref_visitor::handle_rvalue(ir_rvalue **rv)
bool bool
lower_vector_derefs(gl_linked_shader *shader) lower_vector_derefs(gl_linked_shader *shader)
{ {
vector_deref_visitor v; vector_deref_visitor v(shader->ir, shader->Stage);
visit_list_elements(&v, shader->ir); visit_list_elements(&v, shader->ir);

15
lib/mesa/src/compiler/glsl/serialize.cpp
View File

@ -996,15 +996,14 @@ write_shader_parameters(struct blob *metadata,
struct gl_program_parameter_list *params) struct gl_program_parameter_list *params)
{ {
blob_write_uint32(metadata, params->NumParameters); blob_write_uint32(metadata, params->NumParameters);
blob_write_uint32(metadata, params->NumParameterValues);
uint32_t i = 0; uint32_t i = 0;
while (i < params->NumParameters) { while (i < params->NumParameters) {
struct gl_program_parameter *param = &params->Parameters[i]; struct gl_program_parameter *param = &params->Parameters[i];
blob_write_uint32(metadata, param->Type); blob_write_uint32(metadata, param->Type);
blob_write_string(metadata, param->Name); blob_write_string(metadata, param->Name);
blob_write_uint32(metadata, param->Size); blob_write_uint32(metadata, param->Size);
blob_write_uint32(metadata, param->Padded);
blob_write_uint32(metadata, param->DataType); blob_write_uint32(metadata, param->DataType);
blob_write_bytes(metadata, param->StateIndexes, blob_write_bytes(metadata, param->StateIndexes,
sizeof(param->StateIndexes)); sizeof(param->StateIndexes));
@ -1015,9 +1014,6 @@ write_shader_parameters(struct blob *metadata,
blob_write_bytes(metadata, params->ParameterValues, blob_write_bytes(metadata, params->ParameterValues,
sizeof(gl_constant_value) * params->NumParameterValues); sizeof(gl_constant_value) * params->NumParameterValues);
blob_write_bytes(metadata, params->ParameterValueOffset,
sizeof(uint32_t) * params->NumParameters);
blob_write_uint32(metadata, params->StateFlags); blob_write_uint32(metadata, params->StateFlags);
} }
@ -1028,28 +1024,25 @@ read_shader_parameters(struct blob_reader *metadata,
gl_state_index16 state_indexes[STATE_LENGTH]; gl_state_index16 state_indexes[STATE_LENGTH];
uint32_t i = 0; uint32_t i = 0;
uint32_t num_parameters = blob_read_uint32(metadata); uint32_t num_parameters = blob_read_uint32(metadata);
uint32_t num_parameters_values = blob_read_uint32(metadata);
_mesa_reserve_parameter_storage(params, num_parameters); _mesa_reserve_parameter_storage(params, num_parameters);
while (i < num_parameters) { while (i < num_parameters) {
gl_register_file type = (gl_register_file) blob_read_uint32(metadata); gl_register_file type = (gl_register_file) blob_read_uint32(metadata);
const char *name = blob_read_string(metadata); const char *name = blob_read_string(metadata);
unsigned size = blob_read_uint32(metadata); unsigned size = blob_read_uint32(metadata);
bool padded = blob_read_uint32(metadata);
unsigned data_type = blob_read_uint32(metadata); unsigned data_type = blob_read_uint32(metadata);
blob_copy_bytes(metadata, (uint8_t *) state_indexes, blob_copy_bytes(metadata, (uint8_t *) state_indexes,
sizeof(state_indexes)); sizeof(state_indexes));
_mesa_add_parameter(params, type, name, size, data_type, _mesa_add_parameter(params, type, name, size, data_type,
NULL, state_indexes, false); NULL, state_indexes, padded);
i++; i++;
} }
blob_copy_bytes(metadata, (uint8_t *) params->ParameterValues, blob_copy_bytes(metadata, (uint8_t *) params->ParameterValues,
sizeof(gl_constant_value) * num_parameters_values); sizeof(gl_constant_value) * params->NumParameterValues);
blob_copy_bytes(metadata, (uint8_t *) params->ParameterValueOffset,
sizeof(uint32_t) * num_parameters);
params->StateFlags = blob_read_uint32(metadata); params->StateFlags = blob_read_uint32(metadata);
} }

45
lib/mesa/src/compiler/nir/nir_gather_xfb_info.c
View File

@ -32,7 +32,11 @@ add_var_xfb_outputs(nir_xfb_info *xfb,
unsigned *offset, unsigned *offset,
const struct glsl_type *type) const struct glsl_type *type)
{ {
if (glsl_type_is_array(type) || glsl_type_is_matrix(type)) { /* If this type contains a 64-bit value, align to 8 bytes */
if (glsl_type_contains_64bit(type))
*offset = ALIGN_POT(*offset, 8);
if (glsl_type_is_array_or_matrix(type) && !var->data.compact) {
unsigned length = glsl_get_length(type); unsigned length = glsl_get_length(type);
const struct glsl_type *child_type = glsl_get_array_element(type); const struct glsl_type *child_type = glsl_get_array_element(type);
for (unsigned i = 0; i < length; i++) for (unsigned i = 0; i < length; i++)
@ -57,32 +61,43 @@ add_var_xfb_outputs(nir_xfb_info *xfb,
assert(var->data.stream < NIR_MAX_XFB_STREAMS); assert(var->data.stream < NIR_MAX_XFB_STREAMS);
xfb->streams_written |= (1 << var->data.stream); xfb->streams_written |= (1 << var->data.stream);
unsigned comp_slots = glsl_get_component_slots(type); unsigned comp_slots;
unsigned attrib_slots = DIV_ROUND_UP(comp_slots, 4); if (var->data.compact) {
assert(attrib_slots == glsl_count_attribute_slots(type, false)); /* This only happens for clip/cull which are float arrays */
assert(glsl_without_array(type) == glsl_float_type());
assert(var->data.location == VARYING_SLOT_CLIP_DIST0 ||
var->data.location == VARYING_SLOT_CLIP_DIST1);
comp_slots = glsl_get_length(type);
} else {
comp_slots = glsl_get_component_slots(type);
/* Ensure that we don't have, for instance, a dvec2 with a location_frac unsigned attrib_slots = DIV_ROUND_UP(comp_slots, 4);
* of 2 which would make it crass a location boundary even though it assert(attrib_slots == glsl_count_attribute_slots(type, false));
* fits in a single slot. However, you can have a dvec3 which crosses
* the slot boundary with a location_frac of 2. /* Ensure that we don't have, for instance, a dvec2 with a
*/ * location_frac of 2 which would make it crass a location boundary
assert(DIV_ROUND_UP(var->data.location_frac + comp_slots, 4) == attrib_slots); * even though it fits in a single slot. However, you can have a
* dvec3 which crosses the slot boundary with a location_frac of 2.
*/
assert(DIV_ROUND_UP(var->data.location_frac + comp_slots, 4) ==
attrib_slots);
}
assert(var->data.location_frac + comp_slots <= 8); assert(var->data.location_frac + comp_slots <= 8);
uint8_t comp_mask = ((1 << comp_slots) - 1) << var->data.location_frac; uint8_t comp_mask = ((1 << comp_slots) - 1) << var->data.location_frac;
assert(attrib_slots <= 2); while (comp_mask) {
for (unsigned s = 0; s < attrib_slots; s++) {
nir_xfb_output_info *output = &xfb->outputs[xfb->output_count++]; nir_xfb_output_info *output = &xfb->outputs[xfb->output_count++];
output->buffer = var->data.xfb_buffer; output->buffer = var->data.xfb_buffer;
output->offset = *offset + s * 16; output->offset = *offset;
output->location = *location; output->location = *location;
output->component_mask = (comp_mask >> (s * 4)) & 0xf; output->component_mask = comp_mask & 0xf;
*offset += util_bitcount(output->component_mask) * 4;
(*location)++; (*location)++;
comp_mask >>= 4;
} }
*offset += comp_slots * 4;
} }
} }

12
lib/mesa/src/egl/main/egldevice.c
View File

@ -202,18 +202,6 @@ _eglDeviceSupports(_EGLDevice *dev, _EGLDeviceExtension ext)
}; };
} }
/* Ideally we'll have an extension which passes the render node,
* instead of the card one + magic.
*
* Then we can move this in _eglQueryDeviceStringEXT below. Until then
* keep it separate.
*/
const char *
_eglGetDRMDeviceRenderNode(_EGLDevice *dev)
{
return dev->device->nodes[DRM_NODE_RENDER];
}
EGLBoolean EGLBoolean
_eglQueryDeviceAttribEXT(_EGLDevice *dev, EGLint attribute, _eglQueryDeviceAttribEXT(_EGLDevice *dev, EGLint attribute,
EGLAttrib *value) EGLAttrib *value)

3
lib/mesa/src/egl/main/egldevice.h
View File

@ -68,9 +68,6 @@ typedef enum _egl_device_extension _EGLDeviceExtension;
EGLBoolean EGLBoolean
_eglDeviceSupports(_EGLDevice *dev, _EGLDeviceExtension ext); _eglDeviceSupports(_EGLDevice *dev, _EGLDeviceExtension ext);
const char *
_eglGetDRMDeviceRenderNode(_EGLDevice *dev);
EGLBoolean EGLBoolean
_eglQueryDeviceAttribEXT(_EGLDevice *dev, EGLint attribute, _eglQueryDeviceAttribEXT(_EGLDevice *dev, EGLint attribute,
EGLAttrib *value); EGLAttrib *value);

11
lib/mesa/src/egl/meson.build
View File

@ -96,10 +96,11 @@ if with_dri2
c_args_for_egl += [ c_args_for_egl += [
'-DDEFAULT_DRIVER_DIR="@0@"'.format(dri_search_path), '-DDEFAULT_DRIVER_DIR="@0@"'.format(dri_search_path),
] ]
link_for_egl += [libloader, libxmlconfig]
incs_for_egl += inc_loader
if with_platform_x11 if with_platform_x11
files_egl += files('drivers/dri2/platform_x11.c') files_egl += files('drivers/dri2/platform_x11.c')
incs_for_egl += inc_loader
if with_dri3 if with_dri3
files_egl += files('drivers/dri2/platform_x11_dri3.c') files_egl += files('drivers/dri2/platform_x11_dri3.c')
link_for_egl += libloader_dri3_helper link_for_egl += libloader_dri3_helper
@ -108,13 +109,12 @@ if with_dri2
endif endif
if with_platform_drm if with_platform_drm
files_egl += files('drivers/dri2/platform_drm.c') files_egl += files('drivers/dri2/platform_drm.c')
link_for_egl += [libloader, libgbm, libxmlconfig] link_for_egl += libgbm
incs_for_egl += [inc_loader, inc_gbm, include_directories('../gbm/main')] incs_for_egl += [inc_gbm, include_directories('../gbm/main')]
deps_for_egl += dep_libdrm deps_for_egl += dep_libdrm
endif endif
if with_platform_surfaceless if with_platform_surfaceless
files_egl += files('drivers/dri2/platform_surfaceless.c') files_egl += files('drivers/dri2/platform_surfaceless.c')
incs_for_egl += [inc_loader]
endif endif
if with_platform_wayland if with_platform_wayland
deps_for_egl += [dep_wayland_client, dep_wayland_server, dep_wayland_egl_headers] deps_for_egl += [dep_wayland_client, dep_wayland_server, dep_wayland_egl_headers]
@ -130,7 +130,6 @@ if with_dri2
if with_platform_android if with_platform_android
deps_for_egl += dep_android deps_for_egl += dep_android
files_egl += files('drivers/dri2/platform_android.c') files_egl += files('drivers/dri2/platform_android.c')
incs_for_egl += [inc_loader]
endif endif
elif with_platform_haiku elif with_platform_haiku
incs_for_egl += inc_haikugl incs_for_egl += inc_haikugl
@ -169,7 +168,7 @@ libegl = shared_library(
'-D_EGL_NATIVE_PLATFORM=_EGL_PLATFORM_@0@'.format(egl_native_platform.to_upper()), '-D_EGL_NATIVE_PLATFORM=_EGL_PLATFORM_@0@'.format(egl_native_platform.to_upper()),
], ],
include_directories : incs_for_egl, include_directories : incs_for_egl,
link_with : [link_for_egl, libloader, libxmlconfig, libglapi, libmesa_util], link_with : [link_for_egl, libglapi, libmesa_util],
link_args : [ld_args_bsymbolic, ld_args_gc_sections], link_args : [ld_args_bsymbolic, ld_args_gc_sections],
dependencies : [deps_for_egl, dep_dl, dep_libdrm, dep_clock, dep_thread], dependencies : [deps_for_egl, dep_dl, dep_libdrm, dep_clock, dep_thread],
install : true, install : true,

1
lib/mesa/src/gallium/drivers/radeonsi/driinfo_radeonsi.h
View File

@ -8,4 +8,5 @@ DRI_CONF_SECTION_END
DRI_CONF_SECTION_DEBUG DRI_CONF_SECTION_DEBUG
DRI_CONF_RADEONSI_CLEAR_DB_CACHE_BEFORE_CLEAR("false") DRI_CONF_RADEONSI_CLEAR_DB_CACHE_BEFORE_CLEAR("false")
DRI_CONF_RADEONSI_ENABLE_NIR("false")
DRI_CONF_SECTION_END DRI_CONF_SECTION_END

14
lib/mesa/src/gallium/drivers/radeonsi/si_compute_blit.c
View File

@ -112,12 +112,20 @@ static void si_compute_do_clear_or_copy(struct si_context *sctx,
sb[0].buffer_offset = dst_offset; sb[0].buffer_offset = dst_offset;
sb[0].buffer_size = size; sb[0].buffer_size = size;
bool shader_dst_stream_policy = SI_COMPUTE_DST_CACHE_POLICY != L2_LRU;
if (src) { if (src) {
sb[1].buffer = src; sb[1].buffer = src;
sb[1].buffer_offset = src_offset; sb[1].buffer_offset = src_offset;
sb[1].buffer_size = size; sb[1].buffer_size = size;
ctx->set_shader_buffers(ctx, PIPE_SHADER_COMPUTE, 0, 2, sb); ctx->set_shader_buffers(ctx, PIPE_SHADER_COMPUTE, 0, 2, sb);
if (!sctx->cs_copy_buffer) {
sctx->cs_copy_buffer = si_create_dma_compute_shader(&sctx->b,
SI_COMPUTE_COPY_DW_PER_THREAD,
shader_dst_stream_policy, true);
}
ctx->bind_compute_state(ctx, sctx->cs_copy_buffer); ctx->bind_compute_state(ctx, sctx->cs_copy_buffer);
} else { } else {
assert(clear_value_size >= 4 && assert(clear_value_size >= 4 &&
@ -128,6 +136,12 @@ static void si_compute_do_clear_or_copy(struct si_context *sctx,
sctx->cs_user_data[i] = clear_value[i % (clear_value_size / 4)]; sctx->cs_user_data[i] = clear_value[i % (clear_value_size / 4)];
ctx->set_shader_buffers(ctx, PIPE_SHADER_COMPUTE, 0, 1, sb); ctx->set_shader_buffers(ctx, PIPE_SHADER_COMPUTE, 0, 1, sb);
if (!sctx->cs_clear_buffer) {
sctx->cs_clear_buffer = si_create_dma_compute_shader(&sctx->b,
SI_COMPUTE_CLEAR_DW_PER_THREAD,
shader_dst_stream_policy, false);
}
ctx->bind_compute_state(ctx, sctx->cs_clear_buffer); ctx->bind_compute_state(ctx, sctx->cs_clear_buffer);
} }

1
lib/mesa/src/gallium/drivers/radeonsi/si_driinfo.h
View File

@ -46,6 +46,7 @@ DRI_CONF_BEGIN
DRI_CONF_ALLOW_GLSL_LAYOUT_QUALIFIER_ON_FUNCTION_PARAMETERS("false") DRI_CONF_ALLOW_GLSL_LAYOUT_QUALIFIER_ON_FUNCTION_PARAMETERS("false")
DRI_CONF_FORCE_COMPAT_PROFILE("false") DRI_CONF_FORCE_COMPAT_PROFILE("false")
DRI_CONF_RADEONSI_CLEAR_DB_CACHE_BEFORE_CLEAR("false") DRI_CONF_RADEONSI_CLEAR_DB_CACHE_BEFORE_CLEAR("false")
DRI_CONF_RADEONSI_ENABLE_NIR("false")
DRI_CONF_SECTION_END DRI_CONF_SECTION_END
DRI_CONF_SECTION_MISCELLANEOUS DRI_CONF_SECTION_MISCELLANEOUS
DRI_CONF_ALWAYS_HAVE_DEPTH_BUFFER("false") DRI_CONF_ALWAYS_HAVE_DEPTH_BUFFER("false")

2
lib/mesa/src/gallium/targets/d3dadapter9/meson.build
View File

@ -68,5 +68,5 @@ pkg.generate(
description : 'Native D3D driver modules', description : 'Native D3D driver modules',
version : '.'.join(nine_version), version : '.'.join(nine_version),
requires_private : 'libdrm >= ' + dep_libdrm.version(), requires_private : 'libdrm >= ' + dep_libdrm.version(),
variables : ['moduledir=${prefix}/@0@'.format(d3d_drivers_path)], variables : ['moduledir=@0@'.format(d3d_drivers_path)],
) )

2
lib/mesa/src/gallium/targets/omx/meson.build
View File

@ -32,7 +32,7 @@ endif
libomx_gallium = shared_library( libomx_gallium = shared_library(
'omx_mesa', 'omx_mesa',
'target.c', ['target.c', xmlpool_options_h],
c_args : c_vis_args, c_args : c_vis_args,
cpp_args : cpp_vis_args, cpp_args : cpp_vis_args,
link_args : [omx_link_args, ld_args_gc_sections], link_args : [omx_link_args, ld_args_gc_sections],

2
lib/mesa/src/gallium/targets/va/meson.build
View File

@ -33,7 +33,7 @@ endif
libva_gallium = shared_library( libva_gallium = shared_library(
'gallium_drv_video', 'gallium_drv_video',
'target.c', ['target.c', xmlpool_options_h],
c_args : c_vis_args, c_args : c_vis_args,
cpp_args : cpp_vis_args, cpp_args : cpp_vis_args,
link_args : [va_link_args, ld_args_gc_sections], link_args : [va_link_args, ld_args_gc_sections],

2
lib/mesa/src/gallium/targets/vdpau/meson.build
View File

@ -38,7 +38,7 @@ endif
libvdpau_gallium = shared_library( libvdpau_gallium = shared_library(
'vdpau_gallium', 'vdpau_gallium',
'target.c', ['target.c', xmlpool_options_h],
c_args : c_vis_args, c_args : c_vis_args,
cpp_args : cpp_vis_args, cpp_args : cpp_vis_args,
link_args : [vdpau_link_args, ld_args_gc_sections], link_args : [vdpau_link_args, ld_args_gc_sections],

2
lib/mesa/src/gallium/targets/xa/meson.build
View File

@ -34,7 +34,7 @@ _xa_version = '.'.join(xa_version)
libxatracker = shared_library( libxatracker = shared_library(
'xatracker', 'xatracker',
'target.c', ['target.c', xmlpool_options_h],
c_args : c_vis_args, c_args : c_vis_args,
cpp_args : cpp_vis_args, cpp_args : cpp_vis_args,
link_args : [xa_link_args, ld_args_gc_sections], link_args : [xa_link_args, ld_args_gc_sections],

2
lib/mesa/src/gallium/targets/xvmc/meson.build
View File

@ -33,7 +33,7 @@ endif
libxvmc_gallium = shared_library( libxvmc_gallium = shared_library(
'XvMCgallium', 'XvMCgallium',
'target.c', ['target.c', xmlpool_options_h],
c_args : c_vis_args, c_args : c_vis_args,
cpp_args : cpp_vis_args, cpp_args : cpp_vis_args,
link_args : [xvmc_link_args, ld_args_gc_sections], link_args : [xvmc_link_args, ld_args_gc_sections],

1
lib/mesa/src/intel/dev/gen_device_info.c
View File

@ -777,6 +777,7 @@ static const struct gen_device_info gen_device_info_cfl_gt1 = {
.num_subslices = { 2, }, .num_subslices = { 2, },
.num_eu_per_subslice = 6, .num_eu_per_subslice = 6,
.l3_banks = 2, .l3_banks = 2,
.urb.size = 192,
.simulator_id = 24, .simulator_id = 24,
}; };
static const struct gen_device_info gen_device_info_cfl_gt2 = { static const struct gen_device_info gen_device_info_cfl_gt2 = {

5
lib/mesa/src/intel/genxml/gen11.xml
View File

@ -2072,7 +2072,10 @@
<value name="AALINEDISTANCE_TRUE" value="1"/> <value name="AALINEDISTANCE_TRUE" value="1"/>
</field> </field>
<field name="Smooth Point Enable" start="109" end="109" type="bool"/> <field name="Smooth Point Enable" start="109" end="109" type="bool"/>
<field name="Vertex Sub Pixel Precision Select" start="108" end="108" type="uint"/> <field name="Vertex Sub Pixel Precision Select" start="108" end="108" type="uint">
<value name="8 Bit" value="0"/>
<value name="4 Bit" value="1"/>
</field>
<field name="Point Width Source" start="107" end="107" type="uint"> <field name="Point Width Source" start="107" end="107" type="uint">
<value name="Vertex" value="0"/> <value name="Vertex" value="0"/>
<value name="State" value="1"/> <value name="State" value="1"/>

2
lib/mesa/src/intel/genxml/gen11_pack.h
View File

@ -5374,6 +5374,8 @@ struct GEN11_3DSTATE_SF {
#define AALINEDISTANCE_TRUE 1 #define AALINEDISTANCE_TRUE 1
bool SmoothPointEnable; bool SmoothPointEnable;
uint32_t VertexSubPixelPrecisionSelect; uint32_t VertexSubPixelPrecisionSelect;
#define _8Bit 0
#define _4Bit 1
uint32_t PointWidthSource; uint32_t PointWidthSource;
#define Vertex 0 #define Vertex 0
#define State 1 #define State 1

1
lib/mesa/src/intel/vulkan/anv_nir_lower_ycbcr_textures.c
View File

@ -269,6 +269,7 @@ create_plane_tex_instr_implicit(struct ycbcr_state *state,
tex->texture_index = old_tex->texture_index; tex->texture_index = old_tex->texture_index;
tex->texture_array_size = old_tex->texture_array_size; tex->texture_array_size = old_tex->texture_array_size;
tex->sampler_index = old_tex->sampler_index; tex->sampler_index = old_tex->sampler_index;
tex->is_array = old_tex->is_array;
nir_ssa_dest_init(&tex->instr, &tex->dest, nir_ssa_dest_init(&tex->instr, &tex->dest,
old_tex->dest.ssa.num_components, old_tex->dest.ssa.num_components,

2
lib/mesa/src/mesa/drivers/dri/meson.build
View File

@ -78,7 +78,7 @@ if with_dri
filebase : 'dri', filebase : 'dri',
description : 'Direct Rendering Infrastructure', description : 'Direct Rendering Infrastructure',
version : meson.project_version(), version : meson.project_version(),
variables : ['dridriverdir=${prefix}/' + dri_drivers_path], variables : ['dridriverdir=' + dri_drivers_path],
requires_private : dri_req_private, requires_private : dri_req_private,
) )
endif endif

9
lib/mesa/src/mesa/program/program_parse.tab.h
View File

@ -1,4 +1,4 @@
/* A Bison parser, made by GNU Bison 3.1. */ /* A Bison parser, made by GNU Bison 3.2. */
/* Bison interface for Yacc-like parsers in C /* Bison interface for Yacc-like parsers in C
@ -30,6 +30,9 @@
This special exception was added by the Free Software Foundation in This special exception was added by the Free Software Foundation in
version 2.2 of Bison. */ version 2.2 of Bison. */
/* Undocumented macros, especially those whose name start with YY_,
are private implementation details. Do not rely on them. */
#ifndef YY__MESA_PROGRAM_PROGRAM_PROGRAM_PARSE_TAB_H_INCLUDED #ifndef YY__MESA_PROGRAM_PROGRAM_PROGRAM_PARSE_TAB_H_INCLUDED
# define YY__MESA_PROGRAM_PROGRAM_PROGRAM_PARSE_TAB_H_INCLUDED # define YY__MESA_PROGRAM_PROGRAM_PROGRAM_PARSE_TAB_H_INCLUDED
/* Debug traces. */ /* Debug traces. */
@ -157,7 +160,7 @@ extern int _mesa_program_debug;
union YYSTYPE union YYSTYPE
{ {
#line 129 "./program/program_parse.y" /* yacc.c:1913 */ #line 129 "./program/program_parse.y" /* yacc.c:1906 */
struct asm_instruction *inst; struct asm_instruction *inst;
struct asm_symbol *sym; struct asm_symbol *sym;
@ -183,7 +186,7 @@ union YYSTYPE
unsigned negate:1; unsigned negate:1;
} ext_swizzle; } ext_swizzle;
#line 187 "./program/program_parse.tab.h" /* yacc.c:1913 */ #line 190 "./program/program_parse.tab.h" /* yacc.c:1906 */
}; };
typedef union YYSTYPE YYSTYPE; typedef union YYSTYPE YYSTYPE;

9
lib/mesa/src/util/00-mesa-defaults.conf
View File

@ -227,6 +227,9 @@ TODO: document the other workarounds.
<application name="Civilization 6" executable="Civ6"> <application name="Civilization 6" executable="Civ6">
<option name="mesa_glthread" value="true"/> <option name="mesa_glthread" value="true"/>
</application> </application>
<application name="Civilization 6" executable="Civ6Sub">
<option name="mesa_glthread" value="true"/>
</application>
<application name="Dreamfall Chapters" executable="Dreamfall Chapters"> <application name="Dreamfall Chapters" executable="Dreamfall Chapters">
<option name="mesa_glthread" value="true"/> <option name="mesa_glthread" value="true"/>
@ -334,5 +337,11 @@ TODO: document the other workarounds.
<application name="No Mans Sky" executable="NMS.exe"> <application name="No Mans Sky" executable="NMS.exe">
<option name="radeonsi_zerovram" value="true" /> <option name="radeonsi_zerovram" value="true" />
</application> </application>
<application name="Civilization 6" executable="Civ6">
<option name="radeonsi_enable_nir" value="true"/>
</application>
<application name="Civilization 6" executable="Civ6Sub">
<option name="radeonsi_enable_nir" value="true"/>
</application>
</device> </device>
</driconf> </driconf>

11
lib/mesa/src/util/xmlpool/options.h
View File

@ -680,3 +680,14 @@ DRI_CONF_OPT_END
DRI_CONF_OPT_BEGIN_B(radeonsi_zerovram, def) \ DRI_CONF_OPT_BEGIN_B(radeonsi_zerovram, def) \
DRI_CONF_DESC(en,"Zero all vram allocations") \ DRI_CONF_DESC(en,"Zero all vram allocations") \
DRI_CONF_OPT_END DRI_CONF_OPT_END
#define DRI_CONF_RADEONSI_ENABLE_NIR(def) \
DRI_CONF_OPT_BEGIN_B(radeonsi_enable_nir, def) \
DRI_CONF_DESC(en,"Enable NIR") \
DRI_CONF_DESC(ca,"Enable NIR") \
DRI_CONF_DESC(de,"Enable NIR") \
DRI_CONF_DESC(es,"Enable NIR") \
DRI_CONF_DESC(nl,"Enable NIR") \
DRI_CONF_DESC(fr,"Enable NIR") \
DRI_CONF_DESC(sv,"Enable NIR") \
DRI_CONF_OPT_END

5
lib/mesa/src/util/xmlpool/t_options.h
View File

@ -342,3 +342,8 @@ DRI_CONF_OPT_END
DRI_CONF_OPT_BEGIN_B(radeonsi_zerovram, def) \ DRI_CONF_OPT_BEGIN_B(radeonsi_zerovram, def) \
DRI_CONF_DESC(en,"Zero all vram allocations") \ DRI_CONF_DESC(en,"Zero all vram allocations") \
DRI_CONF_OPT_END DRI_CONF_OPT_END
#define DRI_CONF_RADEONSI_ENABLE_NIR(def) \
DRI_CONF_OPT_BEGIN_B(radeonsi_enable_nir, def) \
DRI_CONF_DESC(en,gettext("Enable NIR")) \
DRI_CONF_OPT_END