qbit/xenocara
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Merge Mesa 10.2.7

Browse Source
This commit is contained in:
jsg 2014-09-07 15:20:06 +00:00
parent dd38df57c9
commit 29ddf62fe4
58 changed files with 526 additions and 9541 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

164
dist/Mesa/bin/config.guess vendored
View File

@ -1,8 +1,8 @@
#! /bin/sh
# Attempt to guess a canonical system name.
# Copyright 1992-2014 Free Software Foundation, Inc.
# Copyright 1992-2013 Free Software Foundation, Inc.
timestamp='2014-03-23'
timestamp='2013-11-29'
# This file is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by
@ -50,7 +50,7 @@ version="\
GNU config.guess ($timestamp)
Originally written by Per Bothner.
Copyright 1992-2014 Free Software Foundation, Inc.
Copyright 1992-2013 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE."
@ -149,7 +149,7 @@ Linux|GNU|GNU/*)
LIBC=gnu
#endif
EOF
eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^LIBC' | sed 's, ,,g'`
eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^LIBC'`
;;
esac
@ -826,7 +826,7 @@ EOF
*:MINGW*:*)
echo ${UNAME_MACHINE}-pc-mingw32
exit ;;
*:MSYS*:*)
i*:MSYS*:*)
echo ${UNAME_MACHINE}-pc-msys
exit ;;
i*:windows32*:*)
@ -969,10 +969,10 @@ EOF
eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^CPU'`
test x"${CPU}" != x && { echo "${CPU}-unknown-linux-${LIBC}"; exit; }
;;
openrisc*:Linux:*:*)
echo or1k-unknown-linux-${LIBC}
or1k:Linux:*:*)
echo ${UNAME_MACHINE}-unknown-linux-${LIBC}
exit ;;
or32:Linux:*:* | or1k*:Linux:*:*)
or32:Linux:*:*)
echo ${UNAME_MACHINE}-unknown-linux-${LIBC}
exit ;;
padre:Linux:*:*)
@ -1371,6 +1371,154 @@ EOF
exit ;;
esac
eval $set_cc_for_build
cat >$dummy.c <<EOF
#ifdef _SEQUENT_
# include <sys/types.h>
# include <sys/utsname.h>
#endif
main ()
{
#if defined (sony)
#if defined (MIPSEB)
/* BFD wants "bsd" instead of "newsos". Perhaps BFD should be changed,
I don't know.... */
printf ("mips-sony-bsd\n"); exit (0);
#else
#include <sys/param.h>
printf ("m68k-sony-newsos%s\n",
#ifdef NEWSOS4
"4"
#else
""
#endif
); exit (0);
#endif
#endif
#if defined (__arm) && defined (__acorn) && defined (__unix)
printf ("arm-acorn-riscix\n"); exit (0);
#endif
#if defined (hp300) && !defined (hpux)
printf ("m68k-hp-bsd\n"); exit (0);
#endif
#if defined (NeXT)
#if !defined (__ARCHITECTURE__)
#define __ARCHITECTURE__ "m68k"
#endif
int version;
version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`;
if (version < 4)
printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version);
else
printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version);
exit (0);
#endif
#if defined (MULTIMAX) || defined (n16)
#if defined (UMAXV)
printf ("ns32k-encore-sysv\n"); exit (0);
#else
#if defined (CMU)
printf ("ns32k-encore-mach\n"); exit (0);
#else
printf ("ns32k-encore-bsd\n"); exit (0);
#endif
#endif
#endif
#if defined (__386BSD__)
printf ("i386-pc-bsd\n"); exit (0);
#endif
#if defined (sequent)
#if defined (i386)
printf ("i386-sequent-dynix\n"); exit (0);
#endif
#if defined (ns32000)
printf ("ns32k-sequent-dynix\n"); exit (0);
#endif
#endif
#if defined (_SEQUENT_)
struct utsname un;
uname(&un);
if (strncmp(un.version, "V2", 2) == 0) {
printf ("i386-sequent-ptx2\n"); exit (0);
}
if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */
printf ("i386-sequent-ptx1\n"); exit (0);
}
printf ("i386-sequent-ptx\n"); exit (0);
#endif
#if defined (vax)
# if !defined (ultrix)
# include <sys/param.h>
# if defined (BSD)
# if BSD == 43
printf ("vax-dec-bsd4.3\n"); exit (0);
# else
# if BSD == 199006
printf ("vax-dec-bsd4.3reno\n"); exit (0);
# else
printf ("vax-dec-bsd\n"); exit (0);
# endif
# endif
# else
printf ("vax-dec-bsd\n"); exit (0);
# endif
# else
printf ("vax-dec-ultrix\n"); exit (0);
# endif
#endif
#if defined (alliant) && defined (i860)
printf ("i860-alliant-bsd\n"); exit (0);
#endif
exit (1);
}
EOF
$CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null && SYSTEM_NAME=`$dummy` &&
{ echo "$SYSTEM_NAME"; exit; }
# Apollos put the system type in the environment.
test -d /usr/apollo && { echo ${ISP}-apollo-${SYSTYPE}; exit; }
# Convex versions that predate uname can use getsysinfo(1)
if [ -x /usr/convex/getsysinfo ]
then
case `getsysinfo -f cpu_type` in
c1*)
echo c1-convex-bsd
exit ;;
c2*)
if getsysinfo -f scalar_acc
then echo c32-convex-bsd
else echo c2-convex-bsd
fi
exit ;;
c34*)
echo c34-convex-bsd
exit ;;
c38*)
echo c38-convex-bsd
exit ;;
c4*)
echo c4-convex-bsd
exit ;;
esac
fi
cat >&2 <<EOF
$0: unable to guess system type

19
dist/Mesa/bin/config.sub vendored
View File

@ -1,8 +1,8 @@
#! /bin/sh
# Configuration validation subroutine script.
# Copyright 1992-2014 Free Software Foundation, Inc.
# Copyright 1992-2013 Free Software Foundation, Inc.
timestamp='2014-05-01'
timestamp='2013-10-01'
# This file is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by
@ -68,7 +68,7 @@ Report bugs and patches to <config-patches@gnu.org>."
version="\
GNU config.sub ($timestamp)
Copyright 1992-2014 Free Software Foundation, Inc.
Copyright 1992-2013 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE."
@ -283,10 +283,8 @@ case $basic_machine in
| mips64vr5900 | mips64vr5900el \
| mipsisa32 | mipsisa32el \
| mipsisa32r2 | mipsisa32r2el \
| mipsisa32r6 | mipsisa32r6el \
| mipsisa64 | mipsisa64el \
| mipsisa64r2 | mipsisa64r2el \
| mipsisa64r6 | mipsisa64r6el \
| mipsisa64sb1 | mipsisa64sb1el \
| mipsisa64sr71k | mipsisa64sr71kel \
| mipsr5900 | mipsr5900el \
@ -298,7 +296,8 @@ case $basic_machine in
| nds32 | nds32le | nds32be \
| nios | nios2 | nios2eb | nios2el \
| ns16k | ns32k \
| open8 | or1k | or1knd | or32 \
| open8 \
| or1k | or32 \
| pdp10 | pdp11 | pj | pjl \
| powerpc | powerpc64 | powerpc64le | powerpcle \
| pyramid \
@ -403,10 +402,8 @@ case $basic_machine in
| mips64vr5900-* | mips64vr5900el-* \
| mipsisa32-* | mipsisa32el-* \
| mipsisa32r2-* | mipsisa32r2el-* \
| mipsisa32r6-* | mipsisa32r6el-* \
| mipsisa64-* | mipsisa64el-* \
| mipsisa64r2-* | mipsisa64r2el-* \
| mipsisa64r6-* | mipsisa64r6el-* \
| mipsisa64sb1-* | mipsisa64sb1el-* \
| mipsisa64sr71k-* | mipsisa64sr71kel-* \
| mipsr5900-* | mipsr5900el-* \
@ -418,7 +415,6 @@ case $basic_machine in
| nios-* | nios2-* | nios2eb-* | nios2el-* \
| none-* | np1-* | ns16k-* | ns32k-* \
| open8-* \
| or1k*-* \
| orion-* \
| pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \
| powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* \
@ -1380,7 +1376,7 @@ case $os in
| -os2* | -vos* | -palmos* | -uclinux* | -nucleus* \
| -morphos* | -superux* | -rtmk* | -rtmk-nova* | -windiss* \
| -powermax* | -dnix* | -nx6 | -nx7 | -sei* | -dragonfly* \
| -skyos* | -haiku* | -rdos* | -toppers* | -drops* | -es* | -tirtos*)
| -skyos* | -haiku* | -rdos* | -toppers* | -drops* | -es*)
# Remember, each alternative MUST END IN *, to match a version number.
;;
-qnx*)
@ -1598,6 +1594,9 @@ case $basic_machine in
mips*-*)
os=-elf
;;
or1k-*)
os=-elf
;;
or32-*)
os=-coff
;;

11
dist/Mesa/configure.ac vendored
View File

@ -494,10 +494,10 @@ AC_CHECK_FUNC([dlopen], [DEFINES="$DEFINES -DHAVE_DLOPEN"],
AC_SUBST([DLOPEN_LIBS])
dnl Check if that library also has dladdr
save_LDFLAGS="$LDFLAGS"
LDFLAGS="$LDFLAGS $DLOPEN_LIBS"
save_LIBS="$LIBS"
LIBS="$LIBS $DLOPEN_LIBS"
AC_CHECK_FUNCS([dladdr])
LDFLAGS="$save_LDFLAGS"
LIBS="$save_LIBS"
case "$host_os" in
darwin*|mingw*)
@ -1273,6 +1273,10 @@ if test "x$enable_gallium_gbm" = xyes; then
AC_MSG_ERROR([gbm_gallium requires --enable-dri to build])
fi
if test "x$enable_gallium_egl" != xyes; then
AC_MSG_ERROR([gbm_gallium is only used by egl_gallium])
fi
GALLIUM_STATE_TRACKERS_DIRS="gbm $GALLIUM_STATE_TRACKERS_DIRS"
GALLIUM_TARGET_DIRS="$GALLIUM_TARGET_DIRS gbm"
enable_gallium_loader=yes
@ -1757,6 +1761,7 @@ gallium_check_st() {
gallium_require_llvm() {
if test "x$MESA_LLVM" = x0; then
case "$host" in *gnux32) return;; esac
case "$host_cpu" in
i*86|x86_64|amd64) AC_MSG_ERROR([LLVM is required to build $1 on x86 and x86_64]);;
esac

37
dist/Mesa/src/egl/drivers/dri2/egl_dri2.c vendored
View File

@ -1663,36 +1663,13 @@ dri2_check_dma_buf_format(const _EGLImageAttribs *attrs)
/**
* The spec says:
*
* "If eglCreateImageKHR is successful for a EGL_LINUX_DMA_BUF_EXT target,
* the EGL takes ownership of the file descriptor and is responsible for
* closing it, which it may do at any time while the EGLDisplay is
* initialized."
* "If eglCreateImageKHR is successful for a EGL_LINUX_DMA_BUF_EXT target, the
* EGL will take a reference to the dma_buf(s) which it will release at any
* time while the EGLDisplay is initialized. It is the responsibility of the
* application to close the dma_buf file descriptors."
*
* Therefore we must never close or otherwise modify the file descriptors.
*/
static void
dri2_take_dma_buf_ownership(const int *fds, unsigned num_fds)
{
int already_closed[num_fds];
unsigned num_closed = 0;
unsigned i, j;
for (i = 0; i < num_fds; ++i) {
/**
* The same file descriptor can be referenced multiple times in case more
* than one plane is found in the same buffer, just with a different
* offset.
*/
for (j = 0; j < num_closed; ++j) {
if (already_closed[j] == fds[i])
break;
}
if (j == num_closed) {
close(fds[i]);
already_closed[num_closed++] = fds[i];
}
}
}
static _EGLImage *
dri2_create_image_dma_buf(_EGLDisplay *disp, _EGLContext *ctx,
EGLClientBuffer buffer, const EGLint *attr_list)
@ -1755,8 +1732,6 @@ dri2_create_image_dma_buf(_EGLDisplay *disp, _EGLContext *ctx,
return EGL_NO_IMAGE_KHR;
res = dri2_create_image_from_dri(disp, dri_image);
if (res)
dri2_take_dma_buf_ownership(fds, num_fds);
return res;
}

5
dist/Mesa/src/egl/main/eglcontext.c vendored
View File

@ -322,11 +322,14 @@ _eglParseContextAttribList(_EGLContext *ctx, _EGLDisplay *dpy,
break;
case 3:
default:
/* Don't put additional version checks here. We don't know that
* there won't be versions > 3.0.
*/
break;
default:
err = EGL_BAD_MATCH;
break;
}
}

8
dist/Mesa/src/gallium/auxiliary/gallivm/lp_bld_debug.cpp vendored
View File

@ -34,6 +34,10 @@
#include <llvm/Support/Format.h>
#include <llvm/Support/MemoryObject.h>
#if HAVE_LLVM >= 0x0306
#include <llvm/Target/TargetSubtargetInfo.h>
#endif
#if HAVE_LLVM >= 0x0300
#include <llvm/Support/TargetRegistry.h>
#include <llvm/MC/MCSubtargetInfo.h>
@ -302,7 +306,11 @@ disassemble(const void* func, llvm::raw_ostream & Out)
OwningPtr<TargetMachine> TM(T->createTargetMachine(Triple, ""));
#endif
#if HAVE_LLVM >= 0x0306
const TargetInstrInfo *TII = TM->getSubtargetImpl()->getInstrInfo();
#else
const TargetInstrInfo *TII = TM->getInstrInfo();
#endif
/*
* Wrap the data in a MemoryObject

4
dist/Mesa/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp vendored
View File

@ -266,7 +266,11 @@ lp_build_create_jit_compiler_for_module(LLVMExecutionEngineRef *OutJIT,
using namespace llvm;
std::string Error;
#if HAVE_LLVM >= 0x0306
EngineBuilder builder(std::unique_ptr<Module>(unwrap(M)));
#else
EngineBuilder builder(unwrap(M));
#endif
/**
* LLVM 3.1+ haven't more "extern unsigned llvm::StackAlignmentOverride" and

1
dist/Mesa/src/gallium/auxiliary/gallivm/lp_bld_sample.c vendored
View File

@ -927,6 +927,7 @@ lp_build_nearest_mip_level(struct lp_build_sample_context *bld,
bld->int_coord_bld.type,
out);
}
level = lp_build_andnot(&bld->int_coord_bld, level, *out_of_bounds);
*level_out = level;
}
else {

9
dist/Mesa/src/gallium/auxiliary/util/u_blitter.c vendored
View File

@ -383,6 +383,15 @@ void util_blitter_destroy(struct blitter_context *blitter)
if (ctx->fs_texfetch_stencil[i])
ctx->delete_fs_state(pipe, ctx->fs_texfetch_stencil[i]);
if (ctx->fs_texfetch_col_msaa[i])
ctx->delete_fs_state(pipe, ctx->fs_texfetch_col_msaa[i]);
if (ctx->fs_texfetch_depth_msaa[i])
ctx->delete_fs_state(pipe, ctx->fs_texfetch_depth_msaa[i]);
if (ctx->fs_texfetch_depthstencil_msaa[i])
ctx->delete_fs_state(pipe, ctx->fs_texfetch_depthstencil_msaa[i]);
if (ctx->fs_texfetch_stencil_msaa[i])
ctx->delete_fs_state(pipe, ctx->fs_texfetch_stencil_msaa[i]);
for (j = 0; j< Elements(ctx->fs_resolve[i]); j++)
for (f = 0; f < 2; f++)
if (ctx->fs_resolve[i][j][f])

22
dist/Mesa/src/gallium/auxiliary/util/u_math.h vendored
View File

@ -149,28 +149,6 @@ roundf(float x)
#endif /* _MSC_VER */
#ifdef PIPE_OS_ANDROID
static INLINE
double log2(double d)
{
return log(d) * (1.0 / M_LN2);
}
/* workaround a conflict with main/imports.h */
#ifdef log2f
#undef log2f
#endif
static INLINE
float log2f(float f)
{
return logf(f) * (float) (1.0 / M_LN2);
}
#endif
#if __STDC_VERSION__ < 199901L && (!defined(__cplusplus) || defined(_MSC_VER))
static INLINE long int
lrint(double d)

15
dist/Mesa/src/gallium/auxiliary/util/u_prim.h vendored
View File

@ -136,6 +136,21 @@ u_prim_vertex_count(unsigned prim)
return (likely(prim < PIPE_PRIM_MAX)) ? &prim_table[prim] : NULL;
}
/**
* Given a vertex count, return the number of primitives.
* For polygons, return the number of triangles.
*/
static INLINE unsigned
u_prims_for_vertices(unsigned prim, unsigned num)
{
const struct u_prim_vertex_count *info = u_prim_vertex_count(prim);
if (num < info->min)
return 0;
return 1 + ((num - info->min) / info->incr);
}
static INLINE boolean u_validate_pipe_prim( unsigned pipe_prim, unsigned nr )
{
const struct u_prim_vertex_count *count = u_prim_vertex_count(pipe_prim);

4
dist/Mesa/src/gallium/auxiliary/util/u_transfer.c vendored
View File

@ -25,8 +25,8 @@ void u_default_transfer_inline_write( struct pipe_context *pipe,
usage |= PIPE_TRANSFER_WRITE;
/* transfer_inline_write implicitly discards the rewritten buffer range */
/* XXX this looks very broken for non-buffer resources having more than one dim. */
if (box->x == 0 && box->width == resource->width0) {
if (resource->target == PIPE_BUFFER &&
box->x == 0 && box->width == resource->width0) {
usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
} else {
usage |= PIPE_TRANSFER_DISCARD_RANGE;

4
dist/Mesa/src/gallium/drivers/r300/r300_context.c vendored
View File

@ -37,6 +37,8 @@
#include "r300_screen_buffer.h"
#include "compiler/radeon_regalloc.h"
#include <inttypes.h>
static void r300_release_referenced_objects(struct r300_context *r300)
{
struct pipe_framebuffer_state *fb =
@ -482,7 +484,7 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen,
#endif
fprintf(stderr,
"r300: DRM version: %d.%d.%d, Name: %s, ID: 0x%04x, GB: %d, Z: %d\n"
"r300: GART size: %d MB, VRAM size: %d MB\n"
"r300: GART size: %"PRIu64" MB, VRAM size: %"PRIu64" MB\n"
"r300: AA compression RAM: %s, Z compression RAM: %s, HiZ RAM: %s\n",
r300->screen->info.drm_major,
r300->screen->info.drm_minor,

2
dist/Mesa/src/gallium/drivers/r600/evergreen_state.c vendored
View File

@ -626,7 +626,6 @@ texture_buffer_sampler_view(struct r600_pipe_sampler_view *view,
S_030008_DATA_FORMAT(format) |
S_030008_NUM_FORMAT_ALL(num_format) |
S_030008_FORMAT_COMP_ALL(format_comp) |
S_030008_SRF_MODE_ALL(1) |
S_030008_ENDIAN_SWAP(endian);
view->tex_resource_words[3] = swizzle_res;
/*
@ -805,7 +804,6 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx,
}
view->tex_resource_words[4] = (word4 |
S_030010_SRF_MODE_ALL(V_030010_SRF_MODE_ZERO_CLAMP_MINUS_ONE) |
S_030010_ENDIAN_SWAP(endian));
view->tex_resource_words[5] = S_030014_BASE_ARRAY(state->u.tex.first_layer) |
S_030014_LAST_ARRAY(state->u.tex.last_layer);

1
dist/Mesa/src/gallium/drivers/r600/r600_asm.c vendored
View File

@ -2374,7 +2374,6 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx,
vtx.data_format = format;
vtx.num_format_all = num_format;
vtx.format_comp_all = format_comp;
vtx.srf_mode_all = 1;
vtx.offset = elements[i].src_offset;
vtx.endian = endian;

5
dist/Mesa/src/gallium/drivers/r600/r600_blit.c vendored
View File

@ -430,7 +430,8 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers,
* disable fast clear for texture array.
*/
/* Only use htile for first level */
if (rtex->htile_buffer && !level && rtex->surface.array_size == 1) {
if (rtex->htile_buffer && !level &&
util_max_layer(&rtex->resource.b.b, level) == 0) {
if (rtex->depth_clear_value != depth) {
rtex->depth_clear_value = depth;
rctx->db_state.atom.dirty = true;
@ -837,7 +838,7 @@ static void r600_flush_resource(struct pipe_context *ctx,
if (!rtex->is_depth && rtex->cmask.size) {
r600_blit_decompress_color(ctx, rtex, 0, res->last_level,
0, res->array_size - 1);
0, util_max_layer(res, 0));
}
}

3
dist/Mesa/src/gallium/drivers/r600/r600_shader.c vendored
View File

@ -851,7 +851,6 @@ static int tgsi_fetch_rel_const(struct r600_shader_ctx *ctx, unsigned int cb_idx
vtx.data_format = FMT_32_32_32_32_FLOAT;
vtx.num_format_all = 2; /* NUM_FORMAT_SCALED */
vtx.format_comp_all = 1; /* FORMAT_COMP_SIGNED */
vtx.srf_mode_all = 1; /* SRF_MODE_NO_ZERO */
vtx.endian = r600_endian_swap(32);
if ((r = r600_bytecode_add_vtx(ctx->bc, &vtx)))
@ -998,6 +997,7 @@ static int tgsi_split_constant(struct r600_shader_ctx *ctx)
alu.src[0].sel = ctx->src[i].sel;
alu.src[0].chan = k;
alu.src[0].rel = ctx->src[i].rel;
alu.src[0].kc_bank = ctx->src[i].kc_bank;
alu.dst.sel = treg;
alu.dst.chan = k;
alu.dst.write = 1;
@ -4309,7 +4309,6 @@ static int do_vtx_fetch_inst(struct r600_shader_ctx *ctx, boolean src_requires_l
vtx.dst_sel_z = (inst->Dst[0].Register.WriteMask & 4) ? 2 : 7; /* SEL_Z */
vtx.dst_sel_w = (inst->Dst[0].Register.WriteMask & 8) ? 3 : 7; /* SEL_W */
vtx.use_const_fields = 1;
vtx.srf_mode_all = 1; /* SRF_MODE_NO_ZERO */
if ((r = r600_bytecode_add_vtx(ctx->bc, &vtx)))
return r;

2
dist/Mesa/src/gallium/drivers/r600/r600_state.c vendored
View File

@ -609,7 +609,6 @@ texture_buffer_sampler_view(struct r600_pipe_sampler_view *view,
S_038008_DATA_FORMAT(format) |
S_038008_NUM_FORMAT_ALL(num_format) |
S_038008_FORMAT_COMP_ALL(format_comp) |
S_038008_SRF_MODE_ALL(1) |
S_038008_ENDIAN_SWAP(endian);
view->tex_resource_words[3] = 0;
/*
@ -720,7 +719,6 @@ r600_create_sampler_view_custom(struct pipe_context *ctx,
view->tex_resource_words[3] = tmp->surface.level[offset_level + 1].offset >> 8;
}
view->tex_resource_words[4] = (word4 |
S_038010_SRF_MODE_ALL(V_038010_SRF_MODE_ZERO_CLAMP_MINUS_ONE) |
S_038010_REQUEST_SIZE(1) |
S_038010_ENDIAN_SWAP(endian) |
S_038010_BASE_LEVEL(0));

6
dist/Mesa/src/gallium/state_trackers/wgl/stw_ext_pixelformat.c vendored
View File

@ -448,9 +448,11 @@ wglChoosePixelFormatARB(
*/
for (i = 0; i < count; i++) {
if (scores[i].points > 0) {
if (*nNumFormats < nMaxFormats)
piFormats[*nNumFormats] = scores[i].index + 1;
piFormats[*nNumFormats] = scores[i].index + 1;
(*nNumFormats)++;
if (*nNumFormats >= nMaxFormats) {
break;
}
}
}

62
dist/Mesa/src/gallium/winsys/radeon/drm/radeon_drm_cs.c vendored
View File

@ -155,7 +155,7 @@ static struct radeon_winsys_cs *
radeon_drm_cs_create(struct radeon_winsys *rws,
enum ring_type ring_type,
void (*flush)(void *ctx, unsigned flags,
struct pipe_fence_handle **fence),
struct pipe_fence_handle **fence),
void *flush_ctx,
struct radeon_winsys_cs_handle *trace_buf)
{
@ -196,10 +196,10 @@ radeon_drm_cs_create(struct radeon_winsys *rws,
#define OUT_CS(cs, value) (cs)->buf[(cs)->cdw++] = (value)
static INLINE void update_reloc(struct drm_radeon_cs_reloc *reloc,
enum radeon_bo_domain rd,
enum radeon_bo_domain wd,
unsigned priority,
enum radeon_bo_domain *added_domains)
enum radeon_bo_domain rd,
enum radeon_bo_domain wd,
unsigned priority,
enum radeon_bo_domain *added_domains)
{
*added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain);
@ -434,33 +434,37 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
switch (cs->base.ring_type) {
case RING_DMA:
/* pad DMA ring to 8 DWs */
if (cs->ws->info.chip_class <= SI) {
while (rcs->cdw & 7)
OUT_CS(&cs->base, 0xf0000000); /* NOP packet */
} else {
while (rcs->cdw & 7)
OUT_CS(&cs->base, 0x00000000); /* NOP packet */
}
break;
/* pad DMA ring to 8 DWs */
if (cs->ws->info.chip_class <= SI) {
while (rcs->cdw & 7)
OUT_CS(&cs->base, 0xf0000000); /* NOP packet */
} else {
while (rcs->cdw & 7)
OUT_CS(&cs->base, 0x00000000); /* NOP packet */
}
break;
case RING_GFX:
/* pad DMA ring to 8 DWs to meet CP fetch alignment requirements
* r6xx, requires at least 4 dw alignment to avoid a hw bug.
*/
if (cs->ws->info.chip_class <= SI) {
while (rcs->cdw & 7)
OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
} else {
while (rcs->cdw & 7)
OUT_CS(&cs->base, 0xffff1000); /* type3 nop packet */
}
break;
/* pad DMA ring to 8 DWs to meet CP fetch alignment requirements
* r6xx, requires at least 4 dw alignment to avoid a hw bug.
* hawaii with old firmware needs type2 nop packet.
* accel_working2 with value 3 indicates the new firmware.
*/
if (cs->ws->info.chip_class <= SI ||
(cs->ws->info.family == CHIP_HAWAII &&
cs->ws->accel_working2 < 3)) {
while (rcs->cdw & 7)
OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
} else {
while (rcs->cdw & 7)
OUT_CS(&cs->base, 0xffff1000); /* type3 nop packet */
}
break;
case RING_UVD:
while (rcs->cdw & 15)
OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
break;
while (rcs->cdw & 15)
OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
break;
default:
break;
break;
}
if (rcs->cdw > RADEON_MAX_CMDBUF_DWORDS) {

4
dist/Mesa/src/gallium/winsys/radeon/drm/radeon_drm_cs.h vendored
View File

@ -50,8 +50,8 @@ struct radeon_cs_context {
int reloc_indices_hashlist[512];
unsigned used_vram;
unsigned used_gart;
uint64_t used_vram;
uint64_t used_gart;
};
struct radeon_drm_cs {

10
dist/Mesa/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c vendored
View File

@ -382,6 +382,16 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_PIPES, NULL,
&ws->info.r600_max_pipes);
radeon_get_drm_value(ws->fd, RADEON_INFO_ACCEL_WORKING2, NULL,
&ws->accel_working2);
if (ws->info.family == CHIP_HAWAII && ws->accel_working2 < 2) {
fprintf(stderr, "radeon: GPU acceleration for Hawaii disabled, "
"returned accel_working2 value %u is smaller than 2. "
"Please install a newer kernel.\n",
ws->accel_working2);
return FALSE;
}
if (radeon_get_drm_value(ws->fd, RADEON_INFO_SI_TILE_MODE_ARRAY, NULL,
ws->info.si_tile_mode_array)) {
ws->info.si_tile_mode_array_valid = TRUE;

1
dist/Mesa/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h vendored
View File

@ -55,6 +55,7 @@ struct radeon_drm_winsys {
enum radeon_generation gen;
struct radeon_info info;
uint32_t va_start;
uint32_t accel_working2;
struct pb_manager *kman;
struct pb_manager *cman;

4
dist/Mesa/src/gallium/winsys/radeon/drm/radeon_winsys.h vendored
View File

@ -195,8 +195,8 @@ struct radeon_info {
uint32_t pci_id;
enum radeon_family family;
enum chip_class chip_class;
uint32_t gart_size;
uint32_t vram_size;
uint64_t gart_size;
uint64_t vram_size;
uint32_t max_sclk;
uint32_t drm_major; /* version */

21
dist/Mesa/src/glsl/glcpp/glcpp-lex.c vendored
View File

@ -159,15 +159,7 @@ typedef void* yyscan_t;
/* Size of default input buffer. */
#ifndef YY_BUF_SIZE
#ifdef __ia64__
/* On IA-64, the buffer size is 16k, not 8k.
* Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case.
* Ditto for the __ia64__ case accordingly.
*/
#define YY_BUF_SIZE 32768
#else
#define YY_BUF_SIZE 16384
#endif /* __ia64__ */
#endif
/* The state buf must be large enough to hold one state per character in the main buffer.
@ -637,7 +629,7 @@ match longer strings take priority over those matching shorter
strings, we have to be careful to avoid OTHER matching and hiding
something that CPP does care about. So we simply exclude all
characters that appear in any other expressions. */
#line 641 "glcpp/glcpp-lex.c"
#line 633 "glcpp/glcpp-lex.c"
#define INITIAL 0
#define DONE 1
@ -788,12 +780,7 @@ static int input (yyscan_t yyscanner );
/* Amount of stuff to slurp up with each read. */
#ifndef YY_READ_BUF_SIZE
#ifdef __ia64__
/* On IA-64, the buffer size is 16k, not 8k */
#define YY_READ_BUF_SIZE 16384
#else
#define YY_READ_BUF_SIZE 8192
#endif /* __ia64__ */
#endif
/* Copy whatever the last rule matched to the standard output. */
@ -995,7 +982,7 @@ YY_DECL
}
/* Single-line comments */
#line 999 "glcpp/glcpp-lex.c"
#line 986 "glcpp/glcpp-lex.c"
while ( 1 ) /* loops until end-of-file is reached */
{
@ -1418,7 +1405,7 @@ YY_RULE_SETUP
#line 373 "glcpp/glcpp-lex.l"
ECHO;
YY_BREAK
#line 1422 "glcpp/glcpp-lex.c"
#line 1409 "glcpp/glcpp-lex.c"
case YY_STATE_EOF(DONE):
case YY_STATE_EOF(COMMENT):
case YY_STATE_EOF(UNREACHABLE):
@ -2644,7 +2631,7 @@ void glcpp_free (void * ptr , yyscan_t yyscanner)
#define YYTABLES_NAME "yytables"
#line 372 "glcpp/glcpp-lex.l"
#line 373 "glcpp/glcpp-lex.l"

21
dist/Mesa/src/glsl/glsl_lexer.cpp vendored
View File

@ -159,15 +159,7 @@ typedef void* yyscan_t;
/* Size of default input buffer. */
#ifndef YY_BUF_SIZE
#ifdef __ia64__
/* On IA-64, the buffer size is 16k, not 8k.
* Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case.
* Ditto for the __ia64__ case accordingly.
*/
#define YY_BUF_SIZE 32768
#else
#define YY_BUF_SIZE 16384
#endif /* __ia64__ */
#endif
/* The state buf must be large enough to hold one state per character in the main buffer.
@ -1242,7 +1234,7 @@ literal_integer(char *text, int len, struct _mesa_glsl_parse_state *state,
literal_integer(yytext, yyleng, yyextra, yylval, yylloc, base)
#line 1246 "glsl_lexer.cpp"
#line 1238 "glsl_lexer.cpp"
#define INITIAL 0
#define PP 1
@ -1381,12 +1373,7 @@ static int input (yyscan_t yyscanner );
/* Amount of stuff to slurp up with each read. */
#ifndef YY_READ_BUF_SIZE
#ifdef __ia64__
/* On IA-64, the buffer size is 16k, not 8k */
#define YY_READ_BUF_SIZE 16384
#else
#define YY_READ_BUF_SIZE 8192
#endif /* __ia64__ */
#endif
/* Copy whatever the last rule matched to the standard output. */
@ -1527,7 +1514,7 @@ YY_DECL
#line 165 "glsl_lexer.ll"
#line 1531 "glsl_lexer.cpp"
#line 1518 "glsl_lexer.cpp"
while ( 1 ) /* loops until end-of-file is reached */
{
@ -2933,7 +2920,7 @@ YY_RULE_SETUP
#line 554 "glsl_lexer.ll"
ECHO;
YY_BREAK
#line 2937 "glsl_lexer.cpp"
#line 2924 "glsl_lexer.cpp"
case YY_STATE_EOF(INITIAL):
case YY_STATE_EOF(PP):
case YY_STATE_EOF(PRAGMA):
@ -4078,7 +4065,7 @@ void _mesa_glsl_lexer_free (void * ptr , yyscan_t yyscanner)
#define YYTABLES_NAME "yytables"
#line 553 "glsl_lexer.ll"
#line 554 "glsl_lexer.ll"

19
dist/Mesa/src/mesa/drivers/common/meta.c vendored
View File

@ -2741,9 +2741,9 @@ _mesa_meta_blit_shader_table_cleanup(struct blit_shader_table *table)
static GLenum
get_temp_image_type(struct gl_context *ctx, mesa_format format)
{
GLenum baseFormat;
baseFormat = _mesa_get_format_base_format(format);
const GLenum baseFormat = _mesa_get_format_base_format(format);
const GLint format_red_bits = _mesa_get_format_bits(format, GL_RED_BITS);
GLenum datatype = _mesa_get_format_datatype(format);
switch (baseFormat) {
case GL_RGBA:
@ -2754,18 +2754,15 @@ get_temp_image_type(struct gl_context *ctx, mesa_format format)
case GL_LUMINANCE:
case GL_LUMINANCE_ALPHA:
case GL_INTENSITY:
if (ctx->DrawBuffer->Visual.redBits <= 8) {
if (datatype == GL_INT || datatype == GL_UNSIGNED_INT) {
return datatype;
} else if (format_red_bits <= 8) {
return GL_UNSIGNED_BYTE;
} else if (ctx->DrawBuffer->Visual.redBits <= 16) {
} else if (format_red_bits <= 16) {
return GL_UNSIGNED_SHORT;
} else {
GLenum datatype = _mesa_get_format_datatype(format);
if (datatype == GL_INT || datatype == GL_UNSIGNED_INT)
return datatype;
return GL_FLOAT;
}
return GL_FLOAT;
case GL_DEPTH_COMPONENT: {
GLenum datatype = _mesa_get_format_datatype(format);
if (datatype == GL_FLOAT)
return GL_FLOAT;
else

3
dist/Mesa/src/mesa/drivers/dri/i915/intel_screen.c vendored
View File

@ -1152,7 +1152,8 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
{
struct intel_screen *intelScreen;
if (psp->dri2.loader->base.version <= 2 ||
if (psp->image.loader) {
} else if (psp->dri2.loader->base.version <= 2 ||
psp->dri2.loader->getBuffersWithFormat == NULL) {
fprintf(stderr,
"\nERROR! DRI2 loader with getBuffersWithFormat() "

6
dist/Mesa/src/mesa/drivers/dri/i965/brw_clip_unfilled.c vendored
View File

@ -197,7 +197,7 @@ static void compute_offset( struct brw_clip_compile *c )
struct brw_reg dir = c->reg.dir;
brw_math_invert(p, get_element(off, 2), get_element(dir, 2));
brw_MUL(p, vec2(off), dir, get_element(off, 2));
brw_MUL(p, vec2(off), vec2(dir), get_element(off, 2));
brw_CMP(p,
vec1(brw_null_reg()),
@ -208,8 +208,8 @@ static void compute_offset( struct brw_clip_compile *c )
brw_SEL(p, vec1(off), brw_abs(get_element(off, 0)), brw_abs(get_element(off, 1)));
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
brw_MUL(p, vec1(off), off, brw_imm_f(c->key.offset_factor));
brw_ADD(p, vec1(off), off, brw_imm_f(c->key.offset_units));
brw_MUL(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_factor));
brw_ADD(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_units));
}

10
dist/Mesa/src/mesa/drivers/dri/i965/brw_defines.h vendored
View File

@ -580,6 +580,16 @@
#define GEN7_SURFACE_MCS_ENABLE (1 << 0)
#define GEN7_SURFACE_MCS_PITCH_SHIFT 3
#define GEN7_SURFACE_MCS_PITCH_MASK INTEL_MASK(11, 3)
#define GEN8_SURFACE_AUX_QPITCH_SHIFT 16
#define GEN8_SURFACE_AUX_QPITCH_MASK INTEL_MASK(30, 16)
#define GEN8_SURFACE_AUX_PITCH_SHIFT 3
#define GEN8_SURFACE_AUX_PITCH_MASK INTEL_MASK(11, 3)
#define GEN8_SURFACE_AUX_MODE_MASK INTEL_MASK(2, 0)
#define GEN8_SURFACE_AUX_MODE_NONE 0
#define GEN8_SURFACE_AUX_MODE_MCS 1
#define GEN8_SURFACE_AUX_MODE_APPEND 2
#define GEN8_SURFACE_AUX_MODE_HIZ 3
/* Surface state DW7 */
#define GEN7_SURFACE_CLEAR_COLOR_SHIFT 28

39
dist/Mesa/src/mesa/drivers/dri/i965/brw_fs.cpp vendored
View File

@ -1263,19 +1263,21 @@ fs_visitor::emit_samplepos_setup(ir_variable *ir)
stride(retype(brw_vec1_grf(c->sample_pos_reg, 0),
BRW_REGISTER_TYPE_B), 16, 8, 2);
emit(MOV(int_sample_x, fs_reg(sample_pos_reg)));
fs_inst *inst = emit(MOV(int_sample_x, fs_reg(sample_pos_reg)));
if (dispatch_width == 16) {
fs_inst *inst = emit(MOV(half(int_sample_x, 1),
fs_reg(suboffset(sample_pos_reg, 16))));
inst->force_uncompressed = true;
inst = emit(MOV(half(int_sample_x, 1),
fs_reg(suboffset(sample_pos_reg, 16))));
inst->force_sechalf = true;
}
/* Compute gl_SamplePosition.x */
compute_sample_position(pos, int_sample_x);
pos.reg_offset++;
emit(MOV(int_sample_y, fs_reg(suboffset(sample_pos_reg, 1))));
inst = emit(MOV(int_sample_y, fs_reg(suboffset(sample_pos_reg, 1))));
if (dispatch_width == 16) {
fs_inst *inst = emit(MOV(half(int_sample_y, 1),
fs_reg(suboffset(sample_pos_reg, 17))));
inst->force_uncompressed = true;
inst = emit(MOV(half(int_sample_y, 1),
fs_reg(suboffset(sample_pos_reg, 17))));
inst->force_sechalf = true;
}
/* Compute gl_SamplePosition.y */
@ -1309,13 +1311,22 @@ fs_visitor::emit_sampleid_setup(ir_variable *ir)
* populating a temporary variable with the sequence (0, 1, 2, 3),
* and then reading from it using vstride=1, width=4, hstride=0.
* These computations hold good for 4x multisampling as well.
*
* For 2x MSAA and SIMD16, we want to use the sequence (0, 1, 0, 1):
* the first four slots are sample 0 of subspan 0; the next four
* are sample 1 of subspan 0; the third group is sample 0 of
* subspan 1, and finally sample 1 of subspan 1.
*/
emit(BRW_OPCODE_AND, t1,
fs_reg(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_D)),
fs_reg(brw_imm_d(0xc0)));
emit(BRW_OPCODE_SHR, t1, t1, fs_reg(5));
fs_inst *inst;
inst = emit(BRW_OPCODE_AND, t1,
fs_reg(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UD)),
fs_reg(0xc0));
inst->force_writemask_all = true;
inst = emit(BRW_OPCODE_SHR, t1, t1, fs_reg(5));
inst->force_writemask_all = true;
/* This works for both SIMD8 and SIMD16 */
emit(MOV(t2, brw_imm_v(0x3210)));
inst = emit(MOV(t2, brw_imm_v(c->key.persample_2x ? 0x1010 : 0x3210)));
inst->force_writemask_all = true;
/* This special instruction takes care of setting vstride=1,
* width=4, hstride=0 of t2 during an ADD instruction.
*/
@ -1393,7 +1404,7 @@ fs_visitor::emit_math(enum opcode opcode, fs_reg dst, fs_reg src)
* Gen 6 hardware ignores source modifiers (negate and abs) on math
* instructions, so we also move to a temp to set those up.
*/
if (brw->gen >= 6)
if (brw->gen == 6 || brw->gen == 7)
src = fix_math_operand(src);
fs_inst *inst = emit(opcode, dst, src);
@ -1425,7 +1436,9 @@ fs_visitor::emit_math(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1)
return NULL;
}
if (brw->gen >= 6) {
if (brw->gen >= 8) {
inst = emit(opcode, dst, src0, src1);
} else if (brw->gen >= 6) {
src0 = fix_math_operand(src0);
src1 = fix_math_operand(src1);

1
dist/Mesa/src/mesa/drivers/dri/i965/brw_fs.h vendored
View File

@ -368,7 +368,6 @@ public:
bool opt_cse_local(bblock_t *block, exec_list *aeb);
bool opt_copy_propagate();
bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
exec_list *acp);
void opt_drop_redundant_mov_to_flags();

12
dist/Mesa/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp vendored
View File

@ -1533,7 +1533,7 @@ fs_visitor::rescale_texcoord(ir_texture *ir, fs_reg coordinate,
fs_reg chan = coordinate;
chan.reg_offset += i;
inst = emit(BRW_OPCODE_SEL, chan, chan, brw_imm_f(0.0));
inst = emit(BRW_OPCODE_SEL, chan, chan, fs_reg(0.0f));
inst->conditional_mod = BRW_CONDITIONAL_G;
/* Our parameter comes in as 1.0/width or 1.0/height,
@ -1588,9 +1588,9 @@ fs_visitor::emit_mcs_fetch(ir_texture *ir, fs_reg coordinate, int sampler)
inst->base_mrf = -1;
inst->mlen = next.reg_offset * reg_width;
inst->header_present = false;
inst->regs_written = 4 * reg_width; /* we only care about one reg of response,
* but the sampler always writes 4/8
*/
inst->regs_written = 4; /* we only care about one reg of response,
* but the sampler always writes 4/8
*/
inst->sampler = sampler;
return dest;
@ -2396,7 +2396,7 @@ fs_visitor::emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
unsigned mlen = 0;
/* Initialize the sample mask in the message header. */
emit(MOV(brw_uvec_mrf(8, mlen, 0), brw_imm_ud(0)))
emit(MOV(brw_uvec_mrf(8, mlen, 0), fs_reg(0u)))
->force_writemask_all = true;
if (fp->UsesKill) {
@ -2442,7 +2442,7 @@ fs_visitor::emit_untyped_surface_read(unsigned surf_index, fs_reg dst,
unsigned mlen = 0;
/* Initialize the sample mask in the message header. */
emit(MOV(brw_uvec_mrf(8, mlen, 0), brw_imm_ud(0)))
emit(MOV(brw_uvec_mrf(8, mlen, 0), fs_reg(0u)))
->force_writemask_all = true;
if (fp->UsesKill) {

6
dist/Mesa/src/mesa/drivers/dri/i965/brw_wm.c vendored
View File

@ -280,6 +280,10 @@ brw_wm_debug_recompile(struct brw_context *brw,
old_key->stats_wm, key->stats_wm);
found |= key_debug(brw, "flat shading",
old_key->flat_shade, key->flat_shade);
found |= key_debug(brw, "per-sample shading",
old_key->persample_shading, key->persample_shading);
found |= key_debug(brw, "per-sample shading and 2x MSAA",
old_key->persample_2x, key->persample_2x);
found |= key_debug(brw, "number of color buffers",
old_key->nr_color_regions, key->nr_color_regions);
found |= key_debug(brw, "MRT alpha test or alpha-to-coverage",
@ -525,6 +529,8 @@ static void brw_wm_populate_key( struct brw_context *brw,
/* Ignore sample qualifier while computing this flag. */
key->persample_shading =
_mesa_get_min_invocations_per_fragment(ctx, &fp->program, true) > 1;
if (key->persample_shading)
key->persample_2x = ctx->DrawBuffer->Visual.samples == 2;
key->compute_pos_offset =
_mesa_get_min_invocations_per_fragment(ctx, &fp->program, false) > 1 &&

1
dist/Mesa/src/mesa/drivers/dri/i965/brw_wm.h vendored
View File

@ -62,6 +62,7 @@ struct brw_wm_prog_key {
GLuint stats_wm:1;
GLuint flat_shade:1;
GLuint persample_shading:1;
GLuint persample_2x:1;
GLuint nr_color_regions:5;
GLuint replicate_alpha:1;
GLuint render_to_fbo:1;

37
dist/Mesa/src/mesa/drivers/dri/i965/intel_mipmap_tree.c vendored
View File

@ -67,14 +67,6 @@ compute_msaa_layout(struct brw_context *brw, mesa_format format, GLenum target)
case GL_DEPTH_STENCIL:
return INTEL_MSAA_LAYOUT_IMS;
default:
/* Disable MCS on Broadwell for now. We can enable it once things
* are working without it.
*/
if (brw->gen >= 8) {
perf_debug("Missing CMS support on Broadwell.\n");
return INTEL_MSAA_LAYOUT_UMS;
}
/* From the Ivy Bridge PRM, Vol4 Part1 p77 ("MCS Enable"):
*
* This field must be set to 0 for all SINT MSRTs when all RT channels
@ -86,9 +78,7 @@ compute_msaa_layout(struct brw_context *brw, mesa_format format, GLenum target)
* would require converting between CMS and UMS MSAA layouts on the fly,
* which is expensive.
*/
if (_mesa_get_format_datatype(format) == GL_INT) {
/* TODO: is this workaround needed for future chipsets? */
assert(brw->gen == 7);
if (brw->gen == 7 && _mesa_get_format_datatype(format) == GL_INT) {
return INTEL_MSAA_LAYOUT_UMS;
} else {
return INTEL_MSAA_LAYOUT_CMS;
@ -252,6 +242,26 @@ intel_miptree_create_layout(struct brw_context *brw,
_mesa_get_format_name(format),
first_level, last_level, depth0, mt);
if (target == GL_TEXTURE_1D_ARRAY) {
/* For a 1D Array texture the OpenGL API will treat the height0
* parameter as the number of array slices. For Intel hardware, we treat
* the 1D array as a 2D Array with a height of 1.
*
* So, when we first come through this path to create a 1D Array
* texture, height0 stores the number of slices, and depth0 is 1. In
* this case, we want to swap height0 and depth0.
*
* Since some miptrees will be created based on the base miptree, we may
* come through this path and see height0 as 1 and depth0 being the
* number of slices. In this case we don't need to do the swap.
*/
assert(height0 == 1 || depth0 == 1);
if (height0 > 1) {
depth0 = height0;
height0 = 1;
}
}
mt->target = target;
mt->format = format;
mt->first_level = first_level;
@ -1251,6 +1261,7 @@ intel_miptree_alloc_mcs(struct brw_context *brw,
*/
mesa_format format;
switch (num_samples) {
case 2:
case 4:
/* 8 bits/pixel are required for MCS data when using 4x MSAA (2 bits for
* each sample).
@ -2144,9 +2155,9 @@ intel_miptree_unmap_depthstencil(struct brw_context *brw,
x + s_image_x + map->x,
y + s_image_y + map->y,
brw->has_swizzling);
ptrdiff_t z_offset = ((y + z_image_y) *
ptrdiff_t z_offset = ((y + z_image_y + map->y) *
(z_mt->pitch / 4) +
(x + z_image_x));
(x + z_image_x + map->x));
if (map_z32f_x24s8) {
z_map[z_offset] = packed_map[(y * map->w + x) * 2 + 0];

1
dist/Mesa/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.c vendored
View File

@ -86,6 +86,7 @@ nouveau_bufferobj_data(struct gl_context *ctx, GLenum target, GLsizeiptrARB size
/* Free previous storage */
nouveau_bo_ref(NULL, &nbo->bo);
free(nbo->sys);
nbo->sys = NULL;
if (target == GL_ELEMENT_ARRAY_BUFFER_ARB ||
(size < 512 && usage == GL_DYNAMIC_DRAW_ARB) ||

1
dist/Mesa/src/mesa/drivers/dri/nouveau/nouveau_state.c vendored
View File

@ -492,6 +492,7 @@ nouveau_update_state(struct gl_context *ctx, GLbitfield new_state)
_swrast_InvalidateState(ctx, new_state);
_tnl_InvalidateState(ctx, new_state);
_vbo_InvalidateState(ctx, new_state);
nouveau_state_emit(ctx);
}

1
dist/Mesa/src/mesa/drivers/dri/r200/r200_context.c vendored
View File

@ -190,6 +190,7 @@ static void r200_init_vtbl(radeonContextPtr radeon)
radeon->vtbl.check_blit = r200_check_blit;
radeon->vtbl.blit = r200_blit;
radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
radeon->vtbl.revalidate_all_buffers = r200ValidateBuffers;
}

2
dist/Mesa/src/mesa/drivers/dri/r200/r200_state.c vendored
View File

@ -2210,7 +2210,7 @@ static void update_texturematrix( struct gl_context *ctx )
}
}
static GLboolean r200ValidateBuffers(struct gl_context *ctx)
GLboolean r200ValidateBuffers(struct gl_context *ctx)
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
struct radeon_renderbuffer *rrb;

1
dist/Mesa/src/mesa/drivers/dri/r200/r200_state.h vendored
View File

@ -47,6 +47,7 @@ extern void r200UpdateViewportOffset( struct gl_context *ctx );
extern void r200UpdateWindow( struct gl_context *ctx );
extern void r200UpdateDrawBuffer(struct gl_context *ctx);
extern GLboolean r200ValidateBuffers(struct gl_context *ctx);
extern GLboolean r200ValidateState( struct gl_context *ctx );
extern void r200_vtbl_update_scissor( struct gl_context *ctx );

14
dist/Mesa/src/mesa/drivers/dri/radeon/radeon_common.c vendored
View File

@ -532,17 +532,6 @@ static INLINE void radeonEmitAtoms(radeonContextPtr radeon, GLboolean emitAll)
COMMIT_BATCH();
}
static GLboolean radeon_revalidate_bos(struct gl_context *ctx)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
int ret;
ret = radeon_cs_space_check(radeon->cmdbuf.cs);
if (ret == RADEON_CS_SPACE_FLUSH)
return GL_FALSE;
return GL_TRUE;
}
void radeonEmitState(radeonContextPtr radeon)
{
radeon_print(RADEON_STATE, RADEON_NORMAL, "%s\n", __FUNCTION__);
@ -661,9 +650,8 @@ int rcommonFlushCmdBufLocked(radeonContextPtr rmesa, const char *caller)
radeon_cs_erase(rmesa->cmdbuf.cs);
rmesa->cmdbuf.flushing = 0;
if (radeon_revalidate_bos(&rmesa->glCtx) == GL_FALSE) {
if (!rmesa->vtbl.revalidate_all_buffers(&rmesa->glCtx))
fprintf(stderr,"failed to revalidate buffers\n");
}
return ret;
}

1
dist/Mesa/src/mesa/drivers/dri/radeon/radeon_common_context.h vendored
View File

@ -496,6 +496,7 @@ struct radeon_context {
unsigned reg_height,
unsigned flip_y);
unsigned (*is_format_renderable)(mesa_format mesa_format);
GLboolean (*revalidate_all_buffers)(struct gl_context *ctx);
} vtbl;
};

1
dist/Mesa/src/mesa/drivers/dri/radeon/radeon_context.c vendored
View File

@ -157,6 +157,7 @@ static void r100_init_vtbl(radeonContextPtr radeon)
radeon->vtbl.check_blit = r100_check_blit;
radeon->vtbl.blit = r100_blit;
radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
radeon->vtbl.revalidate_all_buffers = r100ValidateBuffers;
}
/* Create the device specific context.

2
dist/Mesa/src/mesa/drivers/dri/radeon/radeon_state.c vendored
View File

@ -1992,7 +1992,7 @@ static void update_texturematrix( struct gl_context *ctx )
}
}
static GLboolean r100ValidateBuffers(struct gl_context *ctx)
GLboolean r100ValidateBuffers(struct gl_context *ctx)
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
struct radeon_renderbuffer *rrb;

1
dist/Mesa/src/mesa/drivers/dri/radeon/radeon_state.h vendored
View File

@ -50,6 +50,7 @@ extern void radeonUpdateDrawBuffer( struct gl_context *ctx );
extern void radeonUploadTexMatrix( r100ContextPtr rmesa,
int unit, GLboolean swapcols );
extern GLboolean r100ValidateBuffers(struct gl_context *ctx);
extern GLboolean radeonValidateState( struct gl_context *ctx );

5
dist/Mesa/src/mesa/main/buffers.c vendored
View File

@ -494,10 +494,11 @@ _mesa_drawbuffers(struct gl_context *ctx, GLuint n, const GLenum *buffers,
}
/*
* If n==1, destMask[0] may have up to four bits set.
* destMask[0] may have up to four bits set
* (ex: glDrawBuffer(GL_FRONT_AND_BACK)).
* Otherwise, destMask[x] can only have one bit set.
*/
if (n == 1) {
if (n > 0 && _mesa_bitcount(destMask[0]) > 1) {
GLuint count = 0, destMask0 = destMask[0];
while (destMask0) {
GLint bufIndex = ffs(destMask0) - 1;

3
dist/Mesa/src/mesa/main/context.c vendored
View File

@ -1212,6 +1212,9 @@ _mesa_free_context_data( struct gl_context *ctx )
_mesa_reference_vertprog(ctx, &ctx->VertexProgram._Current, NULL);
_mesa_reference_vertprog(ctx, &ctx->VertexProgram._TnlProgram, NULL);
_mesa_reference_geomprog(ctx, &ctx->GeometryProgram.Current, NULL);
_mesa_reference_geomprog(ctx, &ctx->GeometryProgram._Current, NULL);
_mesa_reference_fragprog(ctx, &ctx->FragmentProgram.Current, NULL);
_mesa_reference_fragprog(ctx, &ctx->FragmentProgram._Current, NULL);
_mesa_reference_fragprog(ctx, &ctx->FragmentProgram._TexEnvProgram, NULL);

1
dist/Mesa/src/mesa/main/shared.c vendored
View File

@ -312,6 +312,7 @@ free_shared_state(struct gl_context *ctx, struct gl_shared_state *shared)
_mesa_DeleteHashTable(shared->Programs);
_mesa_reference_vertprog(ctx, &shared->DefaultVertexProgram, NULL);
_mesa_reference_geomprog(ctx, &shared->DefaultGeometryProgram, NULL);
_mesa_reference_fragprog(ctx, &shared->DefaultFragmentProgram, NULL);
_mesa_HashDeleteAll(shared->ATIShaders, delete_fragshader_cb, ctx);

105
dist/Mesa/src/mesa/main/teximage.c vendored
View File

@ -1779,9 +1779,9 @@ compressedteximage_only_format(const struct gl_context *ctx, GLenum format)
* Helper function to determine whether a target and specific compression
* format are supported.
*/
static GLboolean
target_can_be_compressed(const struct gl_context *ctx, GLenum target,
GLenum intFormat)
GLboolean
_mesa_target_can_be_compressed(const struct gl_context *ctx, GLenum target,
GLenum intFormat)
{
(void) intFormat; /* not used yet */
@ -1790,6 +1790,7 @@ target_can_be_compressed(const struct gl_context *ctx, GLenum target,
case GL_PROXY_TEXTURE_2D:
return GL_TRUE; /* true for any compressed format so far */
case GL_PROXY_TEXTURE_CUBE_MAP:
case GL_TEXTURE_CUBE_MAP:
case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
@ -2204,7 +2205,7 @@ texture_error_check( struct gl_context *ctx,
/* additional checks for compressed textures */
if (_mesa_is_compressed_format(ctx, internalFormat)) {
if (!target_can_be_compressed(ctx, target, internalFormat)) {
if (!_mesa_target_can_be_compressed(ctx, target, internalFormat)) {
_mesa_error(ctx, GL_INVALID_ENUM,
"glTexImage%dD(target can't be compressed)", dimensions);
return GL_TRUE;
@ -2260,9 +2261,16 @@ compressed_texture_error_check(struct gl_context *ctx, GLint dimensions,
GLenum error = GL_NO_ERROR;
char *reason = ""; /* no error */
if (!target_can_be_compressed(ctx, target, internalFormat)) {
if (!_mesa_target_can_be_compressed(ctx, target, internalFormat)) {
reason = "target";
error = GL_INVALID_ENUM;
/* From section 3.8.6, page 146 of OpenGL ES 3.0 spec:
*
* "The ETC2/EAC texture compression algorithm supports only
* two-dimensional images. If internalformat is an ETC2/EAC format,
* CompressedTexImage3D will generate an INVALID_OPERATION error if
* target is not TEXTURE_2D_ARRAY."
*/
error = _mesa_is_desktop_gl(ctx) ? GL_INVALID_ENUM : GL_INVALID_OPERATION;
goto error;
}
@ -2660,6 +2668,17 @@ copytexture_error_check( struct gl_context *ctx, GLuint dimensions,
"glCopyTexImage%dD(srgb usage mismatch)", dimensions);
return GL_TRUE;
}
/* Page 139, Table 3.15 of OpenGL ES 3.0 spec does not define ReadPixels
* types for SNORM formats. Also, conversion to SNORM formats is not
* allowed by Table 3.2 on Page 110.
*/
if(_mesa_is_enum_format_snorm(internalFormat)) {
_mesa_error(ctx, GL_INVALID_OPERATION,
"glCopyTexImage%dD(internalFormat=%s)", dimensions,
_mesa_lookup_enum_by_nr(internalFormat));
return GL_TRUE;
}
}
if (!_mesa_source_buffer_exists(ctx, baseFormat)) {
@ -2678,6 +2697,8 @@ copytexture_error_check( struct gl_context *ctx, GLuint dimensions,
if (_mesa_is_color_format(internalFormat)) {
bool is_int = _mesa_is_enum_format_integer(internalFormat);
bool is_rbint = _mesa_is_enum_format_integer(rb_internal_format);
bool is_unorm = _mesa_is_enum_format_unorm(internalFormat);
bool is_rbunorm = _mesa_is_enum_format_unorm(rb_internal_format);
if (is_int || is_rbint) {
if (is_int != is_rbint) {
_mesa_error(ctx, GL_INVALID_OPERATION,
@ -2691,10 +2712,23 @@ copytexture_error_check( struct gl_context *ctx, GLuint dimensions,
return GL_TRUE;
}
}
/* From page 138 of OpenGL ES 3.0 spec:
* "The error INVALID_OPERATION is generated if floating-point RGBA
* data is required; if signed integer RGBA data is required and the
* format of the current color buffer is not signed integer; if
* unsigned integer RGBA data is required and the format of the
* current color buffer is not unsigned integer; or if fixed-point
* RGBA data is required and the format of the current color buffer
* is not fixed-point.
*/
if (_mesa_is_gles(ctx) && is_unorm != is_rbunorm)
_mesa_error(ctx, GL_INVALID_OPERATION,
"glCopyTexImage%dD(unorm vs non-unorm)", dimensions);
}
if (_mesa_is_compressed_format(ctx, internalFormat)) {
if (!target_can_be_compressed(ctx, target, internalFormat)) {
if (!_mesa_target_can_be_compressed(ctx, target, internalFormat)) {
_mesa_error(ctx, GL_INVALID_ENUM,
"glCopyTexImage%dD(target)", dimensions);
return GL_TRUE;
@ -3564,6 +3598,28 @@ copytexsubimage_by_slice(struct gl_context *ctx,
}
}
static GLboolean
formats_differ_in_component_sizes (mesa_format f1,
mesa_format f2)
{
GLint f1_r_bits = _mesa_get_format_bits(f1, GL_RED_BITS);
GLint f1_g_bits = _mesa_get_format_bits(f1, GL_GREEN_BITS);
GLint f1_b_bits = _mesa_get_format_bits(f1, GL_BLUE_BITS);
GLint f1_a_bits = _mesa_get_format_bits(f1, GL_ALPHA_BITS);
GLint f2_r_bits = _mesa_get_format_bits(f2, GL_RED_BITS);
GLint f2_g_bits = _mesa_get_format_bits(f2, GL_GREEN_BITS);
GLint f2_b_bits = _mesa_get_format_bits(f2, GL_BLUE_BITS);
GLint f2_a_bits = _mesa_get_format_bits(f2, GL_ALPHA_BITS);
if ((f1_r_bits && f2_r_bits && f1_r_bits != f2_r_bits)
|| (f1_g_bits && f2_g_bits && f1_g_bits != f2_g_bits)
|| (f1_b_bits && f2_b_bits && f1_b_bits != f2_b_bits)
|| (f1_a_bits && f2_a_bits && f1_a_bits != f2_a_bits))
return GL_TRUE;
return GL_FALSE;
}
/**
* Implement the glCopyTexImage1/2D() functions.
@ -3577,6 +3633,7 @@ copyteximage(struct gl_context *ctx, GLuint dims,
struct gl_texture_image *texImage;
const GLuint face = _mesa_tex_target_to_face(target);
mesa_format texFormat;
struct gl_renderbuffer *rb;
FLUSH_VERTICES(ctx, 0);
@ -3606,6 +3663,40 @@ copyteximage(struct gl_context *ctx, GLuint dims,
texFormat = _mesa_choose_texture_format(ctx, texObj, target, level,
internalFormat, GL_NONE, GL_NONE);
rb = _mesa_get_read_renderbuffer_for_format(ctx, internalFormat);
if (_mesa_is_gles3(ctx)) {
if (_mesa_is_enum_format_unsized(internalFormat)) {
/* Conversion from GL_RGB10_A2 source buffer format is not allowed in
* OpenGL ES 3.0. Khronos bug# 9807.
*/
if (rb->InternalFormat == GL_RGB10_A2) {
_mesa_error(ctx, GL_INVALID_OPERATION,
"glCopyTexImage%uD(Reading from GL_RGB10_A2 buffer and"
" writing to unsized internal format)", dims);
return;
}
}
/* From Page 139 of OpenGL ES 3.0 spec:
* "If internalformat is sized, the internal format of the new texel
* array is internalformat, and this is also the new texel array’s
* effective internal format. If the component sizes of internalformat
* do not exactly match the corresponding component sizes of the source
* buffer’s effective internal format, described below, an
* INVALID_OPERATION error is generated. If internalformat is unsized,
* the internal format of the new texel array is the effective internal
* format of the source buffer, and this is also the new texel array’s
* effective internal format.
*/
else if (formats_differ_in_component_sizes (texFormat, rb->Format)) {
_mesa_error(ctx, GL_INVALID_OPERATION,
"glCopyTexImage%uD(componenet size changed in"
" internal format)", dims);
return;
}
}
assert(texFormat != MESA_FORMAT_NONE);
if (!ctx->Driver.TestProxyTexImage(ctx, proxy_target(target),

3
dist/Mesa/src/mesa/main/teximage.h vendored
View File

@ -123,6 +123,9 @@ _mesa_test_proxy_teximage(struct gl_context *ctx, GLenum target, GLint level,
mesa_format format,
GLint width, GLint height, GLint depth, GLint border);
extern GLboolean
_mesa_target_can_be_compressed(const struct gl_context *ctx, GLenum target,
GLenum intFormat);
extern GLuint
_mesa_tex_target_to_face(GLenum target);

22
dist/Mesa/src/mesa/main/texparam.c vendored
View File

@ -1051,6 +1051,7 @@ get_tex_level_parameter_image(struct gl_context *ctx,
GLenum pname, GLint *params)
{
const struct gl_texture_image *img = NULL;
struct gl_texture_image dummy_image;
mesa_format texFormat;
img = _mesa_select_tex_image(ctx, texObj, target, level);
@ -1062,12 +1063,12 @@ get_tex_level_parameter_image(struct gl_context *ctx,
* instead of 1. TEXTURE_COMPONENTS is deprecated; always
* use TEXTURE_INTERNAL_FORMAT."
*/
memset(&dummy_image, 0, sizeof(dummy_image));
dummy_image.TexFormat = MESA_FORMAT_NONE;
dummy_image.InternalFormat = GL_RGBA;
dummy_image._BaseFormat = GL_NONE;
if (pname == GL_TEXTURE_INTERNAL_FORMAT)
*params = GL_RGBA;
else
*params = 0;
return;
img = &dummy_image;
}
texFormat = img->TexFormat;
@ -1107,6 +1108,8 @@ get_tex_level_parameter_image(struct gl_context *ctx,
}
break;
case GL_TEXTURE_BORDER:
if (ctx->API != API_OPENGL_COMPAT)
goto invalid_pname;
*params = img->Border;
break;
case GL_TEXTURE_RED_SIZE:
@ -1120,6 +1123,8 @@ get_tex_level_parameter_image(struct gl_context *ctx,
break;
case GL_TEXTURE_INTENSITY_SIZE:
case GL_TEXTURE_LUMINANCE_SIZE:
if (ctx->API != API_OPENGL_COMPAT)
goto invalid_pname;
if (_mesa_base_format_has_channel(img->_BaseFormat, pname)) {
*params = _mesa_get_format_bits(texFormat, pname);
if (*params == 0) {
@ -1166,12 +1171,15 @@ get_tex_level_parameter_image(struct gl_context *ctx,
break;
/* GL_ARB_texture_float */
case GL_TEXTURE_LUMINANCE_TYPE_ARB:
case GL_TEXTURE_INTENSITY_TYPE_ARB:
if (ctx->API != API_OPENGL_COMPAT)
goto invalid_pname;
/* FALLTHROUGH */
case GL_TEXTURE_RED_TYPE_ARB:
case GL_TEXTURE_GREEN_TYPE_ARB:
case GL_TEXTURE_BLUE_TYPE_ARB:
case GL_TEXTURE_ALPHA_TYPE_ARB:
case GL_TEXTURE_LUMINANCE_TYPE_ARB:
case GL_TEXTURE_INTENSITY_TYPE_ARB:
case GL_TEXTURE_DEPTH_TYPE_ARB:
if (!ctx->Extensions.ARB_texture_float)
goto invalid_pname;

15
dist/Mesa/src/mesa/main/texstore.c vendored
View File

@ -3908,6 +3908,21 @@ _mesa_texstore_can_use_memcpy(struct gl_context *ctx,
return GL_FALSE;
}
/* Depth texture data needs clamping in following cases:
* - Floating point dstFormat with signed srcType: clamp to [0.0, 1.0].
* - Fixed point dstFormat with signed srcType: clamp to [0, 2^n -1].
*
* All the cases except one (float dstFormat with float srcType) are ruled
* out by _mesa_format_matches_format_and_type() check above. Handle the
* remaining case here.
*/
if ((baseInternalFormat == GL_DEPTH_COMPONENT ||
baseInternalFormat == GL_DEPTH_STENCIL) &&
(srcType == GL_FLOAT ||
srcType == GL_FLOAT_32_UNSIGNED_INT_24_8_REV)) {
return GL_FALSE;
}
return GL_TRUE;
}

3691
dist/Mesa/src/mesa/program/lex.yy.c vendored
View File

File diff suppressed because it is too large Load Diff

5404
dist/Mesa/src/mesa/program/program_parse.tab.c vendored
View File

File diff suppressed because it is too large Load Diff

211
dist/Mesa/src/mesa/program/program_parse.tab.h vendored
View File

@ -1,211 +0,0 @@
/* A Bison parser, made by GNU Bison 3.0.2. */
/* Bison interface for Yacc-like parsers in C
Copyright (C) 1984, 1989-1990, 2000-2013 Free Software Foundation, Inc.
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* As a special exception, you may create a larger work that contains
part or all of the Bison parser skeleton and distribute that work
under terms of your choice, so long as that work isn't itself a
parser generator using the skeleton or a modified version thereof
as a parser skeleton. Alternatively, if you modify or redistribute
the parser skeleton itself, you may (at your option) remove this
special exception, which will cause the skeleton and the resulting
Bison output files to be licensed under the GNU General Public
License without this special exception.
This special exception was added by the Free Software Foundation in
version 2.2 of Bison. */
#ifndef YY__MESA_PROGRAM_PROGRAM_PROGRAM_PARSE_TAB_H_INCLUDED
# define YY__MESA_PROGRAM_PROGRAM_PROGRAM_PARSE_TAB_H_INCLUDED
/* Debug traces. */
#ifndef YYDEBUG
# define YYDEBUG 0
#endif
#if YYDEBUG
extern int _mesa_program_debug;
#endif
/* Token type. */
#ifndef YYTOKENTYPE
# define YYTOKENTYPE
enum yytokentype
{
ARBvp_10 = 258,
ARBfp_10 = 259,
ADDRESS = 260,
ALIAS = 261,
ATTRIB = 262,
OPTION = 263,
OUTPUT = 264,
PARAM = 265,
TEMP = 266,
END = 267,
BIN_OP = 268,
BINSC_OP = 269,
SAMPLE_OP = 270,
SCALAR_OP = 271,
TRI_OP = 272,
VECTOR_OP = 273,
ARL = 274,
KIL = 275,
SWZ = 276,
TXD_OP = 277,
INTEGER = 278,
REAL = 279,
AMBIENT = 280,
ATTENUATION = 281,
BACK = 282,
CLIP = 283,
COLOR = 284,
DEPTH = 285,
DIFFUSE = 286,
DIRECTION = 287,
EMISSION = 288,
ENV = 289,
EYE = 290,
FOG = 291,
FOGCOORD = 292,
FRAGMENT = 293,
FRONT = 294,
HALF = 295,
INVERSE = 296,
INVTRANS = 297,
LIGHT = 298,
LIGHTMODEL = 299,
LIGHTPROD = 300,
LOCAL = 301,
MATERIAL = 302,
MAT_PROGRAM = 303,
MATRIX = 304,
MATRIXINDEX = 305,
MODELVIEW = 306,
MVP = 307,
NORMAL = 308,
OBJECT = 309,
PALETTE = 310,
PARAMS = 311,
PLANE = 312,
POINT_TOK = 313,
POINTSIZE = 314,
POSITION = 315,
PRIMARY = 316,
PROGRAM = 317,
PROJECTION = 318,
RANGE = 319,
RESULT = 320,
ROW = 321,
SCENECOLOR = 322,
SECONDARY = 323,
SHININESS = 324,
SIZE_TOK = 325,
SPECULAR = 326,
SPOT = 327,
STATE = 328,
TEXCOORD = 329,
TEXENV = 330,
TEXGEN = 331,
TEXGEN_Q = 332,
TEXGEN_R = 333,
TEXGEN_S = 334,
TEXGEN_T = 335,
TEXTURE = 336,
TRANSPOSE = 337,
TEXTURE_UNIT = 338,
TEX_1D = 339,
TEX_2D = 340,
TEX_3D = 341,
TEX_CUBE = 342,
TEX_RECT = 343,
TEX_SHADOW1D = 344,
TEX_SHADOW2D = 345,
TEX_SHADOWRECT = 346,
TEX_ARRAY1D = 347,
TEX_ARRAY2D = 348,
TEX_ARRAYSHADOW1D = 349,
TEX_ARRAYSHADOW2D = 350,
VERTEX = 351,
VTXATTRIB = 352,
WEIGHT = 353,
IDENTIFIER = 354,
USED_IDENTIFIER = 355,
MASK4 = 356,
MASK3 = 357,
MASK2 = 358,
MASK1 = 359,
SWIZZLE = 360,
DOT_DOT = 361,
DOT = 362
};
#endif
/* Value type. */
#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
typedef union YYSTYPE YYSTYPE;
union YYSTYPE
{
#line 124 "program/program_parse.y" /* yacc.c:1909 */
struct asm_instruction *inst;
struct asm_symbol *sym;
struct asm_symbol temp_sym;
struct asm_swizzle_mask swiz_mask;
struct asm_src_register src_reg;
struct prog_dst_register dst_reg;
struct prog_instruction temp_inst;
char *string;
unsigned result;
unsigned attrib;
int integer;
float real;
gl_state_index state[STATE_LENGTH];
int negate;
struct asm_vector vector;
gl_inst_opcode opcode;
struct {
unsigned swz;
unsigned rgba_valid:1;
unsigned xyzw_valid:1;
unsigned negate:1;
} ext_swizzle;
#line 188 "./program/program_parse.tab.h" /* yacc.c:1909 */
};
# define YYSTYPE_IS_TRIVIAL 1
# define YYSTYPE_IS_DECLARED 1
#endif
/* Location type. */
#if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED
typedef struct YYLTYPE YYLTYPE;
struct YYLTYPE
{
int first_line;
int first_column;
int last_line;
int last_column;
};
# define YYLTYPE_IS_DECLARED 1
# define YYLTYPE_IS_TRIVIAL 1
#endif
int _mesa_program_parse (struct asm_parser_state *state);
#endif /* !YY__MESA_PROGRAM_PROGRAM_PROGRAM_PARSE_TAB_H_INCLUDED */

2
dist/Mesa/src/mesa/state_tracker/st_cb_texture.c vendored
View File

@ -719,6 +719,8 @@ st_TexSubImage(struct gl_context *ctx, GLuint dims,
/* From now on, we need the gallium representation of dimensions. */
if (gl_target == GL_TEXTURE_1D_ARRAY) {
zoffset = yoffset;
yoffset = 0;
depth = height;
height = 1;
}

1
dist/Mesa/src/mesa/state_tracker/st_context.c vendored
View File

@ -307,6 +307,7 @@ void st_destroy_context( struct st_context *st )
cso_release_all(st->cso_context);
st_reference_fragprog(st, &st->fp, NULL);
st_reference_geomprog(st, &st->gp, NULL);
st_reference_vertprog(st, &st->vp, NULL);
/* release framebuffer surfaces */