2019-01-29 03:45:31 -07:00
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/*
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* Copyright © 2014-2018 Broadcom
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef _V3D_DRM_H_
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#define _V3D_DRM_H_
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#include "drm.h"
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#if defined(__cplusplus)
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extern "C" {
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#endif
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#define DRM_V3D_SUBMIT_CL 0x00
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#define DRM_V3D_WAIT_BO 0x01
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#define DRM_V3D_CREATE_BO 0x02
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#define DRM_V3D_MMAP_BO 0x03
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#define DRM_V3D_GET_PARAM 0x04
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#define DRM_V3D_GET_BO_OFFSET 0x05
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2019-05-22 22:22:53 -06:00
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#define DRM_V3D_SUBMIT_TFU 0x06
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2019-01-29 03:45:31 -07:00
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#define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)
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#define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)
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#define DRM_IOCTL_V3D_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo)
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#define DRM_IOCTL_V3D_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo)
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#define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param)
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#define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset)
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#define DRM_IOCTL_V3D_SUBMIT_TFU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu)
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2019-01-29 03:45:31 -07:00
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/**
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* struct drm_v3d_submit_cl - ioctl argument for submitting commands to the 3D
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* engine.
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*
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* This asks the kernel to have the GPU execute an optional binner
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* command list, and a render command list.
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2020-01-21 19:07:15 -07:00
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*
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* The L1T, slice, L2C, L2T, and GCA caches will be flushed before
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* each CL executes. The VCD cache should be flushed (if necessary)
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* by the submitted CLs. The TLB writes are guaranteed to have been
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* flushed by the time the render done IRQ happens, which is the
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* trigger for out_sync. Any dirtying of cachelines by the job (only
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* possible using TMU writes) must be flushed by the caller using the
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* CL's cache flush commands.
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2019-01-29 03:45:31 -07:00
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*/
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struct drm_v3d_submit_cl {
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/* Pointer to the binner command list.
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*
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* This is the first set of commands executed, which runs the
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* coordinate shader to determine where primitives land on the screen,
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* then writes out the state updates and draw calls necessary per tile
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* to the tile allocation BO.
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2019-05-22 22:22:53 -06:00
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*
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* This BCL will block on any previous BCL submitted on the
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* same FD, but not on any RCL or BCLs submitted by other
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* clients -- that is left up to the submitter to control
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* using in_sync_bcl if necessary.
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2019-01-29 03:45:31 -07:00
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*/
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__u32 bcl_start;
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/** End address of the BCL (first byte after the BCL) */
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__u32 bcl_end;
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/* Offset of the render command list.
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*
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* This is the second set of commands executed, which will either
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* execute the tiles that have been set up by the BCL, or a fixed set
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* of tiles (in the case of RCL-only blits).
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*
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* This RCL will block on this submit's BCL, and any previous
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* RCL submitted on the same FD, but not on any RCL or BCLs
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* submitted by other clients -- that is left up to the
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* submitter to control using in_sync_rcl if necessary.
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2019-01-29 03:45:31 -07:00
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*/
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__u32 rcl_start;
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/** End address of the RCL (first byte after the RCL) */
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__u32 rcl_end;
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/** An optional sync object to wait on before starting the BCL. */
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__u32 in_sync_bcl;
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/** An optional sync object to wait on before starting the RCL. */
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__u32 in_sync_rcl;
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/** An optional sync object to place the completion fence in. */
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__u32 out_sync;
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/* Offset of the tile alloc memory
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*
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* This is optional on V3D 3.3 (where the CL can set the value) but
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* required on V3D 4.1.
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*/
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__u32 qma;
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/** Size of the tile alloc memory. */
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__u32 qms;
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/** Offset of the tile state data array. */
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__u32 qts;
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/* Pointer to a u32 array of the BOs that are referenced by the job.
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*/
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__u64 bo_handles;
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/* Number of BO handles passed in (size is that times 4). */
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__u32 bo_handle_count;
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/* Pad, must be zero-filled. */
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__u32 pad;
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};
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/**
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* struct drm_v3d_wait_bo - ioctl argument for waiting for
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* completion of the last DRM_V3D_SUBMIT_CL on a BO.
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*
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* This is useful for cases where multiple processes might be
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* rendering to a BO and you want to wait for all rendering to be
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* completed.
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*/
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struct drm_v3d_wait_bo {
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__u32 handle;
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__u32 pad;
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__u64 timeout_ns;
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};
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/**
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* struct drm_v3d_create_bo - ioctl argument for creating V3D BOs.
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*
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* There are currently no values for the flags argument, but it may be
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* used in a future extension.
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*/
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struct drm_v3d_create_bo {
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__u32 size;
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__u32 flags;
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/** Returned GEM handle for the BO. */
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__u32 handle;
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/**
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* Returned offset for the BO in the V3D address space. This offset
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* is private to the DRM fd and is valid for the lifetime of the GEM
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* handle.
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*
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* This offset value will always be nonzero, since various HW
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* units treat 0 specially.
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*/
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__u32 offset;
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};
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/**
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* struct drm_v3d_mmap_bo - ioctl argument for mapping V3D BOs.
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*
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* This doesn't actually perform an mmap. Instead, it returns the
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* offset you need to use in an mmap on the DRM device node. This
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* means that tools like valgrind end up knowing about the mapped
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* memory.
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*
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* There are currently no values for the flags argument, but it may be
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* used in a future extension.
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*/
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struct drm_v3d_mmap_bo {
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/** Handle for the object being mapped. */
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__u32 handle;
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__u32 flags;
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/** offset into the drm node to use for subsequent mmap call. */
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__u64 offset;
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};
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enum drm_v3d_param {
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DRM_V3D_PARAM_V3D_UIFCFG,
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DRM_V3D_PARAM_V3D_HUB_IDENT1,
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DRM_V3D_PARAM_V3D_HUB_IDENT2,
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DRM_V3D_PARAM_V3D_HUB_IDENT3,
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DRM_V3D_PARAM_V3D_CORE0_IDENT0,
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DRM_V3D_PARAM_V3D_CORE0_IDENT1,
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DRM_V3D_PARAM_V3D_CORE0_IDENT2,
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DRM_V3D_PARAM_SUPPORTS_TFU,
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};
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struct drm_v3d_get_param {
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__u32 param;
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__u32 pad;
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__u64 value;
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};
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/**
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* Returns the offset for the BO in the V3D address space for this DRM fd.
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* This is the same value returned by drm_v3d_create_bo, if that was called
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* from this DRM fd.
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*/
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struct drm_v3d_get_bo_offset {
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__u32 handle;
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__u32 offset;
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};
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2019-05-22 22:22:53 -06:00
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struct drm_v3d_submit_tfu {
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__u32 icfg;
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__u32 iia;
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__u32 iis;
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__u32 ica;
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__u32 iua;
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__u32 ioa;
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__u32 ios;
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__u32 coef[4];
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/* First handle is the output BO, following are other inputs.
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* 0 for unused.
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*/
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__u32 bo_handles[4];
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/* sync object to block on before running the TFU job. Each TFU
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* job will execute in the order submitted to its FD. Synchronization
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* against rendering jobs requires using sync objects.
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*/
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__u32 in_sync;
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/* Sync object to signal when the TFU job is done. */
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__u32 out_sync;
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};
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2019-01-29 03:45:31 -07:00
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#if defined(__cplusplus)
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}
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#endif
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#endif /* _V3D_DRM_H_ */
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