606 lines
20 KiB
C
606 lines
20 KiB
C
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/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h,v 1.26 2003/11/06 18:37:58 tsi Exp $ */
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/*
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* Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
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* Precision Insight, Inc., Cedar Park, Texas, and
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* VA Linux Systems Inc., Fremont, California.
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*
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation on the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
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* SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/*
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* Authors:
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* Rickard E. Faith <faith@valinux.com>
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* Kevin E. Martin <martin@valinux.com>
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*
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*/
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#ifndef _R128_H_
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#define _R128_H_
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#include <unistd.h>
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#include "xf86str.h"
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/* PCI support */
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#include "xf86Pci.h"
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/* XAA and Cursor Support */
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#include "xaa.h"
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#include "xf86Cursor.h"
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/* DDC support */
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#include "xf86DDC.h"
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/* Xv support */
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#include "xf86xv.h"
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#include "r128_probe.h"
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/* DRI support */
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#ifdef XF86DRI
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#define _XF86DRI_SERVER_
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#include "r128_dripriv.h"
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#include "dri.h"
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#include "GL/glxint.h"
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#endif
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#define R128_DEBUG 0 /* Turn off debugging output */
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#define R128_IDLE_RETRY 32 /* Fall out of idle loops after this count */
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#define R128_TIMEOUT 2000000 /* Fall out of wait loops after this count */
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#define R128_MMIOSIZE 0x4000
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#define R128_VBIOS_SIZE 0x00010000
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#if R128_DEBUG
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#define R128TRACE(x) \
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do { \
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ErrorF("(**) %s(%d): ", R128_NAME, pScrn->scrnIndex); \
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ErrorF x; \
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} while (0);
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#else
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#define R128TRACE(x)
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#endif
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/* Other macros */
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#define R128_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
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#define R128_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1))
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#define R128PTR(pScrn) ((R128InfoPtr)(pScrn)->driverPrivate)
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typedef struct { /* All values in XCLKS */
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int ML; /* Memory Read Latency */
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int MB; /* Memory Burst Length */
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int Trcd; /* RAS to CAS delay */
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int Trp; /* RAS percentage */
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int Twr; /* Write Recovery */
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int CL; /* CAS Latency */
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int Tr2w; /* Read to Write Delay */
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int Rloop; /* Loop Latency */
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int Rloop_fudge; /* Add to ML to get Rloop */
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char *name;
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} R128RAMRec, *R128RAMPtr;
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typedef struct {
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/* Common registers */
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CARD32 ovr_clr;
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CARD32 ovr_wid_left_right;
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CARD32 ovr_wid_top_bottom;
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CARD32 ov0_scale_cntl;
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CARD32 mpp_tb_config;
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CARD32 mpp_gp_config;
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CARD32 subpic_cntl;
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CARD32 viph_control;
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CARD32 i2c_cntl_1;
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CARD32 gen_int_cntl;
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CARD32 cap0_trig_cntl;
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CARD32 cap1_trig_cntl;
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CARD32 bus_cntl;
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CARD32 config_cntl;
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/* Other registers to save for VT switches */
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CARD32 dp_datatype;
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CARD32 gen_reset_cntl;
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CARD32 clock_cntl_index;
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CARD32 amcgpio_en_reg;
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CARD32 amcgpio_mask;
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/* CRTC registers */
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CARD32 crtc_gen_cntl;
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CARD32 crtc_ext_cntl;
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CARD32 dac_cntl;
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CARD32 crtc_h_total_disp;
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CARD32 crtc_h_sync_strt_wid;
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CARD32 crtc_v_total_disp;
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CARD32 crtc_v_sync_strt_wid;
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CARD32 crtc_offset;
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CARD32 crtc_offset_cntl;
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CARD32 crtc_pitch;
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/* CRTC2 registers */
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CARD32 crtc2_gen_cntl;
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CARD32 crtc2_h_total_disp;
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CARD32 crtc2_h_sync_strt_wid;
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CARD32 crtc2_v_total_disp;
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CARD32 crtc2_v_sync_strt_wid;
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CARD32 crtc2_offset;
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CARD32 crtc2_offset_cntl;
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CARD32 crtc2_pitch;
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/* Flat panel registers */
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CARD32 fp_crtc_h_total_disp;
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CARD32 fp_crtc_v_total_disp;
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CARD32 fp_gen_cntl;
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CARD32 fp_h_sync_strt_wid;
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CARD32 fp_horz_stretch;
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CARD32 fp_panel_cntl;
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CARD32 fp_v_sync_strt_wid;
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CARD32 fp_vert_stretch;
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CARD32 lvds_gen_cntl;
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CARD32 tmds_crc;
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CARD32 tmds_transmitter_cntl;
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/* Computed values for PLL */
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CARD32 dot_clock_freq;
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CARD32 pll_output_freq;
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int feedback_div;
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int post_div;
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/* PLL registers */
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CARD32 ppll_ref_div;
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CARD32 ppll_div_3;
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CARD32 htotal_cntl;
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/* Computed values for PLL2 */
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CARD32 dot_clock_freq_2;
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CARD32 pll_output_freq_2;
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int feedback_div_2;
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int post_div_2;
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/* PLL2 registers */
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CARD32 p2pll_ref_div;
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CARD32 p2pll_div_0;
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CARD32 htotal_cntl2;
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/* DDA register */
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CARD32 dda_config;
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CARD32 dda_on_off;
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/* DDA2 register */
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CARD32 dda2_config;
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CARD32 dda2_on_off;
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/* Pallet */
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Bool palette_valid;
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CARD32 palette[256];
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CARD32 palette2[256];
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} R128SaveRec, *R128SavePtr;
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typedef struct {
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CARD16 reference_freq;
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CARD16 reference_div;
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unsigned min_pll_freq;
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unsigned max_pll_freq;
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CARD16 xclk;
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} R128PLLRec, *R128PLLPtr;
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typedef struct {
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int bitsPerPixel;
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int depth;
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int displayWidth;
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int pixel_code;
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int pixel_bytes;
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DisplayModePtr mode;
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} R128FBLayout;
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typedef enum
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{
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MT_NONE,
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MT_CRT,
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MT_LCD,
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MT_DFP,
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MT_CTV,
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MT_STV
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} R128MonitorType;
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typedef struct {
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EntityInfoPtr pEnt;
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pciVideoPtr PciInfo;
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PCITAG PciTag;
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int Chipset;
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Bool Primary;
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Bool FBDev;
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unsigned long LinearAddr; /* Frame buffer physical address */
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unsigned long MMIOAddr; /* MMIO region physical address */
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unsigned long BIOSAddr; /* BIOS physical address */
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unsigned char *MMIO; /* Map of MMIO region */
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unsigned char *FB; /* Map of frame buffer */
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CARD32 MemCntl;
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CARD32 BusCntl;
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unsigned long FbMapSize; /* Size of frame buffer, in bytes */
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int Flags; /* Saved copy of mode flags */
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CARD8 BIOSDisplay; /* Device the BIOS is set to display to */
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Bool HasPanelRegs; /* Current chip can connect to a FP */
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CARD8 *VBIOS; /* Video BIOS for mode validation on FPs */
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int FPBIOSstart; /* Start of the flat panel info */
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/* Computed values for FPs */
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int PanelXRes;
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int PanelYRes;
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int HOverPlus;
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int HSyncWidth;
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int HBlank;
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int VOverPlus;
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int VSyncWidth;
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int VBlank;
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int PanelPwrDly;
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R128PLLRec pll;
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R128RAMPtr ram;
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R128SaveRec SavedReg; /* Original (text) mode */
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R128SaveRec ModeReg; /* Current mode */
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Bool (*CloseScreen)(int, ScreenPtr);
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void (*BlockHandler)(int, pointer, pointer, pointer);
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Bool PaletteSavedOnVT; /* Palette saved on last VT switch */
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XAAInfoRecPtr accel;
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Bool accelOn;
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xf86CursorInfoPtr cursor;
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unsigned long cursor_start;
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unsigned long cursor_end;
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/*
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* XAAForceTransBlit is used to change the behavior of the XAA
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* SetupForScreenToScreenCopy function, to make it DGA-friendly.
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*/
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Bool XAAForceTransBlit;
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int fifo_slots; /* Free slots in the FIFO (64 max) */
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int pix24bpp; /* Depth of pixmap for 24bpp framebuffer */
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Bool dac6bits; /* Use 6 bit DAC? */
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/* Computed values for Rage 128 */
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int pitch;
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int datatype;
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CARD32 dp_gui_master_cntl;
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/* Saved values for ScreenToScreenCopy */
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int xdir;
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int ydir;
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/* ScanlineScreenToScreenColorExpand support */
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unsigned char *scratch_buffer[1];
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unsigned char *scratch_save;
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int scanline_x;
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int scanline_y;
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int scanline_w;
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int scanline_h;
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#ifdef XF86DRI
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int scanline_hpass;
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int scanline_x1clip;
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int scanline_x2clip;
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int scanline_rop;
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int scanline_fg;
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int scanline_bg;
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#endif /* XF86DRI */
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int scanline_words;
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int scanline_direct;
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int scanline_bpp; /* Only used for ImageWrite */
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DGAModePtr DGAModes;
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int numDGAModes;
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Bool DGAactive;
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int DGAViewportStatus;
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DGAFunctionRec DGAFuncs;
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R128FBLayout CurrentLayout;
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#ifdef XF86DRI
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Bool directRenderingEnabled;
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DRIInfoPtr pDRIInfo;
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int drmFD;
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drm_context_t drmCtx;
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int numVisualConfigs;
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__GLXvisualConfig *pVisualConfigs;
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R128ConfigPrivPtr pVisualConfigsPriv;
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drm_handle_t fbHandle;
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drmSize registerSize;
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drm_handle_t registerHandle;
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Bool IsPCI; /* Current card is a PCI card */
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drmSize pciSize;
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drm_handle_t pciMemHandle;
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drmAddress PCI; /* Map */
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Bool allowPageFlip; /* Enable 3d page flipping */
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Bool have3DWindows; /* Are there any 3d clients? */
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int drmMinor;
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drmSize agpSize;
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drm_handle_t agpMemHandle; /* Handle from drmAgpAlloc */
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unsigned long agpOffset;
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drmAddress AGP; /* Map */
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int agpMode;
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Bool CCEInUse; /* CCE is currently active */
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int CCEMode; /* CCE mode that server/clients use */
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int CCEFifoSize; /* Size of the CCE command FIFO */
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Bool CCESecure; /* CCE security enabled */
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int CCEusecTimeout; /* CCE timeout in usecs */
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/* CCE ring buffer data */
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unsigned long ringStart; /* Offset into AGP space */
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drm_handle_t ringHandle; /* Handle from drmAddMap */
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drmSize ringMapSize; /* Size of map */
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int ringSize; /* Size of ring (in MB) */
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drmAddress ring; /* Map */
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int ringSizeLog2QW;
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unsigned long ringReadOffset; /* Offset into AGP space */
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drm_handle_t ringReadPtrHandle; /* Handle from drmAddMap */
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drmSize ringReadMapSize; /* Size of map */
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drmAddress ringReadPtr; /* Map */
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/* CCE vertex/indirect buffer data */
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unsigned long bufStart; /* Offset into AGP space */
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drm_handle_t bufHandle; /* Handle from drmAddMap */
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drmSize bufMapSize; /* Size of map */
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int bufSize; /* Size of buffers (in MB) */
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drmAddress buf; /* Map */
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int bufNumBufs; /* Number of buffers */
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drmBufMapPtr buffers; /* Buffer map */
|
||
|
|
|
||
|
|
/* CCE AGP Texture data */
|
||
|
|
unsigned long agpTexStart; /* Offset into AGP space */
|
||
|
|
drm_handle_t agpTexHandle; /* Handle from drmAddMap */
|
||
|
|
drmSize agpTexMapSize; /* Size of map */
|
||
|
|
int agpTexSize; /* Size of AGP tex space (in MB) */
|
||
|
|
drmAddress agpTex; /* Map */
|
||
|
|
int log2AGPTexGran;
|
||
|
|
|
||
|
|
/* CCE 2D accleration */
|
||
|
|
drmBufPtr indirectBuffer;
|
||
|
|
int indirectStart;
|
||
|
|
|
||
|
|
/* DRI screen private data */
|
||
|
|
int fbX;
|
||
|
|
int fbY;
|
||
|
|
int backX;
|
||
|
|
int backY;
|
||
|
|
int depthX;
|
||
|
|
int depthY;
|
||
|
|
|
||
|
|
int frontOffset;
|
||
|
|
int frontPitch;
|
||
|
|
int backOffset;
|
||
|
|
int backPitch;
|
||
|
|
int depthOffset;
|
||
|
|
int depthPitch;
|
||
|
|
int spanOffset;
|
||
|
|
int textureOffset;
|
||
|
|
int textureSize;
|
||
|
|
int log2TexGran;
|
||
|
|
|
||
|
|
/* Saved scissor values */
|
||
|
|
CARD32 sc_left;
|
||
|
|
CARD32 sc_right;
|
||
|
|
CARD32 sc_top;
|
||
|
|
CARD32 sc_bottom;
|
||
|
|
|
||
|
|
CARD32 re_top_left;
|
||
|
|
CARD32 re_width_height;
|
||
|
|
|
||
|
|
CARD32 aux_sc_cntl;
|
||
|
|
|
||
|
|
int irq;
|
||
|
|
CARD32 gen_int_cntl;
|
||
|
|
|
||
|
|
Bool DMAForXv;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
XF86VideoAdaptorPtr adaptor;
|
||
|
|
void (*VideoTimerCallback)(ScrnInfoPtr, Time);
|
||
|
|
int videoKey;
|
||
|
|
Bool showCache;
|
||
|
|
OptionInfoPtr Options;
|
||
|
|
|
||
|
|
Bool isDFP;
|
||
|
|
Bool isPro2;
|
||
|
|
I2CBusPtr pI2CBus;
|
||
|
|
CARD32 DDCReg;
|
||
|
|
|
||
|
|
Bool VGAAccess;
|
||
|
|
|
||
|
|
/****** Added for dualhead support *******************/
|
||
|
|
BOOL HasCRTC2; /* M3/M4 */
|
||
|
|
BOOL IsSecondary; /* second Screen */
|
||
|
|
BOOL IsPrimary; /* primary Screen */
|
||
|
|
BOOL UseCRT; /* force use CRT port as primary */
|
||
|
|
BOOL SwitchingMode;
|
||
|
|
R128MonitorType DisplayType; /* Monitor connected on*/
|
||
|
|
|
||
|
|
} R128InfoRec, *R128InfoPtr;
|
||
|
|
|
||
|
|
#define R128WaitForFifo(pScrn, entries) \
|
||
|
|
do { \
|
||
|
|
if (info->fifo_slots < entries) R128WaitForFifoFunction(pScrn, entries); \
|
||
|
|
info->fifo_slots -= entries; \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
extern R128EntPtr R128EntPriv(ScrnInfoPtr pScrn);
|
||
|
|
extern void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries);
|
||
|
|
extern void R128WaitForIdle(ScrnInfoPtr pScrn);
|
||
|
|
extern void R128EngineReset(ScrnInfoPtr pScrn);
|
||
|
|
extern void R128EngineFlush(ScrnInfoPtr pScrn);
|
||
|
|
|
||
|
|
extern unsigned R128INPLL(ScrnInfoPtr pScrn, int addr);
|
||
|
|
extern void R128WaitForVerticalSync(ScrnInfoPtr pScrn);
|
||
|
|
|
||
|
|
extern Bool R128AccelInit(ScreenPtr pScreen);
|
||
|
|
extern void R128EngineInit(ScrnInfoPtr pScrn);
|
||
|
|
extern Bool R128CursorInit(ScreenPtr pScreen);
|
||
|
|
extern Bool R128DGAInit(ScreenPtr pScreen);
|
||
|
|
|
||
|
|
extern int R128MinBits(int val);
|
||
|
|
|
||
|
|
extern void R128InitVideo(ScreenPtr pScreen);
|
||
|
|
|
||
|
|
#ifdef XF86DRI
|
||
|
|
extern Bool R128DRIScreenInit(ScreenPtr pScreen);
|
||
|
|
extern void R128DRICloseScreen(ScreenPtr pScreen);
|
||
|
|
extern Bool R128DRIFinishScreenInit(ScreenPtr pScreen);
|
||
|
|
|
||
|
|
#define R128CCE_START(pScrn, info) \
|
||
|
|
do { \
|
||
|
|
int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_START); \
|
||
|
|
if (_ret) { \
|
||
|
|
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
|
||
|
|
"%s: CCE start %d\n", __FUNCTION__, _ret); \
|
||
|
|
} \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define R128CCE_STOP(pScrn, info) \
|
||
|
|
do { \
|
||
|
|
int _ret = R128CCEStop(pScrn); \
|
||
|
|
if (_ret) { \
|
||
|
|
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
|
||
|
|
"%s: CCE stop %d\n", __FUNCTION__, _ret); \
|
||
|
|
} \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define R128CCE_RESET(pScrn, info) \
|
||
|
|
do { \
|
||
|
|
if (info->directRenderingEnabled \
|
||
|
|
&& R128CCE_USE_RING_BUFFER(info->CCEMode)) { \
|
||
|
|
int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_RESET); \
|
||
|
|
if (_ret) { \
|
||
|
|
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
|
||
|
|
"%s: CCE reset %d\n", __FUNCTION__, _ret); \
|
||
|
|
} \
|
||
|
|
} \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
extern drmBufPtr R128CCEGetBuffer(ScrnInfoPtr pScrn);
|
||
|
|
#endif
|
||
|
|
|
||
|
|
extern void R128CCEFlushIndirect(ScrnInfoPtr pScrn, int discard);
|
||
|
|
extern void R128CCEReleaseIndirect(ScrnInfoPtr pScrn);
|
||
|
|
extern void R128CCEWaitForIdle(ScrnInfoPtr pScrn);
|
||
|
|
extern int R128CCEStop(ScrnInfoPtr pScrn);
|
||
|
|
|
||
|
|
|
||
|
|
#define CCE_PACKET0( reg, n ) \
|
||
|
|
(R128_CCE_PACKET0 | ((n) << 16) | ((reg) >> 2))
|
||
|
|
#define CCE_PACKET1( reg0, reg1 ) \
|
||
|
|
(R128_CCE_PACKET1 | (((reg1) >> 2) << 11) | ((reg0) >> 2))
|
||
|
|
#define CCE_PACKET2() \
|
||
|
|
(R128_CCE_PACKET2)
|
||
|
|
#define CCE_PACKET3( pkt, n ) \
|
||
|
|
(R128_CCE_PACKET3 | (pkt) | ((n) << 16))
|
||
|
|
|
||
|
|
|
||
|
|
#define R128_VERBOSE 0
|
||
|
|
|
||
|
|
#define RING_LOCALS CARD32 *__head; int __count;
|
||
|
|
|
||
|
|
#define R128CCE_REFRESH(pScrn, info) \
|
||
|
|
do { \
|
||
|
|
if ( R128_VERBOSE ) { \
|
||
|
|
xf86DrvMsg( pScrn->scrnIndex, X_INFO, "REFRESH( %d ) in %s\n", \
|
||
|
|
!info->CCEInUse , __FUNCTION__ ); \
|
||
|
|
} \
|
||
|
|
if ( !info->CCEInUse ) { \
|
||
|
|
R128CCEWaitForIdle(pScrn); \
|
||
|
|
BEGIN_RING( 6 ); \
|
||
|
|
OUT_RING_REG( R128_RE_TOP_LEFT, info->re_top_left ); \
|
||
|
|
OUT_RING_REG( R128_RE_WIDTH_HEIGHT, info->re_width_height ); \
|
||
|
|
OUT_RING_REG( R128_AUX_SC_CNTL, info->aux_sc_cntl ); \
|
||
|
|
ADVANCE_RING(); \
|
||
|
|
info->CCEInUse = TRUE; \
|
||
|
|
} \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define BEGIN_RING( n ) do { \
|
||
|
|
if ( R128_VERBOSE ) { \
|
||
|
|
xf86DrvMsg( pScrn->scrnIndex, X_INFO, \
|
||
|
|
"BEGIN_RING( %d ) in %s\n", n, __FUNCTION__ ); \
|
||
|
|
} \
|
||
|
|
if ( !info->indirectBuffer ) { \
|
||
|
|
info->indirectBuffer = R128CCEGetBuffer( pScrn ); \
|
||
|
|
info->indirectStart = 0; \
|
||
|
|
} else if ( (info->indirectBuffer->used + 4*(n)) > \
|
||
|
|
info->indirectBuffer->total ) { \
|
||
|
|
R128CCEFlushIndirect( pScrn, 1 ); \
|
||
|
|
} \
|
||
|
|
__head = (pointer)((char *)info->indirectBuffer->address + \
|
||
|
|
info->indirectBuffer->used); \
|
||
|
|
__count = 0; \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define ADVANCE_RING() do { \
|
||
|
|
if ( R128_VERBOSE ) { \
|
||
|
|
xf86DrvMsg( pScrn->scrnIndex, X_INFO, \
|
||
|
|
"ADVANCE_RING() used: %d+%d=%d/%d\n", \
|
||
|
|
info->indirectBuffer->used - info->indirectStart, \
|
||
|
|
__count * (int)sizeof(CARD32), \
|
||
|
|
info->indirectBuffer->used - info->indirectStart + \
|
||
|
|
__count * (int)sizeof(CARD32), \
|
||
|
|
info->indirectBuffer->total - info->indirectStart ); \
|
||
|
|
} \
|
||
|
|
info->indirectBuffer->used += __count * (int)sizeof(CARD32); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define OUT_RING( x ) do { \
|
||
|
|
if ( R128_VERBOSE ) { \
|
||
|
|
xf86DrvMsg( pScrn->scrnIndex, X_INFO, \
|
||
|
|
" OUT_RING( 0x%08x )\n", (unsigned int)(x) ); \
|
||
|
|
} \
|
||
|
|
MMIO_OUT32(&__head[__count++], 0, (x)); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define OUT_RING_REG( reg, val ) \
|
||
|
|
do { \
|
||
|
|
OUT_RING( CCE_PACKET0( reg, 0 ) ); \
|
||
|
|
OUT_RING( val ); \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#define FLUSH_RING() \
|
||
|
|
do { \
|
||
|
|
if ( R128_VERBOSE ) \
|
||
|
|
xf86DrvMsg( pScrn->scrnIndex, X_INFO, \
|
||
|
|
"FLUSH_RING in %s\n", __FUNCTION__ ); \
|
||
|
|
if ( info->indirectBuffer ) { \
|
||
|
|
R128CCEFlushIndirect( pScrn, 0 ); \
|
||
|
|
} \
|
||
|
|
} while (0)
|
||
|
|
|
||
|
|
#endif
|