70 lines
1.7 KiB
Plaintext
70 lines
1.7 KiB
Plaintext
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NM2160 Register GUESS
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--- Overlay and ZV capture ---
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2002,2.3.
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1. Overlay
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GRB0 bit5 Format; 0:YUY2/1:RGB
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bit1 1
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bit0 Enable overlay ; 1:enable/0:disable
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GRB1 bit7:4 X2[11:8]
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bit3:0 X1[11:8]
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GRB2 X1[7:0]
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GRB3 X2[7:0]
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GRB4 bit7:4 Y2[11:8]
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bit3:0 Y1[11:8]
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GRB5 Y1[7:0]
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GRB6 Y2[7:0]
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GRB7 VRAM offset[24:17]
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GRB8 VRAM offset[16:9]
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GRB9 VRAM offset[8:1]
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GRBA Width in byte[15:8]
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GRBB Width in byte[7:0]
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GRBC 0x4f
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GRBD -
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GRBE -
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GRBF bit2 0:normal/1:mirror
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bit1:0 b'10'
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GRC0 X scale[15:8] ; x1.0 == 0x1000
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GRC1 X scale[7:0]
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GRC2 Y scale[15:8] ; x1.0 == 0x1000
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GRC3 Y scale[7:0]
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GRC4 brightness ; -128 to +127
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GRC5 Color key(R)
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GRC6 Color key(G) / Color key(8bpp)
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GRC7 Color key(B)
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2. ZV capture
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GR0A bit5 Enable extended SR reg. ; 1:enable/0:disable
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bit0 1
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SR08 bit7:1 b'1010000'
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bit0 Enable capture ; 1:enable/0:disable
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SR09 0x11
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SR0A 0x00
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SR0B -
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SR0C VRAM offset[8:1]
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SR0D VRAM offset[16:9]
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SR0E VRAM offset[24:17]
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SR0F -
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SR10 -
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SR11 -
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SR12 -
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SR13 -
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SR14 Y1[7:0]
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SR15 Y2[7:0]
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SR16 bit7:4 Y2[11:4]
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bit3:0 Y1[11:4]
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SR17 X1[7:0]
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SR18 X2[7:0]
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SR19 bit7:4 X2[11:8]
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bit3:0 X1[11:8]
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SR1A Width in byte[7:0]
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SR1B Width in byte[15:8]
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SR1C 0xfb
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SR1D 0x00
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SR1E 0xe2
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SR1F 0x02
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s.nomura@mba.nifty.ne.jp
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