2006-11-26 11:13:41 -07:00
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/*
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* Copyright 1998 by Alan Hourihane, Wigan, England.
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that
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* copyright notice and this permission notice appear in supporting
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* documentation, and that the name of Alan Hourihane not be used in
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* advertising or publicity pertaining to distribution of the software without
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* specific, written prior permission. Alan Hourihane makes no representations
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* about the suitability of this software for any purpose. It is provided
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* "as is" without express or implied warranty.
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*
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* ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*
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* Authors: Alan Hourihane, <alanh@fairlite.demon.co.uk>
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*
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* IBM RAMDAC routines.
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*/
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#ifdef HAVE_XORG_CONFIG_H
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#include <xorg-config.h>
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#endif
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#include "xf86.h"
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#include "xf86_OSproc.h"
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#include "xf86Cursor.h"
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#define INIT_IBM_RAMDAC_INFO
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#include "IBMPriv.h"
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#include "xf86RamDacPriv.h"
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#define INITIALFREQERR 100000
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unsigned long
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2012-06-10 07:21:05 -06:00
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IBMramdac640CalculateMNPCForClock(unsigned long RefClock, /* In 100Hz units */
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unsigned long ReqClock, /* In 100Hz units */
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char IsPixClock, /* boolean, is this the pixel or the sys clock */
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unsigned long MinClock, /* Min VCO rating */
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unsigned long MaxClock, /* Max VCO rating */
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unsigned long *rM, /* M Out */
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unsigned long *rN, /* N Out */
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unsigned long *rP, /* Min P In, P Out */
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unsigned long *rC /* C Out */
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)
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2006-11-26 11:13:41 -07:00
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{
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2012-06-10 07:21:05 -06:00
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unsigned long M, N, P, iP = *rP;
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unsigned long IntRef, VCO, Clock;
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long freqErr, lowestFreqErr = INITIALFREQERR;
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unsigned long ActualClock = 0;
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for (N = 0; N <= 63; N++) {
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IntRef = RefClock / (N + 1);
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if (IntRef < 10000)
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break; /* IntRef needs to be >= 1MHz */
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for (M = 2; M <= 127; M++) {
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VCO = IntRef * (M + 1);
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if ((VCO < MinClock) || (VCO > MaxClock))
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continue;
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for (P = iP; P <= 4; P++) {
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if (P != 0)
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Clock = (RefClock * (M + 1)) / ((N + 1) * 2 * P);
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else
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Clock = (RefClock * (M + 1)) / (N + 1);
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freqErr = (Clock - ReqClock);
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if (freqErr < 0) {
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/* PixelClock gets rounded up always so monitor reports
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correct frequency. */
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if (IsPixClock)
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continue;
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freqErr = -freqErr;
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}
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if (freqErr < lowestFreqErr) {
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*rM = M;
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*rN = N;
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*rP = P;
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*rC = (VCO <= 1280000 ? 1 : 2);
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ActualClock = Clock;
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lowestFreqErr = freqErr;
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/* Return if we found an exact match */
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if (freqErr == 0)
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return ActualClock;
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}
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}
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}
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2006-11-26 11:13:41 -07:00
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}
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2012-06-10 07:21:05 -06:00
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return ActualClock;
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2006-11-26 11:13:41 -07:00
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}
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unsigned long
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2012-06-10 07:21:05 -06:00
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IBMramdac526CalculateMNPCForClock(unsigned long RefClock, /* In 100Hz units */
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unsigned long ReqClock, /* In 100Hz units */
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char IsPixClock, /* boolean, is this the pixel or the sys clock */
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unsigned long MinClock, /* Min VCO rating */
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unsigned long MaxClock, /* Max VCO rating */
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unsigned long *rM, /* M Out */
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unsigned long *rN, /* N Out */
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unsigned long *rP, /* Min P In, P Out */
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unsigned long *rC /* C Out */
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)
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2006-11-26 11:13:41 -07:00
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{
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2012-06-10 07:21:05 -06:00
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unsigned long M, N, P, iP = *rP;
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unsigned long IntRef, VCO, Clock;
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long freqErr, lowestFreqErr = INITIALFREQERR;
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unsigned long ActualClock = 0;
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for (N = 0; N <= 63; N++) {
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IntRef = RefClock / (N + 1);
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if (IntRef < 10000)
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break; /* IntRef needs to be >= 1MHz */
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for (M = 0; M <= 63; M++) {
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VCO = IntRef * (M + 1);
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if ((VCO < MinClock) || (VCO > MaxClock))
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continue;
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for (P = iP; P <= 4; P++) {
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if (P)
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Clock = (RefClock * (M + 1)) / ((N + 1) * 2 * P);
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else
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Clock = VCO;
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freqErr = (Clock - ReqClock);
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if (freqErr < 0) {
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/* PixelClock gets rounded up always so monitor reports
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correct frequency. */
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if (IsPixClock)
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continue;
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freqErr = -freqErr;
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}
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if (freqErr < lowestFreqErr) {
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*rM = M;
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*rN = N;
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*rP = P;
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*rC = (VCO <= 1280000 ? 1 : 2);
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ActualClock = Clock;
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lowestFreqErr = freqErr;
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/* Return if we found an exact match */
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if (freqErr == 0)
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return ActualClock;
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}
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}
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}
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2006-11-26 11:13:41 -07:00
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}
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2012-06-10 07:21:05 -06:00
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return ActualClock;
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2006-11-26 11:13:41 -07:00
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}
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void
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IBMramdacRestore(ScrnInfoPtr pScrn, RamDacRecPtr ramdacPtr,
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2012-06-10 07:21:05 -06:00
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RamDacRegRecPtr ramdacReg)
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2006-11-26 11:13:41 -07:00
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{
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2012-06-10 07:21:05 -06:00
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int i, maxreg, dacreg;
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switch (ramdacPtr->RamDacType) {
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case IBM640_RAMDAC:
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maxreg = 0x300;
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dacreg = 1024;
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break;
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default:
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maxreg = 0x100;
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dacreg = 768;
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break;
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}
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/* Here we pass a short, so that we can evaluate a mask too */
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/* So that the mask is the high byte and the data the low byte */
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for (i = 0; i < maxreg; i++)
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(*ramdacPtr->WriteDAC)
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(pScrn, i, (ramdacReg->DacRegs[i] & 0xFF00) >> 8,
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ramdacReg->DacRegs[i]);
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(*ramdacPtr->WriteAddress) (pScrn, 0);
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for (i = 0; i < dacreg; i++)
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(*ramdacPtr->WriteData) (pScrn, ramdacReg->DAC[i]);
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2006-11-26 11:13:41 -07:00
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}
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void
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2012-06-10 07:21:05 -06:00
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IBMramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr ramdacPtr,
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RamDacRegRecPtr ramdacReg)
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2006-11-26 11:13:41 -07:00
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{
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2012-06-10 07:21:05 -06:00
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int i, maxreg, dacreg;
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switch (ramdacPtr->RamDacType) {
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case IBM640_RAMDAC:
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maxreg = 0x300;
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dacreg = 1024;
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break;
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default:
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maxreg = 0x100;
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dacreg = 768;
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break;
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}
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(*ramdacPtr->ReadAddress) (pScrn, 0);
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for (i = 0; i < dacreg; i++)
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ramdacReg->DAC[i] = (*ramdacPtr->ReadData) (pScrn);
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for (i = 0; i < maxreg; i++)
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ramdacReg->DacRegs[i] = (*ramdacPtr->ReadDAC) (pScrn, i);
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2006-11-26 11:13:41 -07:00
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}
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RamDacHelperRecPtr
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2012-06-10 07:21:05 -06:00
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IBMramdacProbe(ScrnInfoPtr pScrn,
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RamDacSupportedInfoRecPtr ramdacs /* , RamDacRecPtr ramdacPtr */
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)
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2006-11-26 11:13:41 -07:00
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{
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RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
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RamDacHelperRecPtr ramdacHelperPtr = NULL;
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Bool RamDacIsSupported = FALSE;
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int IBMramdac_ID = -1;
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int i;
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unsigned char id, rev, id2, rev2;
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/* read ID and revision */
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2012-06-10 07:21:05 -06:00
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rev = (*ramdacPtr->ReadDAC) (pScrn, IBMRGB_rev);
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id = (*ramdacPtr->ReadDAC) (pScrn, IBMRGB_id);
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2006-11-26 11:13:41 -07:00
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/* check if ID and revision are read only */
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2012-06-10 07:21:05 -06:00
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(*ramdacPtr->WriteDAC) (pScrn, ~rev, 0, IBMRGB_rev);
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(*ramdacPtr->WriteDAC) (pScrn, ~id, 0, IBMRGB_id);
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rev2 = (*ramdacPtr->ReadDAC) (pScrn, IBMRGB_rev);
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id2 = (*ramdacPtr->ReadDAC) (pScrn, IBMRGB_id);
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2006-11-26 11:13:41 -07:00
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switch (id) {
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2012-06-10 07:21:05 -06:00
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case 0x30:
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if (rev == 0xc0)
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IBMramdac_ID = IBM624_RAMDAC;
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if (rev == 0x80)
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IBMramdac_ID = IBM624DB_RAMDAC;
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break;
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case 0x12:
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if (rev == 0x1c)
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IBMramdac_ID = IBM640_RAMDAC;
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break;
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case 0x01:
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IBMramdac_ID = IBM525_RAMDAC;
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break;
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case 0x02:
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if (rev == 0xf0)
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IBMramdac_ID = IBM524_RAMDAC;
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if (rev == 0xe0)
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IBMramdac_ID = IBM524A_RAMDAC;
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if (rev == 0xc0)
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IBMramdac_ID = IBM526_RAMDAC;
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if (rev == 0x80)
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IBMramdac_ID = IBM526DB_RAMDAC;
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break;
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2006-11-26 11:13:41 -07:00
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}
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if (id == 1 || id == 2) {
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2012-06-10 07:21:05 -06:00
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if (id == id2 && rev == rev2) { /* IBM RGB52x found */
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/* check for 128bit VRAM -> RGB528 */
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if (((*ramdacPtr->ReadDAC) (pScrn, IBMRGB_misc1) & 0x03) == 0x03) {
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IBMramdac_ID = IBM528_RAMDAC; /* 128bit DAC found */
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if (rev == 0xe0)
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IBMramdac_ID = IBM528A_RAMDAC;
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}
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2006-11-26 11:13:41 -07:00
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}
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}
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2012-06-10 07:21:05 -06:00
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(*ramdacPtr->WriteDAC) (pScrn, rev, 0, IBMRGB_rev);
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(*ramdacPtr->WriteDAC) (pScrn, id, 0, IBMRGB_id);
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2006-11-26 11:13:41 -07:00
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if (IBMramdac_ID == -1) {
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2012-06-10 07:21:05 -06:00
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xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
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"Cannot determine IBM RAMDAC type, aborting\n");
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return NULL;
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}
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else {
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xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
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"Attached RAMDAC is %s\n",
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IBMramdacDeviceInfo[IBMramdac_ID & 0xFFFF].DeviceName);
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2006-11-26 11:13:41 -07:00
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}
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2012-06-10 07:21:05 -06:00
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for (i = 0; ramdacs[i].token != -1; i++) {
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if (ramdacs[i].token == IBMramdac_ID)
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RamDacIsSupported = TRUE;
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2006-11-26 11:13:41 -07:00
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}
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if (!RamDacIsSupported) {
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2012-06-10 07:21:05 -06:00
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xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
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"This IBM RAMDAC is NOT supported by this driver, aborting\n");
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return NULL;
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2006-11-26 11:13:41 -07:00
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}
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ramdacHelperPtr = RamDacHelperCreateInfoRec();
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switch (IBMramdac_ID) {
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2012-06-10 07:21:05 -06:00
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case IBM526_RAMDAC:
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case IBM526DB_RAMDAC:
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ramdacHelperPtr->SetBpp = IBMramdac526SetBpp;
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ramdacHelperPtr->HWCursorInit = IBMramdac526HWCursorInit;
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break;
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case IBM640_RAMDAC:
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ramdacHelperPtr->SetBpp = IBMramdac640SetBpp;
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ramdacHelperPtr->HWCursorInit = IBMramdac640HWCursorInit;
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break;
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2006-11-26 11:13:41 -07:00
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}
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ramdacPtr->RamDacType = IBMramdac_ID;
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ramdacHelperPtr->RamDacType = IBMramdac_ID;
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ramdacHelperPtr->Save = IBMramdacSave;
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ramdacHelperPtr->Restore = IBMramdacRestore;
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return ramdacHelperPtr;
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}
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void
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IBMramdac526SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr ramdacReg)
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{
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2012-06-10 07:21:05 -06:00
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ramdacReg->DacRegs[IBMRGB_key_control] = 0x00; /* Disable Chroma Key */
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2006-11-26 11:13:41 -07:00
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switch (pScrn->bitsPerPixel) {
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2012-06-10 07:21:05 -06:00
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case 32:
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ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_32BPP;
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ramdacReg->DacRegs[IBMRGB_32bpp] = B32_DCOL_DIRECT;
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ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
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ramdacReg->DacRegs[IBMRGB_16bpp] = 0;
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|
|
ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
|
|
|
|
if (pScrn->overlayFlags & OVERLAY_8_32_PLANAR) {
|
|
|
|
ramdacReg->DacRegs[IBMRGB_key_control] = 0x01; /* Enable Key */
|
|
|
|
ramdacReg->DacRegs[IBMRGB_key] = 0xFF;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_key_mask] = 0xFF;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 24:
|
|
|
|
ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_24BPP;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_24bpp] = B24_DCOL_DIRECT;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_16bpp] = 0;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
|
|
|
|
break;
|
|
|
|
case 16:
|
|
|
|
if (pScrn->depth == 16) {
|
|
|
|
ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_16BPP;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_16bpp] = B16_DCOL_DIRECT | B16_LINEAR |
|
|
|
|
B16_CONTIGUOUS | B16_565;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_16BPP;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_16bpp] = B16_DCOL_DIRECT | B16_LINEAR |
|
|
|
|
B16_CONTIGUOUS | B16_555;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 8:
|
|
|
|
ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_8BPP;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_16bpp] = 0;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_8bpp] = B8_DCOL_INDIRECT;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
ramdacReg->DacRegs[IBMRGB_pix_fmt] = PIXEL_FORMAT_4BPP;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_32bpp] = 0;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_24bpp] = 0;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_16bpp] = 0;
|
|
|
|
ramdacReg->DacRegs[IBMRGB_8bpp] = 0;
|
2006-11-26 11:13:41 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-06-10 07:21:05 -06:00
|
|
|
IBMramdac526SetBppProc *
|
|
|
|
IBMramdac526SetBppWeak(void)
|
|
|
|
{
|
2006-11-26 11:13:41 -07:00
|
|
|
return IBMramdac526SetBpp;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
IBMramdac640SetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr ramdacReg)
|
|
|
|
{
|
|
|
|
unsigned char bpp = 0x00;
|
|
|
|
unsigned char overlaybpp = 0x00;
|
|
|
|
unsigned char offset = 0x00;
|
|
|
|
unsigned char dispcont = 0x44;
|
|
|
|
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_WID_03_00] = 0x00;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_WID_07_04] = 0x00;
|
|
|
|
ramdacReg->DacRegs[RGB640_DIAGS] = 0x07;
|
|
|
|
|
|
|
|
switch (pScrn->depth) {
|
2012-06-10 07:21:05 -06:00
|
|
|
case 8:
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_07_00] = 0x00;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_15_08] = 0x00;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_23_16] = 0x00;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_31_24] = 0x00;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_16_1; /*16:1 Mux */
|
|
|
|
ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PCLK_8; /* pll / 8 */
|
|
|
|
bpp = 0x03;
|
|
|
|
break;
|
|
|
|
case 15:
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_07_00] = 0x10;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_15_08] = 0x11;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_23_16] = 0x00;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_31_24] = 0x00;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_8_1; /* 8:1 Mux */
|
|
|
|
ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PCLK_8; /* pll / 8 */
|
|
|
|
bpp = 0x0E;
|
|
|
|
break;
|
|
|
|
case 16:
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_07_00] = 0x10;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_15_08] = 0x11;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_23_16] = 0x00;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_31_24] = 0x00;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_8_1; /* 8:1 Mux */
|
|
|
|
ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PCLK_8; /* pll / 8 */
|
|
|
|
bpp = 0x05;
|
|
|
|
break;
|
|
|
|
case 24:
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_07_00] = 0x30;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_15_08] = 0x31;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_23_16] = 0x32;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_31_24] = 0x33;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_4_1; /* 4:1 Mux */
|
|
|
|
ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PCLK_8; /* pll / 8 */
|
|
|
|
bpp = 0x09;
|
|
|
|
if (pScrn->overlayFlags & OVERLAY_8_32_PLANAR) {
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_WID_07_04] = 0x04;
|
|
|
|
ramdacReg->DacRegs[RGB640_CHROMA_KEY0] = 0xFF;
|
|
|
|
ramdacReg->DacRegs[RGB640_CHROMA_MASK0] = 0xFF;
|
|
|
|
offset = 0x04;
|
|
|
|
overlaybpp = 0x04;
|
|
|
|
dispcont = 0x48;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 30: /* 10 bit dac */
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_07_00] = 0x30;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_15_08] = 0x31;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_23_16] = 0x32;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_31_24] = 0x33;
|
|
|
|
ramdacReg->DacRegs[RGB640_SER_MODE] = IBM640_SER_4_1; /* 4:1 Mux */
|
|
|
|
ramdacReg->DacRegs[RGB640_MISC_CONF] = IBM640_PSIZE10 | IBM640_PCLK_8; /* pll / 8 */
|
|
|
|
bpp = 0x0D;
|
|
|
|
break;
|
2006-11-26 11:13:41 -07:00
|
|
|
}
|
2012-06-10 07:21:05 -06:00
|
|
|
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0x100; i < 0x140; i += 4) {
|
|
|
|
/* Initialize FrameBuffer Window Attribute Table */
|
|
|
|
ramdacReg->DacRegs[i + 0] = bpp;
|
|
|
|
ramdacReg->DacRegs[i + 1] = offset;
|
|
|
|
ramdacReg->DacRegs[i + 2] = 0x00;
|
|
|
|
ramdacReg->DacRegs[i + 3] = 0x00;
|
|
|
|
/* Initialize Overlay Window Attribute Table */
|
|
|
|
ramdacReg->DacRegs[i + 0x100] = overlaybpp;
|
|
|
|
ramdacReg->DacRegs[i + 0x101] = 0x00;
|
|
|
|
ramdacReg->DacRegs[i + 0x102] = 0x00;
|
|
|
|
ramdacReg->DacRegs[i + 0x103] = dispcont;
|
2006-11-26 11:13:41 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-06-10 07:21:05 -06:00
|
|
|
static void
|
2006-11-26 11:13:41 -07:00
|
|
|
IBMramdac526ShowCursor(ScrnInfoPtr pScrn)
|
|
|
|
{
|
2012-06-10 07:21:05 -06:00
|
|
|
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
|
2006-11-26 11:13:41 -07:00
|
|
|
|
2012-06-10 07:21:05 -06:00
|
|
|
/* Enable cursor - X11 mode */
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs, 0x00, 0x07);
|
2006-11-26 11:13:41 -07:00
|
|
|
}
|
|
|
|
|
2012-06-10 07:21:05 -06:00
|
|
|
static void
|
2006-11-26 11:13:41 -07:00
|
|
|
IBMramdac640ShowCursor(ScrnInfoPtr pScrn)
|
|
|
|
{
|
2012-06-10 07:21:05 -06:00
|
|
|
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
|
2006-11-26 11:13:41 -07:00
|
|
|
|
2012-06-10 07:21:05 -06:00
|
|
|
/* Enable cursor - mode2 (x11 mode) */
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, RGB640_CURSOR_CONTROL, 0x00, 0x0B);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, RGB640_CROSSHAIR_CONTROL, 0x00, 0x00);
|
2006-11-26 11:13:41 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
IBMramdac526HideCursor(ScrnInfoPtr pScrn)
|
|
|
|
{
|
2012-06-10 07:21:05 -06:00
|
|
|
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
|
2006-11-26 11:13:41 -07:00
|
|
|
|
2012-06-10 07:21:05 -06:00
|
|
|
/* Disable cursor - X11 mode */
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs, 0x00, 0x24);
|
2006-11-26 11:13:41 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
IBMramdac640HideCursor(ScrnInfoPtr pScrn)
|
|
|
|
{
|
2012-06-10 07:21:05 -06:00
|
|
|
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
|
2006-11-26 11:13:41 -07:00
|
|
|
|
2012-06-10 07:21:05 -06:00
|
|
|
/* Disable cursor - mode2 (x11 mode) */
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, RGB640_CURSOR_CONTROL, 0x00, 0x08);
|
2006-11-26 11:13:41 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
IBMramdac526SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
|
|
|
|
{
|
2012-06-10 07:21:05 -06:00
|
|
|
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
|
2006-11-26 11:13:41 -07:00
|
|
|
|
2012-06-10 07:21:05 -06:00
|
|
|
x += 64;
|
|
|
|
y += 64;
|
2006-11-26 11:13:41 -07:00
|
|
|
|
2012-06-10 07:21:05 -06:00
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_hot_x, 0x00, 0x3f);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_hot_y, 0x00, 0x3f);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_xl, 0x00, x & 0xff);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_xh, 0x00, (x >> 8) & 0xf);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_yl, 0x00, y & 0xff);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_yh, 0x00, (y >> 8) & 0xf);
|
2006-11-26 11:13:41 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
IBMramdac640SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
|
|
|
|
{
|
2012-06-10 07:21:05 -06:00
|
|
|
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
|
2006-11-26 11:13:41 -07:00
|
|
|
|
2012-06-10 07:21:05 -06:00
|
|
|
x += 64;
|
|
|
|
y += 64;
|
2006-11-26 11:13:41 -07:00
|
|
|
|
2012-06-10 07:21:05 -06:00
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_OFFSETX, 0x00, 0x3f);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_OFFSETY, 0x00, 0x3f);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_X_LOW, 0x00, x & 0xff);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_X_HIGH, 0x00, (x >> 8) & 0xf);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_Y_LOW, 0x00, y & 0xff);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_Y_HIGH, 0x00, (y >> 8) & 0xf);
|
2006-11-26 11:13:41 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
IBMramdac526SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
|
|
|
|
{
|
2012-06-10 07:21:05 -06:00
|
|
|
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
|
|
|
|
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_col1_r, 0x00, bg >> 16);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_col1_g, 0x00, bg >> 8);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_col1_b, 0x00, bg);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_col2_r, 0x00, fg >> 16);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_col2_g, 0x00, fg >> 8);
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_col2_b, 0x00, fg);
|
2006-11-26 11:13:41 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
IBMramdac640SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
|
|
|
|
{
|
2012-06-10 07:21:05 -06:00
|
|
|
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
|
|
|
|
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_COL0, 0x00, 0);
|
|
|
|
(*ramdacPtr->WriteData) (pScrn, fg >> 16);
|
|
|
|
(*ramdacPtr->WriteData) (pScrn, fg >> 8);
|
|
|
|
(*ramdacPtr->WriteData) (pScrn, fg);
|
|
|
|
(*ramdacPtr->WriteData) (pScrn, bg >> 16);
|
|
|
|
(*ramdacPtr->WriteData) (pScrn, bg >> 8);
|
|
|
|
(*ramdacPtr->WriteData) (pScrn, bg);
|
|
|
|
(*ramdacPtr->WriteData) (pScrn, fg >> 16);
|
|
|
|
(*ramdacPtr->WriteData) (pScrn, fg >> 8);
|
|
|
|
(*ramdacPtr->WriteData) (pScrn, fg);
|
|
|
|
(*ramdacPtr->WriteData) (pScrn, bg >> 16);
|
|
|
|
(*ramdacPtr->WriteData) (pScrn, bg >> 8);
|
|
|
|
(*ramdacPtr->WriteData) (pScrn, bg);
|
2006-11-26 11:13:41 -07:00
|
|
|
}
|
|
|
|
|
2014-09-27 11:52:59 -06:00
|
|
|
static Bool
|
2006-11-26 11:13:41 -07:00
|
|
|
IBMramdac526LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
|
|
|
|
{
|
2012-06-10 07:21:05 -06:00
|
|
|
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
|
|
|
|
int i;
|
|
|
|
|
2015-09-16 13:10:19 -06:00
|
|
|
/*
|
2012-06-10 07:21:05 -06:00
|
|
|
* Output the cursor data. The realize function has put the planes into
|
|
|
|
* their correct order, so we can just blast this out.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < 1024; i++)
|
|
|
|
(*ramdacPtr->WriteDAC) (pScrn, IBMRGB_curs_array + i, 0x00, (*src++));
|
2014-09-27 11:52:59 -06:00
|
|
|
return TRUE;
|
2006-11-26 11:13:41 -07:00
|
|
|
}
|
|
|
|
|
2014-09-27 11:52:59 -06:00
|
|
|
static Bool
|
2006-11-26 11:13:41 -07:00
|
|
|
IBMramdac640LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
|
|
|
|
{
|
2012-06-10 07:21:05 -06:00
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|
RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
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|
int i;
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|
|
2015-09-16 13:10:19 -06:00
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|
/*
|
2012-06-10 07:21:05 -06:00
|
|
|
* Output the cursor data. The realize function has put the planes into
|
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|
|
* their correct order, so we can just blast this out.
|
|
|
|
*/
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|
for (i = 0; i < 1024; i++)
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(*ramdacPtr->WriteDAC) (pScrn, RGB640_CURS_WRITE + i, 0x00, (*src++));
|
2014-09-27 11:52:59 -06:00
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|
return TRUE;
|
2006-11-26 11:13:41 -07:00
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|
}
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|
2012-06-10 07:21:05 -06:00
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|
static Bool
|
2006-11-26 11:13:41 -07:00
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IBMramdac526UseHWCursor(ScreenPtr pScr, CursorPtr pCurs)
|
|
|
|
{
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|
|
return TRUE;
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}
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|
2012-06-10 07:21:05 -06:00
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|
static Bool
|
2006-11-26 11:13:41 -07:00
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|
IBMramdac640UseHWCursor(ScreenPtr pScr, CursorPtr pCurs)
|
|
|
|
{
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|
|
return TRUE;
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|
|
|
}
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|
|
void
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|
|
IBMramdac526HWCursorInit(xf86CursorInfoPtr infoPtr)
|
|
|
|
{
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|
|
infoPtr->MaxWidth = 64;
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|
infoPtr->MaxHeight = 64;
|
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|
|
infoPtr->Flags = HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
|
2012-06-10 07:21:05 -06:00
|
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|
HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
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|
HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1;
|
2006-11-26 11:13:41 -07:00
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|
infoPtr->SetCursorColors = IBMramdac526SetCursorColors;
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|
|
infoPtr->SetCursorPosition = IBMramdac526SetCursorPosition;
|
2014-09-27 11:52:59 -06:00
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|
infoPtr->LoadCursorImageCheck = IBMramdac526LoadCursorImage;
|
2006-11-26 11:13:41 -07:00
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|
infoPtr->HideCursor = IBMramdac526HideCursor;
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|
|
infoPtr->ShowCursor = IBMramdac526ShowCursor;
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|
|
infoPtr->UseHWCursor = IBMramdac526UseHWCursor;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
IBMramdac640HWCursorInit(xf86CursorInfoPtr infoPtr)
|
|
|
|
{
|
|
|
|
infoPtr->MaxWidth = 64;
|
|
|
|
infoPtr->MaxHeight = 64;
|
|
|
|
infoPtr->Flags = HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
|
2012-06-10 07:21:05 -06:00
|
|
|
HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
|
|
|
|
HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1;
|
2006-11-26 11:13:41 -07:00
|
|
|
infoPtr->SetCursorColors = IBMramdac640SetCursorColors;
|
|
|
|
infoPtr->SetCursorPosition = IBMramdac640SetCursorPosition;
|
2014-09-27 11:52:59 -06:00
|
|
|
infoPtr->LoadCursorImageCheck = IBMramdac640LoadCursorImage;
|
2006-11-26 11:13:41 -07:00
|
|
|
infoPtr->HideCursor = IBMramdac640HideCursor;
|
|
|
|
infoPtr->ShowCursor = IBMramdac640ShowCursor;
|
|
|
|
infoPtr->UseHWCursor = IBMramdac640UseHWCursor;
|
|
|
|
}
|