2006-11-26 13:04:28 -07:00
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/*
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* Copyright 1996-2000 by Robin Cutshaw <robin@XFree86.Org>
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that
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* copyright notice and this permission notice appear in supporting
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* documentation, and that the name of Robin Cutshaw not be used in
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* advertising or publicity pertaining to distribution of the software without
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* specific, written prior permission. Robin Cutshaw makes no representations
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* about the suitability of this software for any purpose. It is provided
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* "as is" without express or implied warranty.
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*
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* ROBIN CUTSHAW DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL ROBIN CUTSHAW BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "xf86.h"
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#include "xf86PciInfo.h"
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#include "xf86Pci.h"
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#include "cursorstr.h"
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#include "servermd.h"
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#include "i128.h"
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#include "i128reg.h"
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#include "IBMRGB.h"
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2008-10-12 14:32:10 -06:00
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#include <unistd.h>
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2006-11-26 13:04:28 -07:00
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static void I128IBMShowCursor(ScrnInfoPtr pScrn);
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static void I128IBMHideCursor(ScrnInfoPtr pScrn);
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static void I128IBMSetCursorPosition(ScrnInfoPtr pScrn, int x, int y);
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static void I128IBMSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg);
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static void I128IBMLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src);
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static Bool I128IBMUseHWCursor(ScreenPtr pScrn, CursorPtr pCurs);
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Bool
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I128IBMHWCursorInit(ScrnInfoPtr pScrn)
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{
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xf86CursorInfoPtr infoPtr;
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2012-08-11 04:07:25 -06:00
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ScreenPtr pScreen = xf86ScrnToScreen(pScrn);
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2006-11-26 13:04:28 -07:00
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I128Ptr pI128 = I128PTR(pScrn);
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if (!pI128->HWCursor)
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return FALSE;
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infoPtr = xf86CreateCursorInfoRec();
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if (!infoPtr) return FALSE;
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pI128->CursorInfoRec = infoPtr;
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infoPtr->MaxWidth = 64;
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infoPtr->MaxHeight = 64;
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infoPtr->SetCursorColors = I128IBMSetCursorColors;
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infoPtr->SetCursorPosition = I128IBMSetCursorPosition;
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infoPtr->LoadCursorImage = I128IBMLoadCursorImage;
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infoPtr->HideCursor = I128IBMHideCursor;
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infoPtr->ShowCursor = I128IBMShowCursor;
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infoPtr->UseHWCursor = I128IBMUseHWCursor;
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infoPtr->Flags = HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
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HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
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HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_1;
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2010-05-24 03:20:10 -06:00
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#if X_BYTE_ORDER == X_BIG_ENDIAN
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infoPtr->Flags |= HARDWARE_CURSOR_NIBBLE_SWAPPED;
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#endif
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2006-11-26 13:04:28 -07:00
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2010-05-24 03:20:10 -06:00
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return(xf86InitCursor(pScreen, infoPtr));
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2006-11-26 13:04:28 -07:00
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}
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static void
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I128IBMShowCursor(ScrnInfoPtr pScrn)
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{
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CARD32 tmpl, tmph;
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I128Ptr pI128 = I128PTR(pScrn);
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/* Enable cursor - X11 mode */
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tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF;
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tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF;
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pI128->mem.rbase_g[IDXCTL_I] = 0; MB;
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pI128->mem.rbase_g[IDXH_I] = 0; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs; MB;
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pI128->mem.rbase_g[DATA_I] = 0x27; MB;
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pI128->mem.rbase_g[IDXH_I] = tmph; MB;
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pI128->mem.rbase_g[IDXL_I] = tmpl; MB;
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return;
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}
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static void
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I128IBMHideCursor(ScrnInfoPtr pScrn)
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{
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CARD32 tmpl, tmph, tmp1;
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I128Ptr pI128 = I128PTR(pScrn);
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tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF;
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tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF;
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pI128->mem.rbase_g[IDXCTL_I] = 0; MB;
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pI128->mem.rbase_g[IDXH_I] = 0; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs; MB;
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tmp1 = pI128->mem.rbase_g[DATA_I] & 0xFC;
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pI128->mem.rbase_g[DATA_I] = tmp1; MB;
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pI128->mem.rbase_g[IDXH_I] = tmph; MB;
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pI128->mem.rbase_g[IDXL_I] = tmpl; MB;
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return;
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}
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static void
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I128IBMSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
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{
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CARD32 tmpl, tmph;
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I128Ptr pI128 = I128PTR(pScrn);
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x += 64;
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y += 64;
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tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF;
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tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF;
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pI128->mem.rbase_g[IDXH_I] = 0; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_hot_x; MB;
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pI128->mem.rbase_g[DATA_I] = 0x3F; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_hot_y; MB;
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pI128->mem.rbase_g[DATA_I] = 0x3F; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_xl; MB;
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pI128->mem.rbase_g[DATA_I] = x & 0xFF; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_xh; MB;
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pI128->mem.rbase_g[DATA_I] = (x >> 8) & 0x0F; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_yl; MB;
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pI128->mem.rbase_g[DATA_I] = y & 0xFF; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_yh; MB;
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pI128->mem.rbase_g[DATA_I] = (y >> 8) & 0x0F; MB;
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pI128->mem.rbase_g[IDXH_I] = tmph; MB;
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pI128->mem.rbase_g[IDXL_I] = tmpl; MB;
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return;
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}
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static void
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I128IBMSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
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{
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CARD32 tmp;
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I128Ptr pI128 = I128PTR(pScrn);
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tmp = pI128->mem.rbase_g[IDXL_I] & 0xFF;
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/* Background color */
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_col1_r; MB;
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pI128->mem.rbase_g[DATA_I] = (bg & 0x00FF0000) >> 16; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_col1_g; MB;
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pI128->mem.rbase_g[DATA_I] = (bg & 0x0000FF00) >> 8; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_col1_b; MB;
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pI128->mem.rbase_g[DATA_I] = (bg & 0x000000FF); MB;
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/* Foreground color */
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_col2_r; MB;
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pI128->mem.rbase_g[DATA_I] = (fg & 0x00FF0000) >> 16; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_col2_g; MB;
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pI128->mem.rbase_g[DATA_I] = (fg & 0x0000FF00) >> 8; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_col2_b; MB;
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pI128->mem.rbase_g[DATA_I] = (fg & 0x000000FF); MB;
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pI128->mem.rbase_g[IDXL_I] = tmp; MB;
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return;
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}
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static void
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I128IBMLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
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{
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I128Ptr pI128 = I128PTR(pScrn);
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register int i;
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CARD32 tmph, tmpl, tmpc;
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tmpc = pI128->mem.rbase_g[IDXCTL_I] & 0xFF;
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tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF;
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tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF;
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pI128->BlockCursor = TRUE;
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pI128->mem.rbase_g[IDXCTL_I] = 0; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_hot_x; MB;
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pI128->mem.rbase_g[DATA_I] = 0x00; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_hot_y; MB;
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pI128->mem.rbase_g[DATA_I] = 0x00; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_xl; MB;
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pI128->mem.rbase_g[DATA_I] = 0xFF; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_xh; MB;
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pI128->mem.rbase_g[DATA_I] = 0x7F; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_yl; MB;
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pI128->mem.rbase_g[DATA_I] = 0xFF; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_yh; MB;
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pI128->mem.rbase_g[DATA_I] = 0x7F; MB;
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pI128->mem.rbase_g[IDXH_I] = (IBMRGB_curs_array >> 8) & 0xFF; MB;
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pI128->mem.rbase_g[IDXL_I] = IBMRGB_curs_array & 0xFF; MB;
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pI128->mem.rbase_g[IDXCTL_I] = 1; /* enable auto-inc */ MB;
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/*
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* Output the cursor data. The realize function has put the planes into
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* their correct order, so we can just blast this out.
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*/
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for (i = 0; i < 1024; i++,src++) {
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pI128->mem.rbase_g[DATA_I] = (CARD32 )*src; MB;
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}
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pI128->mem.rbase_g[IDXCTL_I] = tmpc; MB;
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pI128->mem.rbase_g[IDXH_I] = tmph; MB;
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pI128->mem.rbase_g[IDXL_I] = tmpl; MB;
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pI128->BlockCursor = FALSE;
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return;
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}
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static Bool
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I128IBMUseHWCursor(ScreenPtr pScrn, CursorPtr pCurs)
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{
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if( XF86SCRNINFO(pScrn)->currentMode->Flags & V_DBLSCAN )
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return FALSE;
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return TRUE;
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}
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Bool I128TIHWCursorInit(ScrnInfoPtr pScrn) { return FALSE; }
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Bool I128ProgramTi3025(ScrnInfoPtr pScrn, DisplayModePtr mode) { return FALSE; }
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Bool
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I128ProgramIBMRGB(ScrnInfoPtr pScrn, DisplayModePtr mode)
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{
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I128Ptr pI128 = I128PTR(pScrn);
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unsigned char tmp2, m, n, df, best_m, best_n, best_df, max_n;
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CARD32 tmpl, tmph, tmpc;
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long f, vrf, outf, best_diff, best_outf = 0, diff;
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long requested_freq;
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int freq = mode->SynthClock;
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int flags = mode->Flags;
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#define REF_FREQ 25175000
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#define MAX_VREF 3380000
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/* Actually, MIN_VREF can be as low as 1000000;
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* this allows clock speeds down to 17 MHz */
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#define MIN_VREF 1500000
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#define MAX_VCO 220000000
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#define MIN_VCO 65000000
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if (freq < 25000) {
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xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
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"Specified dot clock (%.3f) too low for IBM RGB52x",
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freq / 1000.0);
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return(FALSE);
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} else if (freq > MAX_VCO) {
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xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
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"Specified dot clock (%.3f) too high for IBM RGB52x",
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freq / 1000.0);
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return(FALSE);
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}
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requested_freq = freq * 1000;
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best_m = best_n = best_df = 0;
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best_diff = requested_freq; /* worst case */
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for (df=0; df<4; df++) {
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max_n = REF_FREQ / MIN_VREF;
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if (df < 3)
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max_n >>= 1;
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for (n=2; n<max_n; n++)
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for (m=65; m<=128; m++) {
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vrf = REF_FREQ / n;
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if (df < 3)
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vrf >>= 1;
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if ((vrf > MAX_VREF) || (vrf < MIN_VREF))
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continue;
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f = vrf * m;
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outf = f;
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if (df < 2)
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outf >>= 2 - df;
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if ((f > MAX_VCO) || (f < MIN_VCO))
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continue;
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/* outf is a valid freq, pick the closest now */
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if ((diff = (requested_freq - outf)) < 0)
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diff = -diff;;
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if (diff < best_diff) {
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best_diff = diff;
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best_m = m;
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best_n = n;
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best_df = df;
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best_outf = outf;
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}
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}
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}
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/* do we have an acceptably close frequency? (less than 1% diff) */
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if (best_diff > (requested_freq/100)) {
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xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
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"Specified dot clock (%.3f) too far (best %.3f) IBM RGB52x",
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|
|
requested_freq / 1000.0, best_outf / 1000.0);
|
|
|
|
return(FALSE);
|
|
|
|
}
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[PEL_MASK] = 0xFF; MB;
|
|
|
|
|
|
|
|
tmpc = pI128->mem.rbase_g[IDXCTL_I] & 0xFF;
|
|
|
|
tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF;
|
|
|
|
tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXH_I] = 0; MB;
|
|
|
|
pI128->mem.rbase_g[IDXCTL_I] = 0; MB;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_misc_clock; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xFF;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2 | 0x81; MB;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_m0+4; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = (best_df<<6) | (best_m&0x3f); MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_n0+4; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = best_n; MB;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pll_ctrl1; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xFF;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = (tmp2&0xf8) | 3; /* 8 M/N pairs in PLL */ MB;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pll_ctrl2; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xFF;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = (tmp2&0xf0) | 2; /* clock number 2 */ MB;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_misc_clock; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xf0;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2 | ((flags & V_DBLCLK) ? 0x03 : 0x01); MB;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_sync; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = ((flags & V_PHSYNC) ? 0x10 : 0x00)
|
|
|
|
| ((flags & V_PVSYNC) ? 0x20 : 0x00); MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_hsync_pos; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x01; /* Delay syncs by 1 pclock */ MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pwr_mgmt; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x00; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_dac_op; MB;
|
|
|
|
tmp2 = (pI128->RamdacType == IBM528_DAC) ? 0x02 : 0x00; /* fast slew */
|
|
|
|
if (pI128->DACSyncOnGreen) tmp2 |= 0x08;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pal_ctrl; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x00; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x01; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_misc1; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xbc;
|
|
|
|
tmp2 |= 0x20;
|
|
|
|
if ((pI128->MemoryType != I128_MEMORY_DRAM) &&
|
|
|
|
(pI128->MemoryType != I128_MEMORY_SGRAM))
|
|
|
|
tmp2 |= (pI128->RamdacType == IBM528_DAC) ? 3 : 1;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_misc2; MB;
|
|
|
|
tmp2 = 0x03;
|
|
|
|
if (pI128->DAC8Bit)
|
|
|
|
tmp2 |= 0x04;
|
|
|
|
if (!((pI128->MemoryType == I128_MEMORY_DRAM) &&
|
|
|
|
(pI128->bitsPerPixel > 16)))
|
|
|
|
tmp2 |= 0x40;
|
|
|
|
if ((pI128->MemoryType == I128_MEMORY_SGRAM) &&
|
|
|
|
(pI128->bitsPerPixel > 16) &&
|
|
|
|
(pI128->RamdacType != SILVER_HAMMER_DAC) )
|
|
|
|
tmp2 &= 0x3F;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_misc3; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x00; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_misc4; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x00; MB;
|
|
|
|
|
|
|
|
/* ?? There is no write to cursor control register */
|
|
|
|
|
|
|
|
if (pI128->RamdacType == IBM526_DAC) {
|
|
|
|
if (pI128->MemoryType == I128_MEMORY_SGRAM) {
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x09; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x83; MB;
|
|
|
|
} else {
|
|
|
|
/* program mclock to 52MHz */
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x08; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x41; MB;
|
|
|
|
}
|
|
|
|
/* should delay at least a millisec so we'll wait 50 */
|
|
|
|
usleep(50000);
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (pI128->depth) {
|
|
|
|
case 24: /* 32 bit */
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pix_fmt; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xf8;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2 | 0x06; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_32bpp; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x03; MB;
|
|
|
|
break;
|
|
|
|
case 16:
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pix_fmt; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xf8;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2 | 0x04; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_16bpp; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0xC7; MB;
|
|
|
|
break;
|
|
|
|
case 15:
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pix_fmt; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xf8;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2 | 0x04; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_16bpp; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0xC5; MB;
|
|
|
|
break;
|
|
|
|
default: /* 8 bit */
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pix_fmt; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xf8;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2 | 0x03; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_8bpp; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x00; MB;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXCTL_I] = tmpc; MB;
|
|
|
|
pI128->mem.rbase_g[IDXH_I] = tmph; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = tmpl; MB;
|
|
|
|
|
|
|
|
return(TRUE);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
Bool
|
|
|
|
I128ProgramSilverHammer(ScrnInfoPtr pScrn, DisplayModePtr mode)
|
|
|
|
{
|
|
|
|
/* The SilverHammer DAC is essentially the same as the IBMRGBxxx DACs,
|
|
|
|
* but with fewer options and a different reference frequency.
|
|
|
|
*/
|
|
|
|
|
|
|
|
I128Ptr pI128 = I128PTR(pScrn);
|
|
|
|
unsigned char tmp2, m, n, df, best_m, best_n, best_df, max_n;
|
|
|
|
CARD32 tmpl, tmph, tmpc;
|
|
|
|
long f, vrf, outf, best_diff, best_outf = 0, diff;
|
|
|
|
long requested_freq;
|
|
|
|
int freq = mode->SynthClock;
|
|
|
|
int flags = mode->Flags;
|
|
|
|
int skew = mode->HSkew;
|
|
|
|
|
|
|
|
#undef REF_FREQ
|
|
|
|
#define REF_FREQ 37500000
|
|
|
|
#undef MAX_VREF
|
|
|
|
#define MAX_VREF 9000000
|
|
|
|
#define MIN_VREF 1500000
|
|
|
|
#undef MAX_VCO
|
|
|
|
#define MAX_VCO 270000000
|
|
|
|
#define MIN_VCO 65000000
|
|
|
|
|
|
|
|
if (freq < 25000) {
|
|
|
|
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
|
|
|
|
"Specified dot clock (%.3f) too low for SilverHammer",
|
|
|
|
freq / 1000.0);
|
|
|
|
return(FALSE);
|
|
|
|
} else if (freq > MAX_VCO) {
|
|
|
|
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
|
|
|
|
"Specified dot clock (%.3f) too high for SilverHammer",
|
|
|
|
freq / 1000.0);
|
|
|
|
return(FALSE);
|
|
|
|
}
|
|
|
|
|
|
|
|
requested_freq = freq * 1000;
|
|
|
|
|
|
|
|
best_m = best_n = best_df = 0;
|
|
|
|
best_diff = requested_freq; /* worst case */
|
|
|
|
|
|
|
|
for (df=0; df<4; df++) {
|
|
|
|
max_n = REF_FREQ / MIN_VREF;
|
|
|
|
if (df < 3)
|
|
|
|
max_n >>= 1;
|
|
|
|
for (n=2; n<max_n; n++)
|
|
|
|
for (m=65; m<=128; m++) {
|
|
|
|
vrf = REF_FREQ / n;
|
|
|
|
if (df < 3)
|
|
|
|
vrf >>= 1;
|
|
|
|
if ((vrf > MAX_VREF) || (vrf < MIN_VREF))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
f = vrf * m;
|
|
|
|
outf = f;
|
|
|
|
if (df < 2)
|
|
|
|
outf >>= 2 - df;
|
|
|
|
if ((f > MAX_VCO) || (f < MIN_VCO))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/* outf is a valid freq, pick the closest now */
|
|
|
|
|
|
|
|
if ((diff = (requested_freq - outf)) < 0)
|
|
|
|
diff = -diff;;
|
|
|
|
if (diff < best_diff) {
|
|
|
|
best_diff = diff;
|
|
|
|
best_m = m;
|
|
|
|
best_n = n;
|
|
|
|
best_df = df;
|
|
|
|
best_outf = outf;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* do we have an acceptably close frequency? (less than 1% diff) */
|
|
|
|
|
|
|
|
if (best_diff > (requested_freq/100)) {
|
|
|
|
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
|
|
|
|
"Specified dot clock (%.3f) too far (best %.3f) SilverHammer",
|
|
|
|
requested_freq / 1000.0, best_outf / 1000.0);
|
|
|
|
return(FALSE);
|
|
|
|
}
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[PEL_MASK] = 0xFF; MB;
|
|
|
|
|
|
|
|
tmpc = pI128->mem.rbase_g[IDXCTL_I] & 0xFF;
|
|
|
|
tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF;
|
|
|
|
tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXH_I] = 0; MB;
|
|
|
|
pI128->mem.rbase_g[IDXCTL_I] = 0; MB;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_misc_clock; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xFF;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2 | 0x81; MB;
|
|
|
|
|
|
|
|
if (!pI128->Primary) {
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_m0; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x15; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_m0+1; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x10; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_m0+2; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x2c; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_m0+3; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x12; MB;
|
|
|
|
}
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_m0+4; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = (best_df<<6) | (best_m&0x3f); MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_n0+4; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = best_n; MB;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pll_ctrl1; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xFF;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = (tmp2&0xf8) | 3; /* 8 M/N pairs in PLL */ MB;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pll_ctrl2; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xFF;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = (tmp2&0xf0) | 2; /* clock number 2 */ MB;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_misc_clock; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xf0;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2 | ((flags & V_DBLCLK) ? 0x03 : 0x01); MB;
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_sync; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = ((flags & V_PHSYNC) ? 0x10 : 0x00)
|
|
|
|
| ((flags & V_PVSYNC) ? 0x20 : 0x00); MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_hsync_pos; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = ((flags & V_HSKEW) ? skew : 0x01); MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pwr_mgmt; MB;
|
|
|
|
/* Use 0x01 below with digital flat panel to conserve energy and reduce noise */
|
|
|
|
pI128->mem.rbase_g[DATA_I] = (pI128->FlatPanel ? 0x01 : 0x00); MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_dac_op; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = (pI128->DACSyncOnGreen ? 0x08 : 0x00); MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pal_ctrl; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x00; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x01; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_misc1; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xbc;
|
|
|
|
if ((pI128->MemoryType != I128_MEMORY_DRAM) &&
|
|
|
|
(pI128->MemoryType != I128_MEMORY_SGRAM))
|
|
|
|
tmp2 |= (pI128->RamdacType == IBM528_DAC) ? 3 : 1;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_misc2; MB;
|
|
|
|
tmp2 = 0x03;
|
|
|
|
if (pI128->DAC8Bit)
|
|
|
|
tmp2 |= 0x04;
|
|
|
|
if (!((pI128->MemoryType == I128_MEMORY_DRAM) &&
|
|
|
|
(pI128->bitsPerPixel > 16)))
|
|
|
|
tmp2 |= 0x40;
|
|
|
|
if ((pI128->MemoryType == I128_MEMORY_SGRAM) &&
|
|
|
|
(pI128->bitsPerPixel > 16) &&
|
|
|
|
(pI128->RamdacType != SILVER_HAMMER_DAC) )
|
|
|
|
tmp2 &= 0x3F;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_misc3; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x00; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_misc4; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x00; MB;
|
|
|
|
|
|
|
|
/* ?? There is no write to cursor control register */
|
|
|
|
|
|
|
|
/* Set the memory clock speed to 95 MHz */
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x08; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x50; MB;
|
|
|
|
|
|
|
|
/* should delay at least a millisec so we'll wait 50 */
|
|
|
|
usleep(50000);
|
|
|
|
|
|
|
|
switch (pI128->depth) {
|
|
|
|
case 24: /* 32 bit */
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pix_fmt; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xf8;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2 | 0x06; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_32bpp; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x03; MB;
|
|
|
|
break;
|
|
|
|
case 16:
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pix_fmt; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xf8;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2 | 0x04; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_16bpp; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0xC7; MB;
|
|
|
|
break;
|
|
|
|
case 15:
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pix_fmt; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xf8;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2 | 0x04; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_16bpp; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0xC5; MB;
|
|
|
|
break;
|
|
|
|
default: /* 8 bit */
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_pix_fmt; MB;
|
|
|
|
tmp2 = pI128->mem.rbase_g[DATA_I] & 0xf8;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = tmp2 | 0x03; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = IBMRGB_8bpp; MB;
|
|
|
|
pI128->mem.rbase_g[DATA_I] = 0x00; MB;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
pI128->mem.rbase_g[IDXCTL_I] = tmpc; MB;
|
|
|
|
pI128->mem.rbase_g[IDXH_I] = tmph; MB;
|
|
|
|
pI128->mem.rbase_g[IDXL_I] = tmpl; MB;
|
|
|
|
|
|
|
|
return(TRUE);
|
|
|
|
}
|