115 lines
3.5 KiB
C
115 lines
3.5 KiB
C
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/*
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* Copyright (C) 2013 Samsung Electronics Co.Ltd
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* Authors:
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* Inki Dae <inki.dae@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef _FIMG2D_REG_H_
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#define _FIMG2D_REG_H_
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#define SOFT_RESET_REG (0x0000)
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#define INTEN_REG (0x0004)
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#define INTC_PEND_REG (0x000C)
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#define FIFO_STAT_REG (0x0010)
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#define AXI_MODE_REG (0x001C)
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#define DMA_SFR_BASE_ADDR_REG (0x0080)
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#define DMA_COMMAND_REG (0x0084)
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#define DMA_EXE_LIST_NUM_REG (0x0088)
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#define DMA_STATUS_REG (0x008C)
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#define DMA_HOLD_CMD_REG (0x0090)
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/* COMMAND REGISTER */
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#define BITBLT_START_REG (0x0100)
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#define BITBLT_COMMAND_REG (0x0104)
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#define BLEND_FUNCTION_REG (0x0108) /* VER4.1 */
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#define ROUND_MODE_REG (0x010C) /* VER4.1 */
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/* PARAMETER SETTING REGISTER */
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#define ROTATE_REG (0x0200)
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#define SRC_MASK_DIRECT_REG (0x0204)
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#define DST_PAT_DIRECT_REG (0x0208)
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/* SOURCE */
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#define SRC_SELECT_REG (0x0300)
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#define SRC_BASE_ADDR_REG (0x0304)
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#define SRC_STRIDE_REG (0x0308)
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#define SRC_COLOR_MODE_REG (0x030c)
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#define SRC_LEFT_TOP_REG (0x0310)
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#define SRC_RIGHT_BOTTOM_REG (0x0314)
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#define SRC_PLANE2_BASE_ADDR_REG (0x0318) /* VER4.1 */
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#define SRC_REPEAT_MODE_REG (0x031C)
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#define SRC_PAD_VALUE_REG (0x0320)
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#define SRC_A8_RGB_EXT_REG (0x0324)
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#define SRC_SCALE_CTRL_REG (0x0328)
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#define SRC_XSCALE_REG (0x032C)
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#define SRC_YSCALE_REG (0x0330)
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/* DESTINATION */
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#define DST_SELECT_REG (0x0400)
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#define DST_BASE_ADDR_REG (0x0404)
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#define DST_STRIDE_REG (0x0408)
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#define DST_COLOR_MODE_REG (0x040C)
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#define DST_LEFT_TOP_REG (0x0410)
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#define DST_RIGHT_BOTTOM_REG (0x0414)
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#define DST_PLANE2_BASE_ADDR_REG (0x0418) /* VER4.1 */
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#define DST_A8_RGB_EXT_REG (0x041C)
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/* PATTERN */
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#define PAT_BASE_ADDR_REG (0x0500)
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#define PAT_SIZE_REG (0x0504)
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#define PAT_COLOR_MODE_REG (0x0508)
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#define PAT_OFFSET_REG (0x050C)
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#define PAT_STRIDE_REG (0x0510)
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/* MASK */
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#define MASK_BASE_ADDR_REG (0x0520)
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#define MASK_STRIDE_REG (0x0524)
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#define MASK_LEFT_TOP_REG (0x0528) /* VER4.1 */
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#define MASK_RIGHT_BOTTOM_REG (0x052C) /* VER4.1 */
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#define MASK_MODE_REG (0x0530) /* VER4.1 */
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#define MASK_REPEAT_MODE_REG (0x0534)
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#define MASK_PAD_VALUE_REG (0x0538)
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#define MASK_SCALE_CTRL_REG (0x053C)
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#define MASK_XSCALE_REG (0x0540)
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#define MASK_YSCALE_REG (0x0544)
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/* CLIPPING WINDOW */
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#define CW_LT_REG (0x0600)
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#define CW_RB_REG (0x0604)
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/* ROP & ALPHA SETTING */
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#define THIRD_OPERAND_REG (0x0610)
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#define ROP4_REG (0x0614)
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#define ALPHA_REG (0x0618)
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/* COLOR SETTING */
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#define FG_COLOR_REG (0x0700)
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#define BG_COLOR_REG (0x0704)
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#define BS_COLOR_REG (0x0708)
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#define SF_COLOR_REG (0x070C) /* VER4.1 */
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/* COLOR KEY */
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#define SRC_COLORKEY_CTRL_REG (0x0710)
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#define SRC_COLORKEY_DR_MIN_REG (0x0714)
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#define SRC_COLORKEY_DR_MAX_REG (0x0718)
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#define DST_COLORKEY_CTRL_REG (0x071C)
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#define DST_COLORKEY_DR_MIN_REG (0x0720)
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#define DST_COLORKEY_DR_MAX_REG (0x0724)
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/* YCbCr src Color Key */
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#define YCbCr_SRC_COLORKEY_CTRL_REG (0x0728) /* VER4.1 */
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#define YCbCr_SRC_COLORKEY_DR_MIN_REG (0x072C) /* VER4.1 */
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#define YCbCr_SRC_COLORKEY_DR_MAX_REG (0x0730) /* VER4.1 */
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/*Y CbCr dst Color Key */
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#define YCbCr_DST_COLORKEY_CTRL_REG (0x0734) /* VER4.1 */
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#define YCbCr_DST_COLORKEY_DR_MIN_REG (0x0738) /* VER4.1 */
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#define YCbCr_DST_COLORKEY_DR_MAX_REG (0x073C) /* VER4.1 */
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#endif
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