2006-11-26 11:13:41 -07:00
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/*
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* Copyright <EFBFBD> 2000 Keith Packard
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that
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* copyright notice and this permission notice appear in supporting
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* documentation, and that the name of Keith Packard not be used in
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* advertising or publicity pertaining to distribution of the software without
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* specific, written prior permission. Keith Packard makes no
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* representations about the suitability of this software for any purpose. It
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* is provided "as is" without express or implied warranty.
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*
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* KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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Copyright (c) 2000 by Juliusz Chroboczek
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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#ifdef HAVE_CONFIG_H
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#include <kdrive-config.h>
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#endif
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#include "vm86.h"
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#define PUSHW(vi, i) \
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{ vi->vms.regs.esp -= 2;\
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LMW(vi,MAKE_POINTER(vi->vms.regs.ss, vi->vms.regs.esp)) = i;}
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static int vm86old(struct vm86_struct *vms);
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static int vm86_loop(Vm86InfoPtr vi);
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static const U8 rev_ints[32] =
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{ 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0x80,
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};
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static const U8 retcode_data[2] =
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{ 0xCD, 0xFF };
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Vm86InfoPtr
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Vm86Setup(int mapHoles)
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{
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int devmem = -1, devzero = -1;
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void *magicMem, *loMem, *hiMem;
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void *hole1, *hole2;
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U32 stack_base, ret_code;
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Vm86InfoPtr vi = NULL;
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devmem = open("/dev/mem", O_RDWR);
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if(devmem < 0) {
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perror("open /dev/mem");
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goto fail;
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}
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devzero = open("/dev/zero", O_RDWR);
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if(devzero < 0) {
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perror("open /dev/zero");
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goto fail;
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}
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magicMem = MAP_FAILED;
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loMem = MAP_FAILED;
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hiMem = MAP_FAILED;
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hole1 = MAP_FAILED;
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hole2 = MAP_FAILED;
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magicMem = mmap((void*)MAGICMEM_BASE, MAGICMEM_SIZE,
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PROT_READ | PROT_WRITE | PROT_EXEC,
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MAP_PRIVATE | MAP_FIXED, devmem, MAGICMEM_BASE);
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if(magicMem == MAP_FAILED) {
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ErrorF("Couldn't map magic memory\n");
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goto unmapfail;
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}
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if(mapHoles) {
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hole1 = mmap((void*)HOLE1_BASE, HOLE1_SIZE,
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PROT_READ | PROT_WRITE | PROT_EXEC,
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MAP_PRIVATE | MAP_FIXED, devzero, HOLE1_BASE);
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if(hole1 == MAP_FAILED) {
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ErrorF("Couldn't map first hole\n");
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goto unmapfail;
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}
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}
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loMem = mmap((void*)LOMEM_BASE, LOMEM_SIZE,
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PROT_READ | PROT_WRITE | PROT_EXEC,
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MAP_PRIVATE | MAP_FIXED, devzero, LOMEM_BASE);
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if(loMem == MAP_FAILED) {
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ErrorF("Couldn't map low memory\n");
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munmap(magicMem, MAGICMEM_SIZE);
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goto unmapfail;
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}
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if(mapHoles) {
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hole2 = mmap((void*)HOLE2_BASE, HOLE2_SIZE,
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PROT_READ | PROT_WRITE | PROT_EXEC,
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MAP_PRIVATE | MAP_FIXED, devzero, HOLE2_BASE);
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if(hole2 == MAP_FAILED) {
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ErrorF("Couldn't map first hole\n");
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goto unmapfail;
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}
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}
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hiMem = mmap((void*)HIMEM_BASE, HIMEM_SIZE,
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PROT_READ | PROT_WRITE | PROT_EXEC,
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MAP_SHARED | MAP_FIXED,
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devmem, HIMEM_BASE);
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if(hiMem == MAP_FAILED) {
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ErrorF("Couldn't map high memory\n");
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goto unmapfail;
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}
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vi = xalloc(sizeof(Vm86InfoRec));
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if (!vi)
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goto unmapfail;
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vi->magicMem = magicMem;
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vi->hole1 = hole1;
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vi->loMem = loMem;
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vi->hole2 = hole2;
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vi->hiMem = hiMem;
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vi->brk = LOMEM_BASE;
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stack_base = Vm86AllocateMemory(vi, STACK_SIZE);
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if(stack_base == ALLOC_FAIL)
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goto unmapfail;
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ret_code = Vm86AllocateMemory(vi, sizeof(retcode_data));
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if(ret_code == ALLOC_FAIL)
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goto unmapfail;
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vi->stack_base = stack_base;
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vi->ret_code = ret_code;
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memset(&vi->vms, 0, sizeof(struct vm86_struct));
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vi->vms.flags = 0;
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vi->vms.screen_bitmap = 0;
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vi->vms.cpu_type = CPU_586;
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memcpy(&vi->vms.int_revectored, rev_ints, sizeof(rev_ints));
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iopl(3);
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if(devmem >= 0)
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close(devmem);
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if(devzero >= 0)
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close(devzero);
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return vi;
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unmapfail:
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if(magicMem != MAP_FAILED) munmap(magicMem, MAGICMEM_SIZE);
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if(hole1 != MAP_FAILED) munmap(hole1, HOLE1_SIZE);
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if(loMem != MAP_FAILED) munmap(loMem, LOMEM_SIZE);
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if(hole2 != MAP_FAILED) munmap(hole2, HOLE2_SIZE);
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if(hiMem != MAP_FAILED) munmap(hiMem, HIMEM_SIZE);
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fail:
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if(devmem >= 0)
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close(devmem);
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if(devzero >= 0)
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close(devzero);
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if(vi)
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xfree(vi);
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return NULL;
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}
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void
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Vm86Cleanup(Vm86InfoPtr vi)
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{
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if(vi->magicMem != MAP_FAILED) munmap(vi->magicMem, MAGICMEM_SIZE);
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if(vi->hole1 != MAP_FAILED) munmap(vi->hole1, HOLE1_SIZE);
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if(vi->loMem != MAP_FAILED) munmap(vi->loMem, LOMEM_SIZE);
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if(vi->hole2 != MAP_FAILED) munmap(vi->hole2, HOLE2_SIZE);
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if(vi->hiMem != MAP_FAILED) munmap(vi->hiMem, HIMEM_SIZE);
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xfree(vi);
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}
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int
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Vm86DoInterrupt(Vm86InfoPtr vi, int num)
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{
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U16 seg, off;
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int code;
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if(num < 0 || num>256) {
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ErrorF("Interrupt %d doesn't exist\n");
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return -1;
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}
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seg = MMW(vi,num * 4 + 2);
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off = MMW(vi,num * 4);
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if(MAKE_POINTER(seg, off) < ROM_BASE ||
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MAKE_POINTER(seg, off) >= ROM_BASE + ROM_SIZE) {
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ErrorF("Interrupt pointer (seg %x off %x) doesn't point at ROM\n",
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seg, off);
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return -1;
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}
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memcpy(&(LM(vi,vi->ret_code)), retcode_data, sizeof(retcode_data));
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vi->vms.regs.eflags = IF_MASK | IOPL_MASK;
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vi->vms.regs.ss = POINTER_SEGMENT(vi->stack_base);
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vi->vms.regs.esp = STACK_SIZE;
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PUSHW(vi, IF_MASK | IOPL_MASK);
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PUSHW(vi, POINTER_SEGMENT(vi->ret_code));
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PUSHW(vi, POINTER_OFFSET(vi->ret_code));
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vi->vms.regs.cs = seg;
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vi->vms.regs.eip = off;
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OsBlockSignals ();
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code = vm86_loop(vi);
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OsReleaseSignals ();
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2007-11-24 10:55:21 -07:00
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if(code != 0)
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2006-11-26 11:13:41 -07:00
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return -1;
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2007-11-24 10:55:21 -07:00
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else
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2006-11-26 11:13:41 -07:00
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return 0;
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}
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int
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Vm86DoPOST(Vm86InfoPtr vi)
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{
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U16 seg, off;
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int code;
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seg = 0xC000;
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off = 3;
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if(MAKE_POINTER(seg, off) < ROM_BASE ||
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MAKE_POINTER(seg, off) >= ROM_BASE + ROM_SIZE) {
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ErrorF("BIOS pointer (seg %x off %x) doesn't point at ROM\n",
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seg, off);
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return -1;
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}
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memcpy(&(LM(vi,vi->ret_code)), retcode_data, sizeof(retcode_data));
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vi->vms.regs.ss = POINTER_SEGMENT(vi->stack_base);
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vi->vms.regs.esp = STACK_SIZE;
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PUSHW(vi, POINTER_SEGMENT(vi->ret_code));
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PUSHW(vi, POINTER_OFFSET(vi->ret_code));
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vi->vms.regs.cs = seg;
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vi->vms.regs.eip = off;
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OsBlockSignals ();
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code = vm86_loop(vi);
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OsReleaseSignals ();
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2007-11-24 10:55:21 -07:00
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if(code != 0)
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2006-11-26 11:13:41 -07:00
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return -1;
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2007-11-24 10:55:21 -07:00
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else
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return 0;
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2006-11-26 11:13:41 -07:00
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}
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#define DEBUG_VBE 0
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#if DEBUG_VBE
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#define DBG(x) ErrorF x; usleep(10*1000)
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#else
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#define DBG(x)
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#endif
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static inline U8
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vm86_inb(U16 port)
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{
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U8 value;
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if (port != 0x3da)
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{
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DBG(("inb 0x%04x", port));
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}
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asm volatile ("inb %w1,%b0" : "=a" (value) : "d" (port));
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if (port != 0x3da)
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{
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DBG((" = 0x%02x\n", value));
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}
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return value;
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}
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static inline U16
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vm86_inw(U16 port)
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{
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U16 value;
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DBG(("inw 0x%04x", port));
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asm volatile ("inw %w1,%w0" : "=a" (value) : "d" (port));
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DBG((" = 0x%04x\n", value));
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return value;
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}
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static inline U32
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vm86_inl(U16 port)
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{
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U32 value;
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DBG(("inl 0x%04x", port));
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asm volatile ("inl %w1,%0" : "=a" (value) : "d" (port));
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DBG((" = 0x%08x\n", value));
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return value;
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}
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static inline void
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|
|
vm86_outb(U16 port, U8 value)
|
|
|
|
|
{
|
|
|
|
|
#if 0
|
|
|
|
|
static U8 CR;
|
|
|
|
|
|
|
|
|
|
if (port == 0x3d4)
|
|
|
|
|
CR = value;
|
|
|
|
|
if (port == 0x3d5 && CR == 0xa4)
|
|
|
|
|
{
|
|
|
|
|
DBG(("outb 0x%04x = 0x%02x (skipped)\n", port, value));
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
DBG(("outb 0x%04x = 0x%02x\n", port, value));
|
|
|
|
|
asm volatile ("outb %b0,%w1" : : "a" (value), "d" (port));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
vm86_outw(U16 port, U16 value)
|
|
|
|
|
{
|
|
|
|
|
DBG(("outw 0x%04x = 0x%04x\n", port, value));
|
|
|
|
|
asm volatile ("outw %w0,%w1" : : "a" (value), "d" (port));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
|
vm86_outl(U16 port, U32 value)
|
|
|
|
|
{
|
|
|
|
|
DBG(("outl 0x%04x = 0x%08x\n", port, value));
|
|
|
|
|
asm volatile ("outl %0,%w1" : : "a" (value), "d" (port));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define SEG_CS 1
|
|
|
|
|
#define SEG_DS 2
|
|
|
|
|
#define SEG_ES 3
|
|
|
|
|
#define SEG_SS 4
|
|
|
|
|
#define SEG_GS 5
|
|
|
|
|
#define SEG_FS 6
|
|
|
|
|
#define REP 1
|
|
|
|
|
#define REPNZ 2
|
|
|
|
|
#define SET_8(_x, _y) (_x) = ((_x) & ~0xFF) | ((_y) & 0xFF);
|
|
|
|
|
#define SET_16(_x, _y) (_x) = ((_x) & ~0xFFFF) | ((_y) & 0xFFFF);
|
|
|
|
|
#define INC_IP(_i) SET_16(regs->eip, (regs->eip + _i))
|
|
|
|
|
#define AGAIN INC_IP(1); goto again;
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
vm86_emulate(Vm86InfoPtr vi)
|
|
|
|
|
{
|
|
|
|
|
struct vm86_regs *regs = &vi->vms.regs;
|
|
|
|
|
U8 opcode;
|
|
|
|
|
int size;
|
|
|
|
|
int pref_seg = 0, pref_rep = 0, pref_66 = 0, pref_67 = 0;
|
|
|
|
|
|
|
|
|
|
again:
|
|
|
|
|
if(!Vm86IsMemory(vi, MAKE_POINTER(regs->cs, regs->eip))) {
|
|
|
|
|
ErrorF("Trying to execute unmapped memory\n");
|
|
|
|
|
return -1;
|
|
|
|
|
}
|
|
|
|
|
opcode = Vm86Memory(vi, MAKE_POINTER(regs->cs, regs->eip));
|
|
|
|
|
switch(opcode) {
|
|
|
|
|
case 0x2E: pref_seg = SEG_CS; AGAIN;
|
|
|
|
|
case 0x3E: pref_seg = SEG_DS; AGAIN;
|
|
|
|
|
case 0x26: pref_seg = SEG_ES; AGAIN;
|
|
|
|
|
case 0x36: pref_seg = SEG_SS; AGAIN;
|
|
|
|
|
case 0x65: pref_seg = SEG_GS; AGAIN;
|
|
|
|
|
case 0x64: pref_seg = SEG_FS; AGAIN;
|
|
|
|
|
case 0x66: pref_66 = 1; AGAIN;
|
|
|
|
|
case 0x67: pref_67 = 1; AGAIN;
|
|
|
|
|
case 0xF2: pref_rep = REPNZ; AGAIN;
|
|
|
|
|
case 0xF3: pref_rep = REP; AGAIN;
|
|
|
|
|
|
|
|
|
|
case 0xEC: /* IN AL, DX */
|
|
|
|
|
SET_8(regs->eax, vm86_inb(regs->edx & 0xFFFF));
|
|
|
|
|
INC_IP(1);
|
|
|
|
|
break;
|
|
|
|
|
case 0xED: /* IN AX, DX */
|
|
|
|
|
if(pref_66)
|
|
|
|
|
regs->eax = vm86_inl(regs->edx & 0xFFFF);
|
|
|
|
|
else
|
|
|
|
|
SET_16(regs->eax, vm86_inw(regs->edx & 0xFFFF));
|
|
|
|
|
INC_IP(1);
|
|
|
|
|
break;
|
|
|
|
|
case 0xE4: /* IN AL, imm8 */
|
|
|
|
|
SET_8(regs->eax,
|
|
|
|
|
vm86_inb(Vm86Memory(vi, MAKE_POINTER(regs->cs, regs->eip+1))));
|
|
|
|
|
INC_IP(2);
|
|
|
|
|
break;
|
|
|
|
|
case 0xE5: /* IN AX, imm8 */
|
|
|
|
|
if(pref_66)
|
|
|
|
|
regs->eax =
|
|
|
|
|
vm86_inl(Vm86Memory(vi, MAKE_POINTER(regs->cs, regs->eip+1)));
|
|
|
|
|
else
|
|
|
|
|
SET_16(regs->eax,
|
|
|
|
|
vm86_inw(Vm86Memory(vi, MAKE_POINTER(regs->cs, regs->eip+1))));
|
|
|
|
|
INC_IP(2);
|
|
|
|
|
break;
|
|
|
|
|
case 0x6C: /* INSB */
|
|
|
|
|
case 0x6D: /* INSW */
|
|
|
|
|
if(opcode == 0x6C) {
|
|
|
|
|
Vm86WriteMemory(vi, MAKE_POINTER(regs->es, regs->edi),
|
|
|
|
|
vm86_inb(regs->edx & 0xFFFF));
|
|
|
|
|
size = 1;
|
|
|
|
|
} else if(pref_66) {
|
|
|
|
|
Vm86WriteMemoryL(vi, MAKE_POINTER(regs->es, regs->edi),
|
|
|
|
|
vm86_inl(regs->edx & 0xFFFF));
|
|
|
|
|
size = 4;
|
|
|
|
|
} else {
|
|
|
|
|
Vm86WriteMemoryW(vi, MAKE_POINTER(regs->es, regs->edi),
|
|
|
|
|
vm86_inw(regs->edx & 0xFFFF));
|
|
|
|
|
size = 2;
|
|
|
|
|
}
|
|
|
|
|
if(regs->eflags & (1<<10))
|
|
|
|
|
regs->edi -= size;
|
|
|
|
|
else
|
|
|
|
|
regs->edi += size;
|
|
|
|
|
if(pref_rep) {
|
|
|
|
|
if(pref_66) {
|
|
|
|
|
regs->ecx--;
|
|
|
|
|
if(regs->ecx != 0)
|
|
|
|
|
goto again;
|
|
|
|
|
} else {
|
|
|
|
|
SET_16(regs->ecx, regs->ecx - 1);
|
|
|
|
|
if((regs->ecx & 0xFFFF) != 0)
|
|
|
|
|
goto again;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
INC_IP(1);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0xEE: /* OUT DX, AL */
|
|
|
|
|
vm86_outb(regs->edx & 0xFFFF, regs->eax & 0xFF);
|
|
|
|
|
INC_IP(1);
|
|
|
|
|
break;
|
|
|
|
|
case 0xEF: /* OUT DX, AX */
|
|
|
|
|
if(pref_66)
|
|
|
|
|
vm86_outl(regs->edx & 0xFFFF, regs->eax);
|
|
|
|
|
else
|
|
|
|
|
vm86_outw(regs->edx & 0xFFFF, regs->eax & 0xFFFF);
|
|
|
|
|
INC_IP(1);
|
|
|
|
|
break;
|
|
|
|
|
case 0xE6: /* OUT imm8, AL */
|
|
|
|
|
vm86_outb(Vm86Memory(vi, MAKE_POINTER(regs->cs, regs->eip+1)),
|
|
|
|
|
regs->eax & 0xFF);
|
|
|
|
|
INC_IP(2);
|
|
|
|
|
break;
|
|
|
|
|
case 0xE7: /* OUT imm8, AX */
|
|
|
|
|
if(pref_66)
|
|
|
|
|
vm86_outl(Vm86Memory(vi, MAKE_POINTER(regs->cs, regs->eip+1)),
|
|
|
|
|
regs->eax);
|
|
|
|
|
else
|
|
|
|
|
vm86_outw(Vm86Memory(vi, MAKE_POINTER(regs->cs, regs->eip+1)),
|
|
|
|
|
regs->eax & 0xFFFF);
|
|
|
|
|
INC_IP(2);
|
|
|
|
|
break;
|
|
|
|
|
case 0x6E: /* OUTSB */
|
|
|
|
|
case 0x6F: /* OUTSW */
|
|
|
|
|
if(opcode == 0x6E) {
|
|
|
|
|
vm86_outb(regs->edx & 0xFFFF,
|
|
|
|
|
Vm86Memory(vi, MAKE_POINTER(regs->es, regs->edi)));
|
|
|
|
|
size = 1;
|
|
|
|
|
} else if(pref_66) {
|
|
|
|
|
vm86_outl(regs->edx & 0xFFFF,
|
|
|
|
|
Vm86Memory(vi, MAKE_POINTER(regs->es, regs->edi)));
|
|
|
|
|
size = 4;
|
|
|
|
|
} else {
|
|
|
|
|
vm86_outw(regs->edx & 0xFFFF,
|
|
|
|
|
Vm86Memory(vi, MAKE_POINTER(regs->es, regs->edi)));
|
|
|
|
|
size = 2;
|
|
|
|
|
}
|
|
|
|
|
if(regs->eflags & (1<<10))
|
|
|
|
|
regs->edi -= size;
|
|
|
|
|
else
|
|
|
|
|
regs->edi += size;
|
|
|
|
|
if(pref_rep) {
|
|
|
|
|
if(pref_66) {
|
|
|
|
|
regs->ecx--;
|
|
|
|
|
if(regs->ecx != 0)
|
|
|
|
|
goto again;
|
|
|
|
|
} else {
|
|
|
|
|
SET_16(regs->ecx, regs->ecx - 1);
|
|
|
|
|
if((regs->ecx & 0xFFFF) != 0)
|
|
|
|
|
goto again;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
INC_IP(1);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case 0x0F:
|
|
|
|
|
ErrorF("Hit 0F trap in VM86 code\n");
|
|
|
|
|
return -1;
|
|
|
|
|
case 0xF0:
|
|
|
|
|
ErrorF("Hit lock prefix in VM86 code\n");
|
|
|
|
|
return -1;
|
|
|
|
|
case 0xF4:
|
|
|
|
|
ErrorF("Hit HLT in VM86 code\n");
|
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
ErrorF("Unhandled GP fault in VM86 code (opcode = 0x%02X)\n",
|
|
|
|
|
opcode);
|
|
|
|
|
return -1;
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
#undef SEG_CS
|
|
|
|
|
#undef SEG_DS
|
|
|
|
|
#undef SEG_ES
|
|
|
|
|
#undef SEG_SS
|
|
|
|
|
#undef SEG_GS
|
|
|
|
|
#undef SEG_FS
|
|
|
|
|
#undef REP
|
|
|
|
|
#undef REPNZ
|
|
|
|
|
#undef SET_8
|
|
|
|
|
#undef SET_16
|
|
|
|
|
#undef INC_IP
|
|
|
|
|
#undef AGAIN
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
vm86_loop(Vm86InfoPtr vi)
|
|
|
|
|
{
|
|
|
|
|
int code;
|
|
|
|
|
|
|
|
|
|
while(1) {
|
|
|
|
|
code = vm86old(&vi->vms);
|
|
|
|
|
switch(VM86_TYPE(code)) {
|
|
|
|
|
case VM86_SIGNAL:
|
|
|
|
|
continue;
|
|
|
|
|
case VM86_UNKNOWN:
|
|
|
|
|
code = vm86_emulate(vi);
|
|
|
|
|
if(code < 0) {
|
|
|
|
|
Vm86Debug(vi);
|
|
|
|
|
return -1;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case VM86_INTx:
|
|
|
|
|
if(VM86_ARG(code) == 0xFF)
|
|
|
|
|
return 0;
|
|
|
|
|
else {
|
|
|
|
|
PUSHW(vi, vi->vms.regs.eflags)
|
|
|
|
|
PUSHW(vi, vi->vms.regs.cs);
|
|
|
|
|
PUSHW(vi, vi->vms.regs.eip);
|
|
|
|
|
vi->vms.regs.cs = MMW(vi,VM86_ARG(code) * 4 + 2);
|
|
|
|
|
vi->vms.regs.eip = MMW(vi,VM86_ARG(code) * 4);
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case VM86_STI:
|
|
|
|
|
ErrorF("VM86 code enabled interrupts\n");
|
|
|
|
|
Vm86Debug(vi);
|
|
|
|
|
return -1;
|
|
|
|
|
default:
|
2007-11-24 10:55:21 -07:00
|
|
|
|
if(code < 0) {
|
|
|
|
|
if(errno == ENOSYS) {
|
|
|
|
|
ErrorF("No vm86 support. Are you running on AMD64?\n");
|
|
|
|
|
} else {
|
2008-11-02 08:26:08 -07:00
|
|
|
|
ErrorF("vm86 failed (%s).\n", strerror(errno));
|
2007-11-24 10:55:21 -07:00
|
|
|
|
Vm86Debug(vi);
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
ErrorF("Unexpected result code 0x%X from vm86\n", code);
|
|
|
|
|
Vm86Debug(vi);
|
|
|
|
|
}
|
2006-11-26 11:13:41 -07:00
|
|
|
|
return -1;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
Vm86IsMemory(Vm86InfoPtr vi, U32 i)
|
|
|
|
|
{
|
|
|
|
|
if(i >= MAGICMEM_BASE && i< MAGICMEM_BASE + MAGICMEM_SIZE)
|
|
|
|
|
return 1;
|
|
|
|
|
else if(i >= LOMEM_BASE && i< LOMEM_BASE + LOMEM_SIZE)
|
|
|
|
|
return 1;
|
|
|
|
|
else if(i >= HIMEM_BASE && i< HIMEM_BASE + HIMEM_SIZE)
|
|
|
|
|
return 1;
|
|
|
|
|
else
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
U8
|
|
|
|
|
Vm86Memory(Vm86InfoPtr vi, U32 i)
|
|
|
|
|
{
|
|
|
|
|
if(i >= MAGICMEM_BASE && i< MAGICMEM_BASE + MAGICMEM_SIZE)
|
|
|
|
|
return MM(vi, i);
|
|
|
|
|
else if(i >= LOMEM_BASE && i< LOMEM_BASE + LOMEM_SIZE)
|
|
|
|
|
return LM(vi, i);
|
|
|
|
|
else if(i >= HIMEM_BASE && i< HIMEM_BASE + HIMEM_SIZE)
|
|
|
|
|
return HM(vi, i);
|
|
|
|
|
else {
|
|
|
|
|
ErrorF("Reading unmapped memory at 0x%08X\n", i);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
U16
|
|
|
|
|
Vm86MemoryW(Vm86InfoPtr vi, U32 i)
|
|
|
|
|
{
|
|
|
|
|
if(i >= MAGICMEM_BASE && i< MAGICMEM_BASE + MAGICMEM_SIZE)
|
|
|
|
|
return MMW(vi, i);
|
|
|
|
|
else if(i >= LOMEM_BASE && i< LOMEM_BASE + LOMEM_SIZE)
|
|
|
|
|
return LMW(vi, i);
|
|
|
|
|
else if(i >= HIMEM_BASE && i< HIMEM_BASE + HIMEM_SIZE)
|
|
|
|
|
return HMW(vi, i);
|
|
|
|
|
else {
|
|
|
|
|
ErrorF("Reading unmapped memory at 0x%08X\n", i);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
U32
|
|
|
|
|
Vm86MemoryL(Vm86InfoPtr vi, U32 i)
|
|
|
|
|
{
|
|
|
|
|
if(i >= MAGICMEM_BASE && i< MAGICMEM_BASE + MAGICMEM_SIZE)
|
|
|
|
|
return MML(vi, i);
|
|
|
|
|
else if(i >= LOMEM_BASE && i< LOMEM_BASE + LOMEM_SIZE)
|
|
|
|
|
return LML(vi, i);
|
|
|
|
|
else if(i >= HIMEM_BASE && i< HIMEM_BASE + HIMEM_SIZE)
|
|
|
|
|
return HML(vi, i);
|
|
|
|
|
else {
|
|
|
|
|
ErrorF("Reading unmapped memory at 0x%08X\n", i);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Vm86WriteMemory(Vm86InfoPtr vi, U32 i, U8 val)
|
|
|
|
|
{
|
|
|
|
|
if(i >= MAGICMEM_BASE && i< MAGICMEM_BASE + MAGICMEM_SIZE)
|
|
|
|
|
MM(vi, i) = val;
|
|
|
|
|
else if(i >= LOMEM_BASE && i< LOMEM_BASE + LOMEM_SIZE)
|
|
|
|
|
LM(vi, i) = val;
|
|
|
|
|
else if(i >= HIMEM_BASE && i< HIMEM_BASE + HIMEM_SIZE)
|
|
|
|
|
HM(vi, i) = val;
|
|
|
|
|
else {
|
|
|
|
|
ErrorF("Writing unmapped memory at 0x%08X\n", i);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Vm86WriteMemoryW(Vm86InfoPtr vi, U32 i, U16 val)
|
|
|
|
|
{
|
|
|
|
|
if(i >= MAGICMEM_BASE && i< MAGICMEM_BASE + MAGICMEM_SIZE)
|
|
|
|
|
MMW(vi, i) = val;
|
|
|
|
|
else if(i >= LOMEM_BASE && i< LOMEM_BASE + LOMEM_SIZE)
|
|
|
|
|
LMW(vi, i) = val;
|
|
|
|
|
else if(i >= HIMEM_BASE && i< HIMEM_BASE + HIMEM_SIZE)
|
|
|
|
|
HMW(vi, i) = val;
|
|
|
|
|
else {
|
|
|
|
|
ErrorF("Writing unmapped memory at 0x%08X\n", i);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Vm86WriteMemoryL(Vm86InfoPtr vi, U32 i, U32 val)
|
|
|
|
|
{
|
|
|
|
|
if(i >= MAGICMEM_BASE && i< MAGICMEM_BASE + MAGICMEM_SIZE)
|
|
|
|
|
MML(vi, i) = val;
|
|
|
|
|
else if(i >= LOMEM_BASE && i< LOMEM_BASE + LOMEM_SIZE)
|
|
|
|
|
LML(vi, i) = val;
|
|
|
|
|
else if(i >= HIMEM_BASE && i< HIMEM_BASE + HIMEM_SIZE)
|
|
|
|
|
HML(vi, i) = val;
|
|
|
|
|
else {
|
|
|
|
|
ErrorF("Writing unmapped memory at 0x%08X\n", i);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
Vm86AllocateMemory(Vm86InfoPtr vi, int n)
|
|
|
|
|
{
|
|
|
|
|
int ret;
|
|
|
|
|
if(n<0) {
|
|
|
|
|
ErrorF("Asked to allocate negative amount of memory\n");
|
|
|
|
|
return vi->brk;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
n = (n + 15) & ~15;
|
|
|
|
|
if(vi->brk + n > LOMEM_BASE + LOMEM_SIZE) {
|
|
|
|
|
ErrorF("Out of low memory\n");
|
|
|
|
|
exit(2);
|
|
|
|
|
}
|
|
|
|
|
ret = vi->brk;
|
|
|
|
|
vi->brk += n;
|
|
|
|
|
return ret;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
Vm86MarkMemory (Vm86InfoPtr vi)
|
|
|
|
|
{
|
|
|
|
|
return vi->brk;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Vm86ReleaseMemory (Vm86InfoPtr vi, int mark)
|
|
|
|
|
{
|
|
|
|
|
vi->brk = mark;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
vm86old(struct vm86_struct *vm)
|
|
|
|
|
{
|
|
|
|
|
int res;
|
|
|
|
|
|
|
|
|
|
asm volatile (
|
|
|
|
|
"pushl %%ebx\n\t"
|
|
|
|
|
"movl %2, %%ebx\n\t"
|
|
|
|
|
"movl %1,%%eax\n\t"
|
|
|
|
|
"int $0x80\n\t"
|
|
|
|
|
"popl %%ebx"
|
|
|
|
|
: "=a" (res) : "n" (113), "r" (vm));
|
|
|
|
|
if(res < 0) {
|
|
|
|
|
errno = -res;
|
|
|
|
|
res = -1;
|
|
|
|
|
} else
|
|
|
|
|
errno = 0;
|
|
|
|
|
return res;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Vm86Debug(Vm86InfoPtr vi)
|
|
|
|
|
{
|
|
|
|
|
struct vm86_regs *regs = &vi->vms.regs;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
ErrorF("eax=0x%08lX ebx=0x%08lX ecx=0x%08lX edx=0x%08lX\n",
|
|
|
|
|
regs->eax, regs->ebx, regs->ecx, regs->edx);
|
|
|
|
|
ErrorF("esi=0x%08lX edi=0x%08lX ebp=0x%08lX\n",
|
|
|
|
|
regs->esi, regs->edi, regs->ebp);
|
|
|
|
|
ErrorF("eip=0x%08lX esp=0x%08lX eflags=0x%08lX\n",
|
|
|
|
|
regs->eip, regs->esp, regs->eflags);
|
|
|
|
|
ErrorF("cs=0x%04lX ds=0x%04lX es=0x%04lX fs=0x%04lX gs=0x%04lX\n",
|
|
|
|
|
regs->cs, regs->ds, regs->es, regs->fs, regs->gs);
|
|
|
|
|
for(i=-7; i<8; i++) {
|
|
|
|
|
ErrorF(" %s%02X",
|
|
|
|
|
i==0?"->":"",
|
|
|
|
|
Vm86Memory(vi, MAKE_POINTER(regs->cs, regs->eip + i)));
|
|
|
|
|
}
|
|
|
|
|
ErrorF("\n");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#ifdef NOT_IN_X_SERVER
|
|
|
|
|
static void
|
|
|
|
|
ErrorF(char *f, ...)
|
|
|
|
|
{
|
|
|
|
|
va_list args;
|
|
|
|
|
va_start(args, f);
|
|
|
|
|
vfprintf(stderr, f, args);
|
|
|
|
|
va_end(args);
|
|
|
|
|
}
|
|
|
|
|
#endif
|