514 lines
13 KiB
C
514 lines
13 KiB
C
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/* COPYRIGHT AND PERMISSION NOTICE
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Copyright (c) 2000, 2001 Nokia Home Communications
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All rights reserved.
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, and/or sell copies of the Software, and to permit persons
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to whom the Software is furnished to do so, provided that the above
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copyright notice(s) and this permission notice appear in all copies of
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the Software and that both the above copyright notice(s) and this
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permission notice appear in supporting documentation.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT
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OF THIRD PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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HOLDERS INCLUDED IN THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY
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SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER
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RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF
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CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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Except as contained in this notice, the name of a copyright holder
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shall not be used in advertising or otherwise to promote the sale, use
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or other dealings in this Software without prior written authorization
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of the copyright holder.
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X Window System is a trademark of The Open Group */
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/* $RCSId: $ */
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/*
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* Author:
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* Pontus Lidman <pontus.lidman@nokia.com>
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*/
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#ifndef _I810_H_
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#define _I810_H_
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#include "i810_reg.h"
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/* Globals */
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typedef struct _I810Rec *I810Ptr;
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/* Linear region allocated in framebuffer.
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*/
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typedef struct {
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unsigned long Start;
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unsigned long End;
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unsigned long Size;
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} I810MemRange;
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typedef struct {
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int tail_mask;
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I810MemRange mem;
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unsigned char *virtual_start;
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int head;
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int tail;
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int space;
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} I810RingBuffer;
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typedef struct {
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unsigned char DisplayControl;
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unsigned char PixelPipeCfg0;
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unsigned char PixelPipeCfg1;
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unsigned char PixelPipeCfg2;
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unsigned short VideoClk2_M;
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unsigned short VideoClk2_N;
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unsigned char VideoClk2_DivisorSel;
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unsigned char AddressMapping;
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unsigned char IOControl;
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unsigned char BitBLTControl;
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unsigned char ExtVertTotal;
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unsigned char ExtVertDispEnd;
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unsigned char ExtVertSyncStart;
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unsigned char ExtVertBlankStart;
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unsigned char ExtHorizTotal;
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unsigned char ExtHorizBlank;
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unsigned char ExtOffset;
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unsigned char InterlaceControl;
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unsigned int LMI_FIFO_Watermark;
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unsigned int LprbTail;
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unsigned int LprbHead;
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unsigned int LprbStart;
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unsigned int LprbLen;
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unsigned int Fence[8];
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unsigned short OverlayActiveStart;
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unsigned short OverlayActiveEnd;
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} I810RegRec, *I810RegPtr;
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#define minb(p) *(volatile CARD8 *)(i810c->MMIOBase + (p))
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#define moutb(p,v) *(volatile CARD8 *)(i810c->MMIOBase + (p)) = (v)
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#define OUT_RING(n) { \
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if (I810_DEBUG & DEBUG_VERBOSE_RING) \
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ErrorF( "OUT_RING %x: %x\n", outring, n); \
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*(volatile unsigned int *)(virt + outring) = n; \
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outring += 4; \
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outring &= ringmask; \
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}
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#define ADVANCE_LP_RING() { \
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i810c->LpRing.tail = outring; \
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OUTREG(LP_RING + RING_TAIL, outring); \
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}
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#ifdef __GNUC__
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#define LP_RING_MESSAGE(n) \
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ErrorF("BEGIN_LP_RING %d in %s\n", n, __FUNCTION__)
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#else
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#define LP_RING_MESSAGE(n) \
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ErrorF("BEGIN_LP_RING %d in %s:%d\n", n, __FILE__, __LINE__)
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#endif
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#define LP_RING_LOCALS \
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unsigned int outring, ringmask; \
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volatile unsigned char *virt
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#define BEGIN_LP_RING(n) \
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if (n>2 && (I810_DEBUG&DEBUG_ALWAYS_SYNC)) \
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i810Sync(i810s); \
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if (i810c->LpRing.space < n*4) i810WaitLpRing(i810s, n*4, 0); \
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i810c->LpRing.space -= n*4; \
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if (I810_DEBUG & DEBUG_VERBOSE_RING) \
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LP_RING_MESSAGE(n); \
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outring = i810c->LpRing.tail; \
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ringmask = i810c->LpRing.tail_mask; \
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virt = i810c->LpRing.virtual_start;
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/* Memory mapped register access macros */
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#define INREG8(addr) *(volatile CARD8 *)(i810c->MMIOBase + (addr))
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#define INREG16(addr) *(volatile CARD16 *)(i810c->MMIOBase + (addr))
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#define INREG(addr) *(volatile CARD32 *)(i810c->MMIOBase + (addr))
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#define OUTREG8(addr, val) do { \
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*(volatile CARD8 *)(i810c->MMIOBase + (addr)) = (val); \
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if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) \
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ErrorF( "OUTREG8(%x, %x)\n", addr, val); \
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} while (0)
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#define OUTREG16(addr, val) do { \
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*(volatile CARD16 *)(i810c->MMIOBase + (addr)) = (val); \
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if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) \
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ErrorF( "OUTREG16(%x, %x)\n", addr, val); \
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} while (0)
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#define OUTREG(addr, val) do { \
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*(volatile CARD32 *)(i810c->MMIOBase + (addr)) = (val); \
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if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) \
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ErrorF( "OUTREG(%x, %x)\n", addr, val); \
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} while (0)
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/* To remove all debugging, make sure I810_DEBUG is defined as a
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* preprocessor symbol, and equal to zero.
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*/
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#define I810_DEBUG 0
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#ifndef I810_DEBUG
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#warning "Debugging enabled - expect reduced performance"
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extern int I810_DEBUG;
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#endif
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#define DEBUG_VERBOSE_ACCEL 0x1
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#define DEBUG_VERBOSE_SYNC 0x2
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#define DEBUG_VERBOSE_VGA 0x4
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#define DEBUG_VERBOSE_RING 0x8
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#define DEBUG_VERBOSE_OUTREG 0x10
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#define DEBUG_VERBOSE_MEMORY 0x20
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#define DEBUG_VERBOSE_CURSOR 0x40
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#define DEBUG_ALWAYS_SYNC 0x80
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#define DEBUG_VERBOSE_DRI 0x100
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/* Size of the mmio region.
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*/
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#define I810_REG_SIZE 0x80000
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/* PCI identifiers */
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#ifndef PCI_CHIP_I810
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#define PCI_CHIP_I810 0x7121
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#define PCI_CHIP_I810_DC100 0x7123
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#define PCI_CHIP_I810_E 0x7125
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#define PCI_CHIP_I815 0x1132
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#define PCI_CHIP_I810_BRIDGE 0x7120
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#define PCI_CHIP_I810_DC100_BRIDGE 0x7122
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#define PCI_CHIP_I810_E_BRIDGE 0x7124
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#define PCI_CHIP_I815_BRIDGE 0x1130
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#define PCI_CHIP_I845G 0x2562
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#endif
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#define IS_I810(i810c) (i810c->PciInfo->chipType == PCI_CHIP_I810 || \
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i810c->PciInfo->chipType == PCI_CHIP_I810_DC100 || \
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i810c->PciInfo->chipType == PCI_CHIP_I810_E)
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#define IS_I815(i810c) (i810c->PciInfo->chipType == PCI_CHIP_I815)
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/* default number of VGA registers stored internally */
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#define VGA_NUM_CRTC 25 /* 0x19 */
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#define VGA_NUM_SEQ 5
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#define VGA_NUM_GFX 9
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#define VGA_NUM_ATTR 21
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/*
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* Settings of standard VGA registers.
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*/
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typedef struct {
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unsigned char MiscOutReg; /* */
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unsigned char CRTC[VGA_NUM_CRTC]; /* Crtc Controller */
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unsigned char Sequencer[VGA_NUM_SEQ]; /* Video Sequencer */
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unsigned char Graphics[VGA_NUM_GFX]; /* Video Graphics */
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unsigned char Attribute[VGA_NUM_ATTR]; /* Video Atribute */
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unsigned char DAC[768]; /* Internal Colorlookuptable */
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} vgaRegRec, *vgaRegPtr;
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typedef struct _i810VGARec *i810VGAPtr;
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/* VGA registers */
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typedef struct _i810VGARec {
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int IOBase; /* I/O Base address */
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CARD8 * MMIOBase; /* Pointer to MMIO start */
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vgaRegRec SavedReg; /* saved registers */
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vgaRegRec ModeReg; /* register settings for
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current mode */
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Bool ShowOverscan;
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Bool paletteEnabled;
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Bool cmapSaved;
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} i810VGARec;
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typedef struct _i810CardInfo {
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int videoRam;
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int MaxClock;
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long FbMapSize;
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int cpp; /* chars per pixel */
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unsigned long LinearAddr;
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unsigned long MMIOAddr;
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unsigned char *MMIOBase;
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unsigned char *FbBase;
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Bool GttBound;
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Bool agpAcquired2d;
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int VramKey;
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unsigned long VramOffset;
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int DcacheKey;
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unsigned long DcacheOffset;
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int HwcursKey;
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unsigned long HwcursOffset;
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I810MemRange DcacheMem;
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I810MemRange SysMem;
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I810MemRange SavedDcacheMem;
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I810MemRange SavedSysMem;
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unsigned int bufferOffset; /* for I810SelectBuffer */
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Bool DoneFrontAlloc;
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BoxRec FbMemBox;
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I810MemRange FrontBuffer;
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I810MemRange Scratch;
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I810MemRange XvMem;
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int LmFreqSel;
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i810VGARec vga;
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I810RegRec SavedReg;
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I810RegRec ModeReg;
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I810RingBuffer LpRing;
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unsigned int BR[20];
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int CursorOffset;
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unsigned long CursorPhysical;
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unsigned long CursorStart;
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unsigned long OverlayPhysical;
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unsigned long OverlayStart;
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int colorKey;
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int nextColorExpandBuf;
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ScreenBlockHandlerProcPtr BlockHandler;
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#ifdef XV
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KdVideoAdaptorPtr adaptor;
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#endif
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} i810CardInfo;
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typedef struct _i810CardInfo I810CardInfo; /* compatibility */
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#define getI810CardInfo(kd) ((I810CardInfo *) ((kd)->card->driver))
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#define i810CardInfo(kd) I810CardInfo *i810c = getI810CardInfo(kd)
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#define getI810ScreenInfo(kd) ((I810ScreenInfo *) ((kd)->screen->driver))
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#define i810ScreenInfo(kd) I810ScreenInfo *i810s = getI810ScreenInfo(kd)
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typedef struct _i810Cursor {
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int width, height;
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int xhot, yhot;
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Bool has_cursor;
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CursorPtr pCursor;
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} i810Cursor, *i810CursorPtr;
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typedef struct _i810ScreenInfo {
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i810CardInfo *i810c;
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i810Cursor cursor;
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int pitch;
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KaaScreenInfoRec kaa;
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} i810ScreenInfo;
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typedef struct _i810ScreenInfo I810ScreenInfo; /* compatibility */
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#define I810_CURSOR_HEIGHT 64
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#define I810_CURSOR_WIDTH 64
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/* init functions (i810.c) */
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Bool
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i810CardInit (KdCardInfo *card);
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Bool
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i810ScreenInit (KdScreenInfo *screen);
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/* The cursor functions (i810_cursor.c) */
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Bool
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i810CursorInit(ScreenPtr pScreen);
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void
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i810CursorEnable (ScreenPtr pScreen);
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void
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i810CursorDisable (ScreenPtr pScreen);
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void
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i810CursorFini (ScreenPtr pScreen);
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/* Accel functions (i810draw.c) */
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Bool
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i810InitAccel(ScreenPtr);
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void
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i810EnableAccel (ScreenPtr);
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void
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i810DisableAccel (ScreenPtr);
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void
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i810FiniAccel (ScreenPtr);
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void
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i810FillBoxSolid (KdScreenInfo *screen, int nBox, BoxPtr pBox,
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unsigned long pixel, int alu, unsigned long planemask);
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extern KdCardFuncs i810Funcs;
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/* Standard VGA registers */
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#define VGA_ATTR_INDEX 0x3C0
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#define VGA_ATTR_DATA_W 0x3C0
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#define VGA_ATTR_DATA_R 0x3C1
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#define VGA_IN_STAT_0 0x3C2 /* read */
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#define VGA_MISC_OUT_W 0x3C2 /* write */
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#define VGA_ENABLE 0x3C3
|
||
|
|
#define VGA_SEQ_INDEX 0x3C4
|
||
|
|
#define VGA_SEQ_DATA 0x3C5
|
||
|
|
#define VGA_DAC_MASK 0x3C6
|
||
|
|
#define VGA_DAC_READ_ADDR 0x3C7
|
||
|
|
#define VGA_DAC_WRITE_ADDR 0x3C8
|
||
|
|
#define VGA_DAC_DATA 0x3C9
|
||
|
|
#define VGA_FEATURE_R 0x3CA /* read */
|
||
|
|
#define VGA_MISC_OUT_R 0x3CC /* read */
|
||
|
|
#define VGA_GRAPH_INDEX 0x3CE
|
||
|
|
#define VGA_GRAPH_DATA 0x3CF
|
||
|
|
|
||
|
|
#define VGA_IOBASE_MONO 0x3B0
|
||
|
|
#define VGA_IOBASE_COLOR 0x3D0
|
||
|
|
|
||
|
|
#define VGA_CRTC_INDEX_OFFSET 0x04
|
||
|
|
#define VGA_CRTC_DATA_OFFSET 0x05
|
||
|
|
#define VGA_IN_STAT_1_OFFSET 0x0A /* read */
|
||
|
|
#define VGA_FEATURE_W_OFFSET 0x0A /* write */
|
||
|
|
|
||
|
|
/* VGA stuff */
|
||
|
|
#define BIT_PLANE 3 /* Which plane we write to in mono mode */
|
||
|
|
|
||
|
|
/* DAC indices for white and black */
|
||
|
|
#define WHITE_VALUE 0x3F
|
||
|
|
#define BLACK_VALUE 0x00
|
||
|
|
#define OVERSCAN_VALUE 0x01
|
||
|
|
|
||
|
|
#define OVERSCAN 0x11 /* Index of OverScan register */
|
||
|
|
|
||
|
|
void
|
||
|
|
i810VGAUnlock(i810VGAPtr vgap);
|
||
|
|
|
||
|
|
void
|
||
|
|
i810VGALock(i810VGAPtr vgap);
|
||
|
|
|
||
|
|
Bool
|
||
|
|
i810VGAInit(KdScreenInfo *scrninfp, const KdMonitorTiming *t);
|
||
|
|
|
||
|
|
void
|
||
|
|
i810VGABlankScreen(KdCardInfo *card, Bool on);
|
||
|
|
|
||
|
|
void
|
||
|
|
i810AdjustFrame(KdScreenInfo *screen, int x, int y, int flags);
|
||
|
|
|
||
|
|
Bool
|
||
|
|
i810VGAMapMem(KdCardInfo *card);
|
||
|
|
|
||
|
|
void
|
||
|
|
i810VGASave(KdCardInfo *card, vgaRegPtr save, int flags);
|
||
|
|
|
||
|
|
void
|
||
|
|
i810PrintErrorState(i810CardInfo *i810c);
|
||
|
|
|
||
|
|
void
|
||
|
|
i810VGAGetIOBase(i810VGAPtr vgap);
|
||
|
|
|
||
|
|
Bool
|
||
|
|
i810InitVideo(ScreenPtr pScreen);
|
||
|
|
|
||
|
|
/*
|
||
|
|
* MMIO versions of the register access functions. These require
|
||
|
|
* hwp->MemBase to be set in such a way that when the standard VGA port
|
||
|
|
* address is added the correct memory address results.
|
||
|
|
*/
|
||
|
|
|
||
|
|
#define Vminb(p) ( *(volatile CARD8 *)(vgap->MMIOBase + (p)))
|
||
|
|
#define Vmoutb(p,v) ( *(volatile CARD8 *)(vgap->MMIOBase + (p)) = (v))
|
||
|
|
|
||
|
|
#define mmioWriteCrtc(vgap, index, value) { \
|
||
|
|
Vmoutb(vgap->IOBase + VGA_CRTC_INDEX_OFFSET, index); \
|
||
|
|
Vmoutb(vgap->IOBase + VGA_CRTC_DATA_OFFSET, value); \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define mmioReadCrtc(vgap, index) ( \
|
||
|
|
Vmoutb(vgap->IOBase + VGA_CRTC_INDEX_OFFSET, index), \
|
||
|
|
Vminb(vgap->IOBase + VGA_CRTC_DATA_OFFSET) \
|
||
|
|
)
|
||
|
|
|
||
|
|
#define mmioWriteGr(vgap, index, value) { \
|
||
|
|
Vmoutb(VGA_GRAPH_INDEX, index); \
|
||
|
|
Vmoutb(VGA_GRAPH_DATA, value); \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define mmioReadGr(vgap, index) ( \
|
||
|
|
Vmoutb(VGA_GRAPH_INDEX, index), \
|
||
|
|
Vminb(VGA_GRAPH_DATA) \
|
||
|
|
)
|
||
|
|
|
||
|
|
#define mmioWriteSeq(vgap, index, value) {\
|
||
|
|
Vmoutb(VGA_SEQ_INDEX, index); \
|
||
|
|
Vmoutb(VGA_SEQ_DATA, value); \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define mmioReadSeq(vgap, index) ( \
|
||
|
|
Vmoutb(VGA_SEQ_INDEX, index), \
|
||
|
|
Vminb(VGA_SEQ_DATA) \
|
||
|
|
)
|
||
|
|
|
||
|
|
#define mmioWriteAttr(vgap, index, value) { \
|
||
|
|
(void) Vminb(vgap->IOBase + VGA_IN_STAT_1_OFFSET); \
|
||
|
|
Vmoutb(VGA_ATTR_INDEX, index); \
|
||
|
|
Vmoutb(VGA_ATTR_DATA_W, value); \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define mmioReadAttr(vgap, index) ( \
|
||
|
|
(void) Vminb(vgap->IOBase + VGA_IN_STAT_1_OFFSET), \
|
||
|
|
Vmoutb(VGA_ATTR_INDEX, index), \
|
||
|
|
Vminb(VGA_ATTR_DATA_R) \
|
||
|
|
)
|
||
|
|
|
||
|
|
#define mmioWriteMiscOut(vgap, value) Vmoutb(VGA_MISC_OUT_W, value)
|
||
|
|
|
||
|
|
|
||
|
|
#define mmioReadMiscOut(vgap) Vminb(VGA_MISC_OUT_R)
|
||
|
|
|
||
|
|
#define mmioEnablePalette(vgap) { \
|
||
|
|
(void) Vminb(vgap->IOBase + VGA_IN_STAT_1_OFFSET); \
|
||
|
|
Vmoutb(VGA_ATTR_INDEX, 0x00); \
|
||
|
|
vgap->paletteEnabled = TRUE; \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define mmioDisablePalette(vgap) { \
|
||
|
|
(void) Vminb(vgap->IOBase + VGA_IN_STAT_1_OFFSET); \
|
||
|
|
Vmoutb(VGA_ATTR_INDEX, 0x20); \
|
||
|
|
vgap->paletteEnabled = FALSE; \
|
||
|
|
}
|
||
|
|
|
||
|
|
#define mmioWriteDacWriteAddr(vgap, value) Vmoutb(VGA_DAC_WRITE_ADDR, value)
|
||
|
|
|
||
|
|
#define mmioWriteDacData(vgap, value) Vmoutb(VGA_DAC_DATA, value)
|
||
|
|
|
||
|
|
#endif /* _I810_H_ */
|