2006-11-26 13:06:58 -07:00
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Version 1:
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Offset Type Description
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0 uint16_t Length of the PInS data, in bytes. This must be 64.
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2 uint16_t Product ID. Possible values are:
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0: MGA-S1P20 (2MB base with 175MHz RAMDAC)
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1: MGA-S1P21 (2MB base with 220MHz RAMDAC)
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2: Reserved
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3: Reserved
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4: MGA-S1P40 (4MB base with 175MHz RAMDAC)
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5: MGA-S1P41 (4MB base with 220MHz RAMDAC)
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4 char[8] Serial number of the board. NUL terminated string.
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12 uint16_t Manufacturing date of the board (at product test).
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Format (stored little-endian) yyyyyyymmmmddddd.
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14 uint16_t Identification of manufacturing site.
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16 uint16_t Number and revision level of the PCB. Format (stored
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little-endian): nnnnnnnnnnnrrrrr, where n = PCB number
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ex:576 (from 0->2047) and r = PCB revision (from 0->31).
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18 uint16_t Identification of any PMBs.
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20 uint8_t RAMDAC speed (0=175MHz, 1=220MHz).
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21 uint8_t RAMDAC type (0=TVP3026, 1=TVP3027).
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22 uint16_t Maximum PCLK of the ramdac.
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24 uint16_t Maximum LDCLK supported by the WRAM memory.
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26 uint16_t Maximum MCLK of base board.
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28 uint16_t Maximum MCLK of 4Mb board.
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30 uint16_t Maximum MCLK of 8Mb board.
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32 uint16_t Maximum MCLK of board with multimedia module.
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34 uint16_t Diagnostic test pass frequency.
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36 uint16_t Default VGA mode1 pixel frequency.
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38 uint16_t Default VGA mode2 pixel frequency.
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40 uint16_t Date of last BIOS programming / update.
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42 uint16_t Number of times BIOS has been programmed.
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44 uint32_t Support for up to 32 hardware/software options.
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48 uint32_t Support for up to 32 hardware/software features.
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52 uint16_t Definition of VGA mode MCLK.
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54 uint16_t Indicate the revision level of this header struct.
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56 char[7] Unused.
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63 uint8_t Check-sum byte.
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Version 2:
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Unless otherwise noted, all clock speeds stored in this version of the PInS
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data are stored as the clock speed in MHz minus 100. To convert a stored
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clock speed, C, to kHz, use ((C + 100) * 1000).
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Offset Type Description
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0 uint16_t PInS structure signature. This must be the 16-bit
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value (stored little-endian) 0x412E.
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2 uint8_t Length of the PInS data, in bytes. For version 2, this
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must be 64.
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3 uint8_t Reserved.
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4 uint16_t Version of the structure. For version 2, this must be the
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value (stored little-endian) 0x02XX.
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6 uint16_t Date of last BIOS programming / update.
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8 uint16_t Number of times BIOS has been programmed.
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10 uint16_t Product ID.
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12 char[16] Serial number of the board. NUL terminated string.
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28 char[6] Parts list identification. NUL terminated string.
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34 uint16_t Number and revision level of the PCB. Format (stored
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little-endian): nnnnnnnnnnnrrrrr, where n = PCB number
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ex:576 (from 0->2047) and r = PCB revision (from 0->31).
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36 uint32_t Support for up to 32 hardware/software features.
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40 uint8_t RAMDAC type.
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41 uint8_t RAMDAC speed. Stored using standard clock encoding (see
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above).
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42 uint8_t PclkMax
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43 uint8_t Memory clock. Stored using standard clock encoding (see
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above).
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44 uint8_t Maximum MCLK of base board.
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45 uint8_t Maximum MCLK of 4Mb board.
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46 uint8_t Maximum MCLK of 8Mb board.
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47 uint8_t Maximum MCLK of board with multimedia module.
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48 uint8_t TestClk
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49 uint8_t Default VGA mode1 pixel frequency.
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50 uint8_t Default VGA mode2 pixel frequency.
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51 uint8_t MCTLWTST
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52 uint8_t VidCtrl
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53 uint8_t Maximum MCLK of 12Mb board.
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54 uint8_t Maximum MCLK of 16Mb board.
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55 char[8] Unused
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63 uint8_t Check-sum byte
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Version 3:
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Unless otherwise noted, all clock speeds stored in this version of the PInS
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data are stored as the clock speed in MHz minus 100. To convert a stored
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clock speed, C, to kHz, use ((C + 100) * 1000).
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Offset Type Description
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0 uint16_t PInS structure signature. This must be the 16-bit
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value (stored little-endian) 0x412E.
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2 uint8_t Length of the PInS data, in bytes. For version 3, this
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must be 64.
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3 uint8_t Reserved.
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4 uint16_t Version of the structure. For version 3, this must be the
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value (stored little-endian) 0x03XX.
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6 uint16_t Date of last BIOS programming / update.
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8 uint16_t Number of times BIOS has been programmed.
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10 uint16_t Product ID.
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12 char[16] Serial number of the board. NUL terminated string.
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28 char[6] Parts list identification. NUL terminated string.
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34 uint16_t Number and revision level of the PCB. Format (stored
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little-endian): nnnnnnnnnnnrrrrr, where n = PCB number
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ex:576 (from 0->2047) and r = PCB revision (from 0->31).
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36 uint8_t RAMDAC speed. Stored using standard clock encoding (see
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above).
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37 char[15] Unknown?
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52 uint32_t OPTION? Stored little-endian.
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Bits Meaning
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0 - 4 Unknown?
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5 0 = Reference PLL speed is 27.050MHz.
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1 = Reference PLL speed is 14.318MHz.
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6 - 31 Unknown?
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56 uint16_t MEMRDBK?
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58 uint32_t OPTION2?
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62 char Unused
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63 uint8_t Check-sum byte
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Version 4:
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Unless otherwise noted, all clock speeds stored in this version of the PInS
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data are stored as the clock speed in MHz divided by 4. To convert a stored
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clock speed, C, to kHz, use ((C * 4) * 1000).
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Offset Type Description
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0 uint16_t PInS structure signature. This must be the 16-bit
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value (stored little-endian) 0x412E.
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2 uint8_t Length of the PInS data, in bytes. For version 4, this
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must be 128.
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3 uint8_t Reserved.
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4 uint16_t Version of the structure. For version 4, this must be the
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value (stored little-endian) 0x04XX.
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6 uint16_t Date of last BIOS programming / update.
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8 uint16_t Number of times BIOS has been programmed.
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10 uint16_t Product ID.
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12 char[16] Serial number of the board. NUL terminated string.
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28 char[6] Parts list identification. NUL terminated string.
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34 uint16_t Number and revision level of the PCB. Format (stored
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little-endian): nnnnnnnnnnnrrrrr, where n = PCB number
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ex:576 (from 0->2047) and r = PCB revision (from 0->31).
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36 char Unknown?
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37 char Unknown?
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38 uint8_t VCO max for system PLL
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39 uint8_t VCO max for pixel PLL
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40 char[13] Unknown?
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53 uint8_t OPTION?
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54 char[11] Unknown?
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65 uint8_t System PLL? Stored using standard clock encoding (see
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above).
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66 char Unknown?
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67 uint32_t OPTION3? This offset seems wrong, but that's what
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matroxfb does.
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71 char[15] Unknown?
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86 uint16_t MEMRDBK?
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88 char[4] Unknown?
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92 uint32_t OPTIONx?
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Bits Meaning
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0 0 = Reference PLL speed is 27.050MHz.
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1 = Reference PLL speed is 14.318MHz.
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1 - 31 Unknown?
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96 char[21] Unknown?
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127 uint8_t Check-sum byte
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Version 5:
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Unless otherwise noted, all clock speeds stored in this version of the PInS
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data are stored as the clock speed in MHz divided by 6 for version 0x500 or
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by 8 for all other versions. To convert a stored clock speed, C, to kHz, on
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version 0x0500, use ((C * 6) * 1000). For all other versions, use ((C * 8) *
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1000).
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Offset Type Description
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0 uint16_t PInS structure signature. This must be the 16-bit
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value (stored little-endian) 0x412E.
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2 uint8_t Length of the PInS data, in bytes. For version 5, this
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must be 128.
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3 uint8_t Reserved.
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4 uint16_t Version of the structure. For version 5, this must be the
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value (stored little-endian) 0x05XX.
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6 uint16_t Date of last BIOS programming / update.
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8 uint16_t Number of times BIOS has been programmed.
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10 uint16_t Product ID.
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12 char[16] Serial number of the board. NUL terminated string.
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28 char[6] Parts list identification. NUL terminated string.
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34 uint16_t Number and revision level of the PCB. Format (stored
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little-endian): nnnnnnnnnnnrrrrr, where n = PCB number
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ex:576 (from 0->2047) and r = PCB revision (from 0->31).
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36 uint8_t VCO max for system PLL. Stored using standard clock
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encoding (see above).
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37 uint8_t VCO max for video PLL. Stored using standard clock
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encoding (see above).
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38 uint8_t VCO max for pixel PLL. Stored using standard clock
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encoding (see above).
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39 char[9] Unknown?
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48 uint32_t OPTION1?
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52 uint32_t OPTION2?
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56 char[38] Unknown?
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94 uint32_t OPTION3?
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98 uint32_t MCTLWTST?
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102 uint32_t MEMMISC?
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106 uint32_t MEMRDBK?
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110 uint32_t OPTIONx?
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Bits Meaning
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0 0 = Reference PLL speed is 27.050MHz.
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1 = Reference PLL speed is 14.318MHz.
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1 - 31 Unknown?
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114 uint16_t MEMINFO?
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Bits Meaning
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0 - 4 Unknown
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5 - 6 0 = SDR memory installed?
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1 = DDR memory installed
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2 = Unknown
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3 = Unknown
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7 Unknown
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8 EMRSWEN?
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9 Has DLL?
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10 Core uses MCTLWTST?
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11 - 15 MCTLWTST values for core?
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2008-07-29 14:02:36 -06:00
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116 uint16_t Display Info.
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Bits Meaning
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0-3 Primary display info (see below)
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4-7 Secondary display info (see below)
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8-10 Primary modes (see below)
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13 Default output
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0 = default output is secondary connector
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1 = default output is primary connector
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12-14 Secondary modes (see below)
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15 Primary hardware dectect
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0 = hardware detection is off
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1 = use hardware detection to determine main output
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Display info values:
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0000 None
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0001 HD15
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0010 DVI
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0011 TV
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x1xx Reserved
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1xxx Reserved
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Modes values:
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xx1 Analog
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x1x Digital
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1xx TV
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118 char[3] Unknown?
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2006-11-26 13:06:58 -07:00
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121 uint8_t VCO min for system PLL. Stored using standard clock
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encoding (see above).
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122 uint8_t VCO min for video PLL. Stored using standard clock
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encoding (see above).
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123 uint8_t VCO min for pixel PLL. Stored using standard clock
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encoding (see above).
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124 char[3] Unknown?
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127 uint8_t Check-sum byte
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