2008-05-21 14:19:51 -06:00
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/*
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* Copyright © 2006 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Xiang Haihao <haihao.xiang@intel.com>
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*
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*/
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#ifndef _I915XVMC_H
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#define _I915XVMC_H
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#include "intel_xvmc.h"
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#include "i915_hwmc.h"
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#define I915_SUBPIC_PALETTE_SIZE 16
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#define MAX_SUBCONTEXT_LEN 1024
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#define PCI_CHIP_I915_G 0x2582
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#define PCI_CHIP_I915_GM 0x2592
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#define PCI_CHIP_I945_G 0x2772
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#define PCI_CHIP_I945_GM 0x27A2
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#define PCI_CHIP_I945_GME 0x27AE
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#define PCI_CHIP_G33_G 0x29C2
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#define PCI_CHIP_Q35_G 0x29B2
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#define PCI_CHIP_Q33_G 0x29D2
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/*
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* i915XvMCContext:
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* Private Context data referenced via the privData
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* pointer in the XvMCContext structure.
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*/
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typedef struct _i915XvMCContext {
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unsigned int ctxno;
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unsigned int last_flip;
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unsigned int dual_prime; /* Flag to identify when dual prime is in use. */
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unsigned int yStride;
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unsigned int uvStride;
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unsigned short ref;
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unsigned int depth;
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XvPortID port; /* Xv Port ID when displaying */
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int haveXv; /* Have I initialized the Xv
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* connection for this surface? */
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XvImage *xvImage; /* Fake Xv Image used for command
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* buffer transport to the X server */
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GC gc; /* X GC needed for displaying */
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Drawable draw; /* Drawable to undisplay from */
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void *drawHash;
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int deviceID;
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2008-05-21 14:19:51 -06:00
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2010-05-10 16:32:28 -06:00
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intel_xvmc_drm_map_t sis;
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intel_xvmc_drm_map_t msb;
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intel_xvmc_drm_map_t ssb;
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intel_xvmc_drm_map_t psp;
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intel_xvmc_drm_map_t psc;
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intel_xvmc_drm_map_t corrdata;
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2008-05-21 14:19:51 -06:00
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} i915XvMCContext;
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/*
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* i915XvMCSubpicture:
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* Private data structure for each XvMCSubpicture. This
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* structure is referenced by the privData pointer in the XvMCSubpicture
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* structure.
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*/
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typedef struct _i915XvMCSubpicture {
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unsigned int srfNo;
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unsigned int last_render;
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unsigned int last_flip;
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unsigned int pitch;
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unsigned char palette[3][16];
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intel_xvmc_drm_map_t srf;
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i915XvMCContext *privContext;
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2008-05-21 14:19:51 -06:00
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} i915XvMCSubpicture;
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/* Number of YUV buffers per surface */
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#define I830_MAX_BUFS 2
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/*
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* i915XvMCSurface: Private data structure for each XvMCSurface. This
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* structure is referenced by the privData pointer in the XvMCSurface
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* structure.
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*/
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typedef struct _i915XvMCSurface {
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unsigned int srfNo; /* XvMC private surface numbers */
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unsigned int last_render;
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unsigned int last_flip;
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unsigned int yStride; /* Stride of YUV420 Y component. */
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unsigned int uvStride;
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unsigned int width; /* Dimensions */
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unsigned int height;
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intel_xvmc_drm_map_t srf;
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i915XvMCContext *privContext;
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i915XvMCSubpicture *privSubPic; /* Subpicture to be blended when
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* displaying. NULL if none. */
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2008-05-21 14:19:51 -06:00
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} i915XvMCSurface;
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#endif /* _I915XVMC_H */
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