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c007ce824d
Preparation was in CL 134570043. This CL contains only the effect of 'hg mv src/pkg/* src'. For more about the move, see golang.org/s/go14nopkg.
177 lines
3.9 KiB
ArmAsm
177 lines
3.9 KiB
ArmAsm
// Inferno's libkern/memmove-386.s
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// http://code.google.com/p/inferno-os/source/browse/libkern/memmove-386.s
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//
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// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
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// Revisions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com). All rights reserved.
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// Portions Copyright 2009 The Go Authors. All rights reserved.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// THE SOFTWARE.
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// +build !plan9
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#include "textflag.h"
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TEXT runtime·memmove(SB), NOSPLIT, $0-12
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MOVL to+0(FP), DI
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MOVL from+4(FP), SI
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MOVL n+8(FP), BX
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// REP instructions have a high startup cost, so we handle small sizes
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// with some straightline code. The REP MOVSL instruction is really fast
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// for large sizes. The cutover is approximately 1K. We implement up to
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// 128 because that is the maximum SSE register load (loading all data
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// into registers lets us ignore copy direction).
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tail:
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TESTL BX, BX
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JEQ move_0
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CMPL BX, $2
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JBE move_1or2
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CMPL BX, $4
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JBE move_3or4
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CMPL BX, $8
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JBE move_5through8
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CMPL BX, $16
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JBE move_9through16
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TESTL $0x4000000, runtime·cpuid_edx(SB) // check for sse2
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JEQ nosse2
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CMPL BX, $32
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JBE move_17through32
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CMPL BX, $64
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JBE move_33through64
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CMPL BX, $128
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JBE move_65through128
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// TODO: use branch table and BSR to make this just a single dispatch
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nosse2:
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/*
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* check and set for backwards
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*/
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CMPL SI, DI
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JLS back
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/*
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* forward copy loop
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*/
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forward:
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MOVL BX, CX
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SHRL $2, CX
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ANDL $3, BX
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REP; MOVSL
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JMP tail
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/*
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* check overlap
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*/
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back:
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MOVL SI, CX
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ADDL BX, CX
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CMPL CX, DI
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JLS forward
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/*
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* whole thing backwards has
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* adjusted addresses
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*/
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ADDL BX, DI
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ADDL BX, SI
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STD
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/*
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* copy
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*/
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MOVL BX, CX
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SHRL $2, CX
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ANDL $3, BX
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SUBL $4, DI
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SUBL $4, SI
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REP; MOVSL
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CLD
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ADDL $4, DI
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ADDL $4, SI
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SUBL BX, DI
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SUBL BX, SI
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JMP tail
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move_1or2:
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MOVB (SI), AX
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MOVB -1(SI)(BX*1), CX
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MOVB AX, (DI)
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MOVB CX, -1(DI)(BX*1)
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RET
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move_0:
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RET
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move_3or4:
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MOVW (SI), AX
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MOVW -2(SI)(BX*1), CX
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MOVW AX, (DI)
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MOVW CX, -2(DI)(BX*1)
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RET
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move_5through8:
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MOVL (SI), AX
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MOVL -4(SI)(BX*1), CX
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MOVL AX, (DI)
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MOVL CX, -4(DI)(BX*1)
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RET
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move_9through16:
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MOVL (SI), AX
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MOVL 4(SI), CX
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MOVL -8(SI)(BX*1), DX
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MOVL -4(SI)(BX*1), BP
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MOVL AX, (DI)
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MOVL CX, 4(DI)
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MOVL DX, -8(DI)(BX*1)
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MOVL BP, -4(DI)(BX*1)
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RET
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move_17through32:
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MOVOU (SI), X0
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MOVOU -16(SI)(BX*1), X1
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MOVOU X0, (DI)
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MOVOU X1, -16(DI)(BX*1)
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RET
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move_33through64:
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MOVOU (SI), X0
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MOVOU 16(SI), X1
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MOVOU -32(SI)(BX*1), X2
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MOVOU -16(SI)(BX*1), X3
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MOVOU X0, (DI)
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MOVOU X1, 16(DI)
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MOVOU X2, -32(DI)(BX*1)
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MOVOU X3, -16(DI)(BX*1)
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RET
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move_65through128:
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MOVOU (SI), X0
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MOVOU 16(SI), X1
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MOVOU 32(SI), X2
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MOVOU 48(SI), X3
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MOVOU -64(SI)(BX*1), X4
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MOVOU -48(SI)(BX*1), X5
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MOVOU -32(SI)(BX*1), X6
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MOVOU -16(SI)(BX*1), X7
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MOVOU X0, (DI)
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MOVOU X1, 16(DI)
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MOVOU X2, 32(DI)
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MOVOU X3, 48(DI)
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MOVOU X4, -64(DI)(BX*1)
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MOVOU X5, -48(DI)(BX*1)
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MOVOU X6, -32(DI)(BX*1)
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MOVOU X7, -16(DI)(BX*1)
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RET
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