bdd0f0f780
This fixes two independent problems: We normally propagate desired registers backwards through opcodes that are marked resultInArg0. Unfortunately for the desired register computation, ADDQconst is not marked as resultInArg0. This is because the amd64 backend can write it out as LEAQ instead if the input and output registers don't match. For desired register purposes, we want to treat ADDQconst as resultInArg0, so that we get an ADDQ instead of a LEAQ if we can. Desired registers don't currently work for tuple-generating opcodes. Declare that the desired register applies to the first element of the tuple, and propagate the desired register back through Select0. Noticed when fixing #51964 Change-Id: I83346b988882cd58c2d7e7e5b419a2b9a244ab66 Reviewed-on: https://go-review.googlesource.com/c/go/+/396035 Trust: Keith Randall <khr@golang.org> Run-TryBot: Keith Randall <khr@golang.org> Reviewed-by: David Chase <drchase@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> |
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SECURITY.md |
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