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0ae3b7cb74
Some rules for PPC64 were checking for a case where a shift followed by an 'and' of a mask could be lowered, depending on the format of the mask. The function to verify if the mask was valid for this purpose was not checking if the mask was 0 which we don't want to allow. This case can happen if previous optimizations resulted in that mask value. This fixes isPPC64ValidShiftMask to check for a mask of 0 and return false. This also adds a codegen testcase to verify it doesn't try to match the rules in the future. Fixes #42610 Change-Id: I565d94e88495f51321ab365d6388c01e791b4dbb Reviewed-on: https://go-review.googlesource.com/c/go/+/270358 Run-TryBot: Lynn Boger <laboger@linux.vnet.ibm.com> TryBot-Result: Go Bot <gobot@golang.org> Reviewed-by: Paul Murphy <murp@ibm.com> Reviewed-by: Carlos Eduardo Seo <carlos.seo@linaro.org> Trust: Lynn Boger <laboger@linux.vnet.ibm.com>
31 lines
673 B
Go
31 lines
673 B
Go
// asmcheck
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// Copyright 2020 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// Don't allow 0 masks in shift lowering rules on ppc64x.
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// See issue 42610.
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package codegen
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func f32(a []int32, i uint32) {
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g := func(p int32) int32 {
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i = uint32(p) * (uint32(p) & (i & 1))
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return 1
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}
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// ppc64le: -"RLWNIM"
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// ppc64: -"RLWNIM"
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a[0] = g(8) >> 1
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}
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func f(a []int, i uint) {
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g := func(p int) int {
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i = uint(p) * (uint(p) & (i & 1))
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return 1
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}
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// ppc64le: -"RLDIC"
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// ppc64: -"RLDIC"
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a[0] = g(8) >> 1
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}
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