mirror of
https://github.com/golang/go
synced 2024-10-04 14:21:21 -06:00
9f647288ef
Change ARM context register to R7, to get out of the way of the register allocator during the compilation of the prologue statements (it wants to use R0 as a temporary). Step 2 of http://golang.org/s/go11func. R=ken2 CC=golang-dev https://golang.org/cl/7369048
1129 lines
20 KiB
C
1129 lines
20 KiB
C
// Copyright 2009 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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#undef EXTERN
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#define EXTERN
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#include <u.h>
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#include <libc.h>
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#include "gg.h"
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#include "opt.h"
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void
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defframe(Prog *ptxt)
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{
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// fill in argument size
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ptxt->to.offset2 = rnd(curfn->type->argwid, widthptr);
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// fill in final stack size
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if(stksize > maxstksize)
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maxstksize = stksize;
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ptxt->to.offset = rnd(maxstksize+maxarg, widthptr);
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maxstksize = 0;
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}
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// Sweep the prog list to mark any used nodes.
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void
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markautoused(Prog* p)
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{
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for (; p; p = p->link) {
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if (p->from.type == D_AUTO && p->from.node)
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p->from.node->used = 1;
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if (p->to.type == D_AUTO && p->to.node)
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p->to.node->used = 1;
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}
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}
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// Fixup instructions after compactframe has moved all autos around.
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void
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fixautoused(Prog* p)
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{
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for (; p; p = p->link) {
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if (p->from.type == D_AUTO && p->from.node)
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p->from.offset += p->from.node->stkdelta;
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if (p->to.type == D_AUTO && p->to.node)
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p->to.offset += p->to.node->stkdelta;
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}
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}
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void
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clearfat(Node *nl)
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{
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uint32 w, c, q;
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Node n1;
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/* clear a fat object */
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if(debug['g'])
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dump("\nclearfat", nl);
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w = nl->type->width;
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// Avoid taking the address for simple enough types.
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if(componentgen(N, nl))
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return;
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c = w % 4; // bytes
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q = w / 4; // quads
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gconreg(AMOVL, 0, D_AX);
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nodreg(&n1, types[tptr], D_DI);
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agen(nl, &n1);
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if(q >= 4) {
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gconreg(AMOVL, q, D_CX);
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gins(AREP, N, N); // repeat
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gins(ASTOSL, N, N); // STOL AL,*(DI)+
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} else
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while(q > 0) {
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gins(ASTOSL, N, N); // STOL AL,*(DI)+
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q--;
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}
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if(c >= 4) {
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gconreg(AMOVL, c, D_CX);
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gins(AREP, N, N); // repeat
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gins(ASTOSB, N, N); // STOB AL,*(DI)+
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} else
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while(c > 0) {
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gins(ASTOSB, N, N); // STOB AL,*(DI)+
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c--;
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}
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}
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/*
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* generate:
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* call f
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* proc=-1 normal call but no return
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* proc=0 normal call
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* proc=1 goroutine run in new proc
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* proc=2 defer call save away stack
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* proc=3 normal call to C pointer (not Go func value)
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*/
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void
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ginscall(Node *f, int proc)
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{
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Prog *p;
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Node reg, r1, con;
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switch(proc) {
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default:
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fatal("ginscall: bad proc %d", proc);
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break;
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case 0: // normal call
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case -1: // normal call but no return
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if(f->op == ONAME && f->class == PFUNC) {
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p = gins(ACALL, N, f);
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afunclit(&p->to, f);
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if(proc == -1 || noreturn(p))
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gins(AUNDEF, N, N);
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break;
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}
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nodreg(®, types[tptr], D_DX);
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nodreg(&r1, types[tptr], D_BX);
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gmove(f, ®);
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reg.op = OINDREG;
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gmove(®, &r1);
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reg.op = OREGISTER;
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gins(ACALL, ®, &r1);
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break;
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case 3: // normal call of c function pointer
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gins(ACALL, N, f);
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break;
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case 1: // call in new proc (go)
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case 2: // deferred call (defer)
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nodreg(®, types[TINT32], D_CX);
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gins(APUSHL, f, N);
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nodconst(&con, types[TINT32], argsize(f->type));
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gins(APUSHL, &con, N);
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if(proc == 1)
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ginscall(newproc, 0);
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else
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ginscall(deferproc, 0);
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gins(APOPL, N, ®);
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gins(APOPL, N, ®);
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if(proc == 2) {
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nodreg(®, types[TINT64], D_AX);
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gins(ATESTL, ®, ®);
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patch(gbranch(AJNE, T, -1), retpc);
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}
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break;
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}
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}
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/*
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* n is call to interface method.
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* generate res = n.
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*/
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void
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cgen_callinter(Node *n, Node *res, int proc)
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{
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Node *i, *f;
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Node tmpi, nodi, nodo, nodr, nodsp;
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i = n->left;
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if(i->op != ODOTINTER)
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fatal("cgen_callinter: not ODOTINTER %O", i->op);
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f = i->right; // field
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if(f->op != ONAME)
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fatal("cgen_callinter: not ONAME %O", f->op);
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i = i->left; // interface
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if(!i->addable) {
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tempname(&tmpi, i->type);
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cgen(i, &tmpi);
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i = &tmpi;
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}
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genlist(n->list); // assign the args
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// i is now addable, prepare an indirected
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// register to hold its address.
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igen(i, &nodi, res); // REG = &inter
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nodindreg(&nodsp, types[tptr], D_SP);
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nodi.type = types[tptr];
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nodi.xoffset += widthptr;
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cgen(&nodi, &nodsp); // 0(SP) = 4(REG) -- i.data
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regalloc(&nodo, types[tptr], res);
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nodi.type = types[tptr];
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nodi.xoffset -= widthptr;
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cgen(&nodi, &nodo); // REG = 0(REG) -- i.tab
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regfree(&nodi);
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regalloc(&nodr, types[tptr], &nodo);
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if(n->left->xoffset == BADWIDTH)
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fatal("cgen_callinter: badwidth");
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nodo.op = OINDREG;
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nodo.xoffset = n->left->xoffset + 3*widthptr + 8;
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if(proc == 0) {
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// plain call: use direct c function pointer - more efficient
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cgen(&nodo, &nodr); // REG = 20+offset(REG) -- i.tab->fun[f]
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proc = 3;
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} else {
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// go/defer. generate go func value.
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gins(ALEAL, &nodo, &nodr); // REG = &(20+offset(REG)) -- i.tab->fun[f]
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}
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// BOTCH nodr.type = fntype;
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nodr.type = n->left->type;
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ginscall(&nodr, proc);
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regfree(&nodr);
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regfree(&nodo);
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setmaxarg(n->left->type);
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}
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/*
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* generate function call;
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* proc=0 normal call
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* proc=1 goroutine run in new proc
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* proc=2 defer call save away stack
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*/
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void
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cgen_call(Node *n, int proc)
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{
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Type *t;
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Node nod, afun;
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if(n == N)
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return;
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if(n->left->ullman >= UINF) {
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// if name involves a fn call
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// precompute the address of the fn
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tempname(&afun, types[tptr]);
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cgen(n->left, &afun);
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}
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genlist(n->list); // assign the args
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t = n->left->type;
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setmaxarg(t);
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// call tempname pointer
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if(n->left->ullman >= UINF) {
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regalloc(&nod, types[tptr], N);
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cgen_as(&nod, &afun);
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nod.type = t;
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ginscall(&nod, proc);
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regfree(&nod);
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return;
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}
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// call pointer
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if(n->left->op != ONAME || n->left->class != PFUNC) {
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regalloc(&nod, types[tptr], N);
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cgen_as(&nod, n->left);
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nod.type = t;
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ginscall(&nod, proc);
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regfree(&nod);
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return;
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}
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// call direct
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n->left->method = 1;
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ginscall(n->left, proc);
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}
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/*
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* call to n has already been generated.
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* generate:
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* res = return value from call.
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*/
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void
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cgen_callret(Node *n, Node *res)
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{
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Node nod;
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Type *fp, *t;
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Iter flist;
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t = n->left->type;
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if(t->etype == TPTR32 || t->etype == TPTR64)
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t = t->type;
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fp = structfirst(&flist, getoutarg(t));
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if(fp == T)
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fatal("cgen_callret: nil");
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memset(&nod, 0, sizeof(nod));
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nod.op = OINDREG;
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nod.val.u.reg = D_SP;
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nod.addable = 1;
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nod.xoffset = fp->width;
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nod.type = fp->type;
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cgen_as(res, &nod);
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}
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/*
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* call to n has already been generated.
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* generate:
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* res = &return value from call.
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*/
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void
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cgen_aret(Node *n, Node *res)
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{
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Node nod1, nod2;
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Type *fp, *t;
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Iter flist;
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t = n->left->type;
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if(isptr[t->etype])
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t = t->type;
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fp = structfirst(&flist, getoutarg(t));
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if(fp == T)
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fatal("cgen_aret: nil");
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memset(&nod1, 0, sizeof(nod1));
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nod1.op = OINDREG;
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nod1.val.u.reg = D_SP;
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nod1.addable = 1;
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nod1.xoffset = fp->width;
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nod1.type = fp->type;
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if(res->op != OREGISTER) {
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regalloc(&nod2, types[tptr], res);
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gins(ALEAL, &nod1, &nod2);
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gins(AMOVL, &nod2, res);
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regfree(&nod2);
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} else
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gins(ALEAL, &nod1, res);
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}
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/*
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* generate return.
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* n->left is assignments to return values.
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*/
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void
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cgen_ret(Node *n)
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{
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genlist(n->list); // copy out args
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if(retpc)
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gjmp(retpc);
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else
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gins(ARET, N, N);
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}
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/*
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* generate += *= etc.
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*/
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void
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cgen_asop(Node *n)
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{
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Node n1, n2, n3, n4;
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Node *nl, *nr;
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Prog *p1;
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Addr addr;
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int a;
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nl = n->left;
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nr = n->right;
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if(nr->ullman >= UINF && nl->ullman >= UINF) {
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tempname(&n1, nr->type);
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cgen(nr, &n1);
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n2 = *n;
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n2.right = &n1;
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cgen_asop(&n2);
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goto ret;
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}
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if(!isint[nl->type->etype])
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goto hard;
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if(!isint[nr->type->etype])
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goto hard;
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if(is64(nl->type) || is64(nr->type))
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goto hard;
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switch(n->etype) {
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case OADD:
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if(smallintconst(nr))
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if(mpgetfix(nr->val.u.xval) == 1) {
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a = optoas(OINC, nl->type);
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if(nl->addable) {
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gins(a, N, nl);
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goto ret;
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}
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if(sudoaddable(a, nl, &addr)) {
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p1 = gins(a, N, N);
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p1->to = addr;
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sudoclean();
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goto ret;
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}
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}
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break;
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case OSUB:
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if(smallintconst(nr))
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if(mpgetfix(nr->val.u.xval) == 1) {
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a = optoas(ODEC, nl->type);
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if(nl->addable) {
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gins(a, N, nl);
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goto ret;
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}
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if(sudoaddable(a, nl, &addr)) {
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p1 = gins(a, N, N);
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p1->to = addr;
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sudoclean();
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goto ret;
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}
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}
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break;
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}
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switch(n->etype) {
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case OADD:
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case OSUB:
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case OXOR:
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case OAND:
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case OOR:
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a = optoas(n->etype, nl->type);
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if(nl->addable) {
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if(smallintconst(nr)) {
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gins(a, nr, nl);
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goto ret;
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}
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regalloc(&n2, nr->type, N);
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cgen(nr, &n2);
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gins(a, &n2, nl);
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regfree(&n2);
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goto ret;
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}
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if(nr->ullman < UINF)
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if(sudoaddable(a, nl, &addr)) {
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if(smallintconst(nr)) {
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p1 = gins(a, nr, N);
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p1->to = addr;
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sudoclean();
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goto ret;
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}
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regalloc(&n2, nr->type, N);
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cgen(nr, &n2);
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p1 = gins(a, &n2, N);
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p1->to = addr;
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regfree(&n2);
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sudoclean();
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goto ret;
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}
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}
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hard:
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n2.op = 0;
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n1.op = 0;
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if(nr->ullman >= nl->ullman || nl->addable) {
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mgen(nr, &n2, N);
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nr = &n2;
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} else {
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tempname(&n2, nr->type);
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cgen(nr, &n2);
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nr = &n2;
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}
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if(!nl->addable) {
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igen(nl, &n1, N);
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nl = &n1;
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}
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|
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n3 = *n;
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n3.left = nl;
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n3.right = nr;
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n3.op = n->etype;
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|
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mgen(&n3, &n4, N);
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gmove(&n4, nl);
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|
|
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if(n1.op)
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regfree(&n1);
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mfree(&n2);
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mfree(&n4);
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|
|
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ret:
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;
|
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}
|
|
|
|
int
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samereg(Node *a, Node *b)
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{
|
|
if(a->op != OREGISTER)
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return 0;
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|
if(b->op != OREGISTER)
|
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return 0;
|
|
if(a->val.u.reg != b->val.u.reg)
|
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return 0;
|
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return 1;
|
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}
|
|
|
|
/*
|
|
* generate division.
|
|
* caller must set:
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|
* ax = allocated AX register
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* dx = allocated DX register
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* generates one of:
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* res = nl / nr
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* res = nl % nr
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* according to op.
|
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*/
|
|
void
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dodiv(int op, Node *nl, Node *nr, Node *res, Node *ax, Node *dx)
|
|
{
|
|
int check;
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|
Node n1, t1, t2, t3, t4, n4, nz;
|
|
Type *t, *t0;
|
|
Prog *p1, *p2;
|
|
|
|
// Have to be careful about handling
|
|
// most negative int divided by -1 correctly.
|
|
// The hardware will trap.
|
|
// Also the byte divide instruction needs AH,
|
|
// which we otherwise don't have to deal with.
|
|
// Easiest way to avoid for int8, int16: use int32.
|
|
// For int32 and int64, use explicit test.
|
|
// Could use int64 hw for int32.
|
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t = nl->type;
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t0 = t;
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check = 0;
|
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if(issigned[t->etype]) {
|
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check = 1;
|
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if(isconst(nl, CTINT) && mpgetfix(nl->val.u.xval) != -1LL<<(t->width*8-1))
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check = 0;
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else if(isconst(nr, CTINT) && mpgetfix(nr->val.u.xval) != -1)
|
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check = 0;
|
|
}
|
|
if(t->width < 4) {
|
|
if(issigned[t->etype])
|
|
t = types[TINT32];
|
|
else
|
|
t = types[TUINT32];
|
|
check = 0;
|
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}
|
|
|
|
tempname(&t1, t);
|
|
tempname(&t2, t);
|
|
if(t0 != t) {
|
|
tempname(&t3, t0);
|
|
tempname(&t4, t0);
|
|
cgen(nl, &t3);
|
|
cgen(nr, &t4);
|
|
// Convert.
|
|
gmove(&t3, &t1);
|
|
gmove(&t4, &t2);
|
|
} else {
|
|
cgen(nl, &t1);
|
|
cgen(nr, &t2);
|
|
}
|
|
|
|
if(!samereg(ax, res) && !samereg(dx, res))
|
|
regalloc(&n1, t, res);
|
|
else
|
|
regalloc(&n1, t, N);
|
|
gmove(&t2, &n1);
|
|
gmove(&t1, ax);
|
|
p2 = P;
|
|
if(check) {
|
|
nodconst(&n4, t, -1);
|
|
gins(optoas(OCMP, t), &n1, &n4);
|
|
p1 = gbranch(optoas(ONE, t), T, +1);
|
|
if(op == ODIV) {
|
|
// a / (-1) is -a.
|
|
gins(optoas(OMINUS, t), N, ax);
|
|
gmove(ax, res);
|
|
} else {
|
|
// a % (-1) is 0.
|
|
nodconst(&n4, t, 0);
|
|
gmove(&n4, res);
|
|
}
|
|
p2 = gbranch(AJMP, T, 0);
|
|
patch(p1, pc);
|
|
}
|
|
if(!issigned[t->etype]) {
|
|
nodconst(&nz, t, 0);
|
|
gmove(&nz, dx);
|
|
} else
|
|
gins(optoas(OEXTEND, t), N, N);
|
|
gins(optoas(op, t), &n1, N);
|
|
regfree(&n1);
|
|
|
|
if(op == ODIV)
|
|
gmove(ax, res);
|
|
else
|
|
gmove(dx, res);
|
|
if(check)
|
|
patch(p2, pc);
|
|
}
|
|
|
|
static void
|
|
savex(int dr, Node *x, Node *oldx, Node *res, Type *t)
|
|
{
|
|
int r;
|
|
|
|
r = reg[dr];
|
|
nodreg(x, types[TINT32], dr);
|
|
|
|
// save current ax and dx if they are live
|
|
// and not the destination
|
|
memset(oldx, 0, sizeof *oldx);
|
|
if(r > 0 && !samereg(x, res)) {
|
|
tempname(oldx, types[TINT32]);
|
|
gmove(x, oldx);
|
|
}
|
|
|
|
regalloc(x, t, x);
|
|
}
|
|
|
|
static void
|
|
restx(Node *x, Node *oldx)
|
|
{
|
|
regfree(x);
|
|
|
|
if(oldx->op != 0) {
|
|
x->type = types[TINT32];
|
|
gmove(oldx, x);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* generate division according to op, one of:
|
|
* res = nl / nr
|
|
* res = nl % nr
|
|
*/
|
|
void
|
|
cgen_div(int op, Node *nl, Node *nr, Node *res)
|
|
{
|
|
Node ax, dx, oldax, olddx;
|
|
Type *t;
|
|
|
|
if(is64(nl->type))
|
|
fatal("cgen_div %T", nl->type);
|
|
|
|
if(issigned[nl->type->etype])
|
|
t = types[TINT32];
|
|
else
|
|
t = types[TUINT32];
|
|
savex(D_AX, &ax, &oldax, res, t);
|
|
savex(D_DX, &dx, &olddx, res, t);
|
|
dodiv(op, nl, nr, res, &ax, &dx);
|
|
restx(&dx, &olddx);
|
|
restx(&ax, &oldax);
|
|
}
|
|
|
|
/*
|
|
* generate shift according to op, one of:
|
|
* res = nl << nr
|
|
* res = nl >> nr
|
|
*/
|
|
void
|
|
cgen_shift(int op, int bounded, Node *nl, Node *nr, Node *res)
|
|
{
|
|
Node n1, n2, nt, cx, oldcx, hi, lo;
|
|
int a, w;
|
|
Prog *p1, *p2;
|
|
uvlong sc;
|
|
|
|
if(nl->type->width > 4)
|
|
fatal("cgen_shift %T", nl->type);
|
|
|
|
w = nl->type->width * 8;
|
|
|
|
a = optoas(op, nl->type);
|
|
|
|
if(nr->op == OLITERAL) {
|
|
tempname(&n2, nl->type);
|
|
cgen(nl, &n2);
|
|
regalloc(&n1, nl->type, res);
|
|
gmove(&n2, &n1);
|
|
sc = mpgetfix(nr->val.u.xval);
|
|
if(sc >= nl->type->width*8) {
|
|
// large shift gets 2 shifts by width-1
|
|
gins(a, ncon(w-1), &n1);
|
|
gins(a, ncon(w-1), &n1);
|
|
} else
|
|
gins(a, nr, &n1);
|
|
gmove(&n1, res);
|
|
regfree(&n1);
|
|
return;
|
|
}
|
|
|
|
memset(&oldcx, 0, sizeof oldcx);
|
|
nodreg(&cx, types[TUINT32], D_CX);
|
|
if(reg[D_CX] > 1 && !samereg(&cx, res)) {
|
|
tempname(&oldcx, types[TUINT32]);
|
|
gmove(&cx, &oldcx);
|
|
}
|
|
|
|
if(nr->type->width > 4) {
|
|
tempname(&nt, nr->type);
|
|
n1 = nt;
|
|
} else {
|
|
nodreg(&n1, types[TUINT32], D_CX);
|
|
regalloc(&n1, nr->type, &n1); // to hold the shift type in CX
|
|
}
|
|
|
|
if(samereg(&cx, res))
|
|
regalloc(&n2, nl->type, N);
|
|
else
|
|
regalloc(&n2, nl->type, res);
|
|
if(nl->ullman >= nr->ullman) {
|
|
cgen(nl, &n2);
|
|
cgen(nr, &n1);
|
|
} else {
|
|
cgen(nr, &n1);
|
|
cgen(nl, &n2);
|
|
}
|
|
|
|
// test and fix up large shifts
|
|
if(bounded) {
|
|
if(nr->type->width > 4) {
|
|
// delayed reg alloc
|
|
nodreg(&n1, types[TUINT32], D_CX);
|
|
regalloc(&n1, types[TUINT32], &n1); // to hold the shift type in CX
|
|
split64(&nt, &lo, &hi);
|
|
gmove(&lo, &n1);
|
|
splitclean();
|
|
}
|
|
} else {
|
|
if(nr->type->width > 4) {
|
|
// delayed reg alloc
|
|
nodreg(&n1, types[TUINT32], D_CX);
|
|
regalloc(&n1, types[TUINT32], &n1); // to hold the shift type in CX
|
|
split64(&nt, &lo, &hi);
|
|
gmove(&lo, &n1);
|
|
gins(optoas(OCMP, types[TUINT32]), &hi, ncon(0));
|
|
p2 = gbranch(optoas(ONE, types[TUINT32]), T, +1);
|
|
gins(optoas(OCMP, types[TUINT32]), &n1, ncon(w));
|
|
p1 = gbranch(optoas(OLT, types[TUINT32]), T, +1);
|
|
splitclean();
|
|
patch(p2, pc);
|
|
} else {
|
|
gins(optoas(OCMP, nr->type), &n1, ncon(w));
|
|
p1 = gbranch(optoas(OLT, types[TUINT32]), T, +1);
|
|
}
|
|
if(op == ORSH && issigned[nl->type->etype]) {
|
|
gins(a, ncon(w-1), &n2);
|
|
} else {
|
|
gmove(ncon(0), &n2);
|
|
}
|
|
patch(p1, pc);
|
|
}
|
|
gins(a, &n1, &n2);
|
|
|
|
if(oldcx.op != 0)
|
|
gmove(&oldcx, &cx);
|
|
|
|
gmove(&n2, res);
|
|
|
|
regfree(&n1);
|
|
regfree(&n2);
|
|
}
|
|
|
|
/*
|
|
* generate byte multiply:
|
|
* res = nl * nr
|
|
* there is no 2-operand byte multiply instruction so
|
|
* we do a full-width multiplication and truncate afterwards.
|
|
*/
|
|
void
|
|
cgen_bmul(int op, Node *nl, Node *nr, Node *res)
|
|
{
|
|
Node n1, n2, nt, *tmp;
|
|
Type *t;
|
|
int a;
|
|
|
|
// copy from byte to full registers
|
|
t = types[TUINT32];
|
|
if(issigned[nl->type->etype])
|
|
t = types[TINT32];
|
|
|
|
// largest ullman on left.
|
|
if(nl->ullman < nr->ullman) {
|
|
tmp = nl;
|
|
nl = nr;
|
|
nr = tmp;
|
|
}
|
|
|
|
tempname(&nt, nl->type);
|
|
cgen(nl, &nt);
|
|
regalloc(&n1, t, res);
|
|
cgen(nr, &n1);
|
|
regalloc(&n2, t, N);
|
|
gmove(&nt, &n2);
|
|
a = optoas(op, t);
|
|
gins(a, &n2, &n1);
|
|
regfree(&n2);
|
|
gmove(&n1, res);
|
|
regfree(&n1);
|
|
}
|
|
|
|
/*
|
|
* generate high multiply:
|
|
* res = (nl*nr) >> width
|
|
*/
|
|
void
|
|
cgen_hmul(Node *nl, Node *nr, Node *res)
|
|
{
|
|
Type *t;
|
|
int a;
|
|
Node n1, n2, ax, dx;
|
|
|
|
t = nl->type;
|
|
a = optoas(OHMUL, t);
|
|
// gen nl in n1.
|
|
tempname(&n1, t);
|
|
cgen(nl, &n1);
|
|
// gen nr in n2.
|
|
regalloc(&n2, t, res);
|
|
cgen(nr, &n2);
|
|
|
|
// multiply.
|
|
nodreg(&ax, t, D_AX);
|
|
gmove(&n2, &ax);
|
|
gins(a, &n1, N);
|
|
regfree(&n2);
|
|
|
|
if(t->width == 1) {
|
|
// byte multiply behaves differently.
|
|
nodreg(&ax, t, D_AH);
|
|
nodreg(&dx, t, D_DL);
|
|
gmove(&ax, &dx);
|
|
}
|
|
nodreg(&dx, t, D_DX);
|
|
gmove(&dx, res);
|
|
}
|
|
|
|
static void cgen_float387(Node *n, Node *res);
|
|
static void cgen_floatsse(Node *n, Node *res);
|
|
|
|
/*
|
|
* generate floating-point operation.
|
|
*/
|
|
void
|
|
cgen_float(Node *n, Node *res)
|
|
{
|
|
Node *nl;
|
|
Node n1, n2;
|
|
Prog *p1, *p2, *p3;
|
|
|
|
nl = n->left;
|
|
switch(n->op) {
|
|
case OEQ:
|
|
case ONE:
|
|
case OLT:
|
|
case OLE:
|
|
case OGE:
|
|
p1 = gbranch(AJMP, T, 0);
|
|
p2 = pc;
|
|
gmove(nodbool(1), res);
|
|
p3 = gbranch(AJMP, T, 0);
|
|
patch(p1, pc);
|
|
bgen(n, 1, 0, p2);
|
|
gmove(nodbool(0), res);
|
|
patch(p3, pc);
|
|
return;
|
|
|
|
case OPLUS:
|
|
cgen(nl, res);
|
|
return;
|
|
|
|
case OCONV:
|
|
if(eqtype(n->type, nl->type) || noconv(n->type, nl->type)) {
|
|
cgen(nl, res);
|
|
return;
|
|
}
|
|
|
|
tempname(&n2, n->type);
|
|
mgen(nl, &n1, res);
|
|
gmove(&n1, &n2);
|
|
gmove(&n2, res);
|
|
mfree(&n1);
|
|
return;
|
|
}
|
|
|
|
if(use_sse)
|
|
cgen_floatsse(n, res);
|
|
else
|
|
cgen_float387(n, res);
|
|
}
|
|
|
|
// floating-point. 387 (not SSE2)
|
|
static void
|
|
cgen_float387(Node *n, Node *res)
|
|
{
|
|
Node f0, f1;
|
|
Node *nl, *nr;
|
|
|
|
nl = n->left;
|
|
nr = n->right;
|
|
nodreg(&f0, nl->type, D_F0);
|
|
nodreg(&f1, n->type, D_F0+1);
|
|
if(nr != N)
|
|
goto flt2;
|
|
|
|
// unary
|
|
cgen(nl, &f0);
|
|
if(n->op != OCONV && n->op != OPLUS)
|
|
gins(foptoas(n->op, n->type, 0), N, N);
|
|
gmove(&f0, res);
|
|
return;
|
|
|
|
flt2: // binary
|
|
if(nl->ullman >= nr->ullman) {
|
|
cgen(nl, &f0);
|
|
if(nr->addable)
|
|
gins(foptoas(n->op, n->type, 0), nr, &f0);
|
|
else {
|
|
cgen(nr, &f0);
|
|
gins(foptoas(n->op, n->type, Fpop), &f0, &f1);
|
|
}
|
|
} else {
|
|
cgen(nr, &f0);
|
|
if(nl->addable)
|
|
gins(foptoas(n->op, n->type, Frev), nl, &f0);
|
|
else {
|
|
cgen(nl, &f0);
|
|
gins(foptoas(n->op, n->type, Frev|Fpop), &f0, &f1);
|
|
}
|
|
}
|
|
gmove(&f0, res);
|
|
return;
|
|
|
|
}
|
|
|
|
static void
|
|
cgen_floatsse(Node *n, Node *res)
|
|
{
|
|
Node *nl, *nr, *r;
|
|
Node n1, n2, nt;
|
|
int a;
|
|
|
|
nl = n->left;
|
|
nr = n->right;
|
|
switch(n->op) {
|
|
default:
|
|
dump("cgen_floatsse", n);
|
|
fatal("cgen_floatsse %O", n->op);
|
|
return;
|
|
|
|
case OMINUS:
|
|
case OCOM:
|
|
nr = nodintconst(-1);
|
|
convlit(&nr, n->type);
|
|
a = foptoas(OMUL, nl->type, 0);
|
|
goto sbop;
|
|
|
|
// symmetric binary
|
|
case OADD:
|
|
case OMUL:
|
|
a = foptoas(n->op, nl->type, 0);
|
|
goto sbop;
|
|
|
|
// asymmetric binary
|
|
case OSUB:
|
|
case OMOD:
|
|
case ODIV:
|
|
a = foptoas(n->op, nl->type, 0);
|
|
goto abop;
|
|
}
|
|
|
|
sbop: // symmetric binary
|
|
if(nl->ullman < nr->ullman || nl->op == OLITERAL) {
|
|
r = nl;
|
|
nl = nr;
|
|
nr = r;
|
|
}
|
|
|
|
abop: // asymmetric binary
|
|
if(nl->ullman >= nr->ullman) {
|
|
tempname(&nt, nl->type);
|
|
cgen(nl, &nt);
|
|
mgen(nr, &n2, N);
|
|
regalloc(&n1, nl->type, res);
|
|
gmove(&nt, &n1);
|
|
gins(a, &n2, &n1);
|
|
gmove(&n1, res);
|
|
regfree(&n1);
|
|
mfree(&n2);
|
|
} else {
|
|
regalloc(&n2, nr->type, res);
|
|
cgen(nr, &n2);
|
|
regalloc(&n1, nl->type, N);
|
|
cgen(nl, &n1);
|
|
gins(a, &n2, &n1);
|
|
regfree(&n2);
|
|
gmove(&n1, res);
|
|
regfree(&n1);
|
|
}
|
|
return;
|
|
}
|
|
|
|
void
|
|
bgen_float(Node *n, int true, int likely, Prog *to)
|
|
{
|
|
int et, a;
|
|
Node *nl, *nr, *r;
|
|
Node n1, n2, n3, tmp, t1, t2, ax;
|
|
Prog *p1, *p2;
|
|
|
|
nl = n->left;
|
|
nr = n->right;
|
|
a = n->op;
|
|
if(!true) {
|
|
// brcom is not valid on floats when NaN is involved.
|
|
p1 = gbranch(AJMP, T, 0);
|
|
p2 = gbranch(AJMP, T, 0);
|
|
patch(p1, pc);
|
|
// No need to avoid re-genning ninit.
|
|
bgen_float(n, 1, -likely, p2);
|
|
patch(gbranch(AJMP, T, 0), to);
|
|
patch(p2, pc);
|
|
return;
|
|
}
|
|
|
|
if(use_sse)
|
|
goto sse;
|
|
else
|
|
goto x87;
|
|
|
|
x87:
|
|
a = brrev(a); // because the args are stacked
|
|
if(a == OGE || a == OGT) {
|
|
// only < and <= work right with NaN; reverse if needed
|
|
r = nr;
|
|
nr = nl;
|
|
nl = r;
|
|
a = brrev(a);
|
|
}
|
|
|
|
nodreg(&tmp, nr->type, D_F0);
|
|
nodreg(&n2, nr->type, D_F0 + 1);
|
|
nodreg(&ax, types[TUINT16], D_AX);
|
|
et = simsimtype(nr->type);
|
|
if(et == TFLOAT64) {
|
|
if(nl->ullman > nr->ullman) {
|
|
cgen(nl, &tmp);
|
|
cgen(nr, &tmp);
|
|
gins(AFXCHD, &tmp, &n2);
|
|
} else {
|
|
cgen(nr, &tmp);
|
|
cgen(nl, &tmp);
|
|
}
|
|
gins(AFUCOMIP, &tmp, &n2);
|
|
gins(AFMOVDP, &tmp, &tmp); // annoying pop but still better than STSW+SAHF
|
|
} else {
|
|
// TODO(rsc): The moves back and forth to memory
|
|
// here are for truncating the value to 32 bits.
|
|
// This handles 32-bit comparison but presumably
|
|
// all the other ops have the same problem.
|
|
// We need to figure out what the right general
|
|
// solution is, besides telling people to use float64.
|
|
tempname(&t1, types[TFLOAT32]);
|
|
tempname(&t2, types[TFLOAT32]);
|
|
cgen(nr, &t1);
|
|
cgen(nl, &t2);
|
|
gmove(&t2, &tmp);
|
|
gins(AFCOMFP, &t1, &tmp);
|
|
gins(AFSTSW, N, &ax);
|
|
gins(ASAHF, N, N);
|
|
}
|
|
|
|
goto ret;
|
|
|
|
sse:
|
|
if(!nl->addable) {
|
|
tempname(&n1, nl->type);
|
|
cgen(nl, &n1);
|
|
nl = &n1;
|
|
}
|
|
if(!nr->addable) {
|
|
tempname(&tmp, nr->type);
|
|
cgen(nr, &tmp);
|
|
nr = &tmp;
|
|
}
|
|
regalloc(&n2, nr->type, N);
|
|
gmove(nr, &n2);
|
|
nr = &n2;
|
|
|
|
if(nl->op != OREGISTER) {
|
|
regalloc(&n3, nl->type, N);
|
|
gmove(nl, &n3);
|
|
nl = &n3;
|
|
}
|
|
|
|
if(a == OGE || a == OGT) {
|
|
// only < and <= work right with NaN; reverse if needed
|
|
r = nr;
|
|
nr = nl;
|
|
nl = r;
|
|
a = brrev(a);
|
|
}
|
|
|
|
gins(foptoas(OCMP, nr->type, 0), nl, nr);
|
|
if(nl->op == OREGISTER)
|
|
regfree(nl);
|
|
regfree(nr);
|
|
|
|
ret:
|
|
if(a == OEQ) {
|
|
// neither NE nor P
|
|
p1 = gbranch(AJNE, T, -likely);
|
|
p2 = gbranch(AJPS, T, -likely);
|
|
patch(gbranch(AJMP, T, 0), to);
|
|
patch(p1, pc);
|
|
patch(p2, pc);
|
|
} else if(a == ONE) {
|
|
// either NE or P
|
|
patch(gbranch(AJNE, T, likely), to);
|
|
patch(gbranch(AJPS, T, likely), to);
|
|
} else
|
|
patch(gbranch(optoas(a, nr->type), T, likely), to);
|
|
|
|
}
|