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997636760e
Provide and use rotation pseudo-instructions for riscv64. The RISC-V bitmanip extension adds support for hardware rotation instructions in the form of ROL, ROLW, ROR, RORI, RORIW and RORW. These are easily implemented in the assembler as pseudo-instructions for CPUs that do not support the bitmanip extension. This approach provides a number of advantages, including reducing the rewrite rules needed in the compiler, simplifying codegen tests and most importantly, allowing these instructions to be used in assembly (for example, riscv64 optimised versions of SHA-256 and SHA-512). When bitmanip support is added, these instruction sequences can simply be replaced with a single instruction if permitted by the GORISCV64 profile. Change-Id: Ia23402e1a82f211ac760690deb063386056ae1fa Reviewed-on: https://go-review.googlesource.com/c/go/+/565015 TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Michael Knyszek <mknyszek@google.com> Reviewed-by: M Zhuo <mengzhuo1203@gmail.com> Reviewed-by: Carlos Amedee <carlos@golang.org> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Run-TryBot: Joel Sing <joel@sing.id.au>
282 lines
6.0 KiB
Go
282 lines
6.0 KiB
Go
// asmcheck
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// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package codegen
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import "math/bits"
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// ------------------- //
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// const rotates //
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// ------------------- //
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func rot64(x uint64) uint64 {
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var a uint64
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// amd64:"ROLQ\t[$]7"
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// ppc64x:"ROTL\t[$]7"
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// loong64: "ROTRV\t[$]57"
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// riscv64: "RORI\t[$]57"
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a += x<<7 | x>>57
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// amd64:"ROLQ\t[$]8"
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// arm64:"ROR\t[$]56"
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// s390x:"RISBGZ\t[$]0, [$]63, [$]8, "
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// ppc64x:"ROTL\t[$]8"
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// loong64: "ROTRV\t[$]56"
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// riscv64: "RORI\t[$]56"
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a += x<<8 + x>>56
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// amd64:"ROLQ\t[$]9"
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// arm64:"ROR\t[$]55"
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// s390x:"RISBGZ\t[$]0, [$]63, [$]9, "
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// ppc64x:"ROTL\t[$]9"
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// loong64: "ROTRV\t[$]55"
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// riscv64: "RORI\t[$]55"
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a += x<<9 ^ x>>55
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// amd64:"ROLQ\t[$]10"
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// arm64:"ROR\t[$]54"
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// s390x:"RISBGZ\t[$]0, [$]63, [$]10, "
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// ppc64x:"ROTL\t[$]10"
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// arm64:"ROR\t[$]54"
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// s390x:"RISBGZ\t[$]0, [$]63, [$]10, "
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// loong64: "ROTRV\t[$]54"
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// riscv64: "RORI\t[$]54"
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a += bits.RotateLeft64(x, 10)
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return a
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}
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func rot32(x uint32) uint32 {
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var a uint32
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// amd64:"ROLL\t[$]7"
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// arm:"MOVW\tR\\d+@>25"
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// ppc64x:"ROTLW\t[$]7"
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// loong64: "ROTR\t[$]25"
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// riscv64: "RORIW\t[$]25"
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a += x<<7 | x>>25
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// amd64:`ROLL\t[$]8`
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// arm:"MOVW\tR\\d+@>24"
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// arm64:"RORW\t[$]24"
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// s390x:"RLL\t[$]8"
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// ppc64x:"ROTLW\t[$]8"
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// loong64: "ROTR\t[$]24"
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// riscv64: "RORIW\t[$]24"
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a += x<<8 + x>>24
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// amd64:"ROLL\t[$]9"
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// arm:"MOVW\tR\\d+@>23"
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// arm64:"RORW\t[$]23"
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// s390x:"RLL\t[$]9"
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// ppc64x:"ROTLW\t[$]9"
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// loong64: "ROTR\t[$]23"
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// riscv64: "RORIW\t[$]23"
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a += x<<9 ^ x>>23
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// amd64:"ROLL\t[$]10"
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// arm:"MOVW\tR\\d+@>22"
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// arm64:"RORW\t[$]22"
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// s390x:"RLL\t[$]10"
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// ppc64x:"ROTLW\t[$]10"
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// arm64:"RORW\t[$]22"
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// s390x:"RLL\t[$]10"
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// loong64: "ROTR\t[$]22"
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// riscv64: "RORIW\t[$]22"
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a += bits.RotateLeft32(x, 10)
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return a
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}
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func rot16(x uint16) uint16 {
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var a uint16
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// amd64:"ROLW\t[$]7"
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// riscv64: "OR","SLLI","SRLI",-"AND"
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a += x<<7 | x>>9
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// amd64:`ROLW\t[$]8`
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// riscv64: "OR","SLLI","SRLI",-"AND"
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a += x<<8 + x>>8
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// amd64:"ROLW\t[$]9"
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// riscv64: "OR","SLLI","SRLI",-"AND"
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a += x<<9 ^ x>>7
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return a
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}
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func rot8(x uint8) uint8 {
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var a uint8
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// amd64:"ROLB\t[$]5"
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// riscv64: "OR","SLLI","SRLI",-"AND"
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a += x<<5 | x>>3
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// amd64:`ROLB\t[$]6`
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// riscv64: "OR","SLLI","SRLI",-"AND"
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a += x<<6 + x>>2
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// amd64:"ROLB\t[$]7"
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// riscv64: "OR","SLLI","SRLI",-"AND"
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a += x<<7 ^ x>>1
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return a
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}
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// ----------------------- //
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// non-const rotates //
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// ----------------------- //
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func rot64nc(x uint64, z uint) uint64 {
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var a uint64
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z &= 63
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// amd64:"ROLQ",-"AND"
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// arm64:"ROR","NEG",-"AND"
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// ppc64x:"ROTL",-"NEG",-"AND"
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// loong64: "ROTRV", -"AND"
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// riscv64: "ROL",-"AND"
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a += x<<z | x>>(64-z)
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// amd64:"RORQ",-"AND"
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// arm64:"ROR",-"NEG",-"AND"
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// ppc64x:"ROTL","NEG",-"AND"
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// loong64: "ROTRV", -"AND"
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// riscv64: "ROR",-"AND"
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a += x>>z | x<<(64-z)
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return a
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}
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func rot32nc(x uint32, z uint) uint32 {
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var a uint32
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z &= 31
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// amd64:"ROLL",-"AND"
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// arm64:"ROR","NEG",-"AND"
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// ppc64x:"ROTLW",-"NEG",-"AND"
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// loong64: "ROTR", -"AND"
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// riscv64: "ROLW",-"AND"
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a += x<<z | x>>(32-z)
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// amd64:"RORL",-"AND"
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// arm64:"ROR",-"NEG",-"AND"
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// ppc64x:"ROTLW","NEG",-"AND"
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// loong64: "ROTR", -"AND"
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// riscv64: "RORW",-"AND"
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a += x>>z | x<<(32-z)
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return a
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}
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func rot16nc(x uint16, z uint) uint16 {
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var a uint16
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z &= 15
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// amd64:"ROLW",-"ANDQ"
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// riscv64: "OR","SLL","SRL",-"AND\t"
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a += x<<z | x>>(16-z)
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// amd64:"RORW",-"ANDQ"
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// riscv64: "OR","SLL","SRL",-"AND\t"
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a += x>>z | x<<(16-z)
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return a
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}
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func rot8nc(x uint8, z uint) uint8 {
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var a uint8
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z &= 7
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// amd64:"ROLB",-"ANDQ"
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// riscv64: "OR","SLL","SRL",-"AND\t"
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a += x<<z | x>>(8-z)
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// amd64:"RORB",-"ANDQ"
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// riscv64: "OR","SLL","SRL",-"AND\t"
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a += x>>z | x<<(8-z)
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return a
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}
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// Issue 18254: rotate after inlining
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func f32(x uint32) uint32 {
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// amd64:"ROLL\t[$]7"
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return rot32nc(x, 7)
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}
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func doubleRotate(x uint64) uint64 {
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x = (x << 5) | (x >> 59)
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// amd64:"ROLQ\t[$]15"
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// arm64:"ROR\t[$]49"
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x = (x << 10) | (x >> 54)
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return x
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}
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// --------------------------------------- //
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// Combined Rotate + Masking operations //
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// --------------------------------------- //
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func checkMaskedRotate32(a []uint32, r int) {
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i := 0
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// ppc64x: "RLWNM\t[$]16, R[0-9]+, [$]8, [$]15, R[0-9]+"
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a[i] = bits.RotateLeft32(a[i], 16) & 0xFF0000
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i++
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// ppc64x: "RLWNM\t[$]16, R[0-9]+, [$]8, [$]15, R[0-9]+"
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a[i] = bits.RotateLeft32(a[i]&0xFF, 16)
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i++
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// ppc64x: "RLWNM\t[$]4, R[0-9]+, [$]20, [$]27, R[0-9]+"
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a[i] = bits.RotateLeft32(a[i], 4) & 0xFF0
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i++
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// ppc64x: "RLWNM\t[$]16, R[0-9]+, [$]24, [$]31, R[0-9]+"
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a[i] = bits.RotateLeft32(a[i]&0xFF0000, 16)
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i++
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// ppc64x: "RLWNM\tR[0-9]+, R[0-9]+, [$]8, [$]15, R[0-9]+"
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a[i] = bits.RotateLeft32(a[i], r) & 0xFF0000
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i++
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// ppc64x: "RLWNM\tR[0-9]+, R[0-9]+, [$]16, [$]23, R[0-9]+"
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a[i] = bits.RotateLeft32(a[i], r) & 0xFF00
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i++
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// ppc64x: "RLWNM\tR[0-9]+, R[0-9]+, [$]20, [$]11, R[0-9]+"
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a[i] = bits.RotateLeft32(a[i], r) & 0xFFF00FFF
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i++
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// ppc64x: "RLWNM\t[$]4, R[0-9]+, [$]20, [$]11, R[0-9]+"
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a[i] = bits.RotateLeft32(a[i], 4) & 0xFFF00FFF
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i++
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}
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// combined arithmetic and rotate on arm64
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func checkArithmeticWithRotate(a *[1000]uint64) {
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// arm64: "AND\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
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a[2] = a[1] & bits.RotateLeft64(a[0], 13)
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// arm64: "ORR\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
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a[5] = a[4] | bits.RotateLeft64(a[3], 13)
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// arm64: "EOR\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
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a[8] = a[7] ^ bits.RotateLeft64(a[6], 13)
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// arm64: "MVN\tR[0-9]+@>51, R[0-9]+"
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a[10] = ^bits.RotateLeft64(a[9], 13)
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// arm64: "BIC\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
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a[13] = a[12] &^ bits.RotateLeft64(a[11], 13)
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// arm64: "EON\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
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a[16] = a[15] ^ ^bits.RotateLeft64(a[14], 13)
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// arm64: "ORN\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
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a[19] = a[18] | ^bits.RotateLeft64(a[17], 13)
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// arm64: "TST\tR[0-9]+@>51, R[0-9]+"
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if a[18]&bits.RotateLeft64(a[19], 13) == 0 {
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a[20] = 1
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}
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}
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