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8303a13bb8
On Plan 9, the kernel disallows the use of floating point instructions while handling a note. Previously, we worked around this by using a simple loop in place of memmove. When I added that work-around, I verified that all paths from the note handler didn't end up calling memmove. Now that memclr is using SSE instructions, the same process will have to be done again. Instead of doing that, however, this CL just punts and uses unoptimized functions everywhere on Plan 9. LGTM=rsc R=rsc, 0intro CC=golang-codereviews https://golang.org/cl/73830044
208 lines
4.6 KiB
ArmAsm
208 lines
4.6 KiB
ArmAsm
// Derived from Inferno's libkern/memmove-386.s (adapted for amd64)
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// http://code.google.com/p/inferno-os/source/browse/libkern/memmove-386.s
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//
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// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
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// Revisions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com). All rights reserved.
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// Portions Copyright 2009 The Go Authors. All rights reserved.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// THE SOFTWARE.
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// +build !plan9
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#include "../../cmd/ld/textflag.h"
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// void runtime·memmove(void*, void*, uintptr)
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TEXT runtime·memmove(SB), NOSPLIT, $0-24
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MOVQ to+0(FP), DI
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MOVQ fr+8(FP), SI
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MOVQ n+16(FP), BX
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// REP instructions have a high startup cost, so we handle small sizes
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// with some straightline code. The REP MOVSQ instruction is really fast
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// for large sizes. The cutover is approximately 1K. We implement up to
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// 256 because that is the maximum SSE register load (loading all data
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// into registers lets us ignore copy direction).
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tail:
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TESTQ BX, BX
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JEQ move_0
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CMPQ BX, $2
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JBE move_1or2
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CMPQ BX, $4
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JBE move_3or4
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CMPQ BX, $8
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JBE move_5through8
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CMPQ BX, $16
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JBE move_9through16
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CMPQ BX, $32
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JBE move_17through32
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CMPQ BX, $64
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JBE move_33through64
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CMPQ BX, $128
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JBE move_65through128
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CMPQ BX, $256
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JBE move_129through256
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// TODO: use branch table and BSR to make this just a single dispatch
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/*
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* check and set for backwards
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*/
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CMPQ SI, DI
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JLS back
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/*
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* forward copy loop
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*/
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forward:
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MOVQ BX, CX
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SHRQ $3, CX
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ANDQ $7, BX
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REP; MOVSQ
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JMP tail
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back:
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/*
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* check overlap
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*/
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MOVQ SI, CX
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ADDQ BX, CX
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CMPQ CX, DI
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JLS forward
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/*
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* whole thing backwards has
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* adjusted addresses
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*/
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ADDQ BX, DI
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ADDQ BX, SI
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STD
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/*
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* copy
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*/
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MOVQ BX, CX
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SHRQ $3, CX
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ANDQ $7, BX
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SUBQ $8, DI
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SUBQ $8, SI
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REP; MOVSQ
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CLD
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ADDQ $8, DI
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ADDQ $8, SI
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SUBQ BX, DI
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SUBQ BX, SI
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JMP tail
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move_1or2:
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MOVB (SI), AX
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MOVB -1(SI)(BX*1), CX
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MOVB AX, (DI)
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MOVB CX, -1(DI)(BX*1)
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move_0:
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RET
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move_3or4:
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MOVW (SI), AX
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MOVW -2(SI)(BX*1), CX
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MOVW AX, (DI)
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MOVW CX, -2(DI)(BX*1)
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RET
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move_5through8:
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MOVL (SI), AX
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MOVL -4(SI)(BX*1), CX
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MOVL AX, (DI)
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MOVL CX, -4(DI)(BX*1)
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RET
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move_9through16:
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MOVQ (SI), AX
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MOVQ -8(SI)(BX*1), CX
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MOVQ AX, (DI)
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MOVQ CX, -8(DI)(BX*1)
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RET
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move_17through32:
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MOVOU (SI), X0
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MOVOU -16(SI)(BX*1), X1
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MOVOU X0, (DI)
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MOVOU X1, -16(DI)(BX*1)
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RET
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move_33through64:
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MOVOU (SI), X0
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MOVOU 16(SI), X1
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MOVOU -32(SI)(BX*1), X2
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MOVOU -16(SI)(BX*1), X3
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MOVOU X0, (DI)
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MOVOU X1, 16(DI)
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MOVOU X2, -32(DI)(BX*1)
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MOVOU X3, -16(DI)(BX*1)
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RET
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move_65through128:
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MOVOU (SI), X0
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MOVOU 16(SI), X1
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MOVOU 32(SI), X2
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MOVOU 48(SI), X3
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MOVOU -64(SI)(BX*1), X4
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MOVOU -48(SI)(BX*1), X5
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MOVOU -32(SI)(BX*1), X6
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MOVOU -16(SI)(BX*1), X7
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MOVOU X0, (DI)
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MOVOU X1, 16(DI)
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MOVOU X2, 32(DI)
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MOVOU X3, 48(DI)
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MOVOU X4, -64(DI)(BX*1)
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MOVOU X5, -48(DI)(BX*1)
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MOVOU X6, -32(DI)(BX*1)
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MOVOU X7, -16(DI)(BX*1)
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RET
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move_129through256:
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MOVOU (SI), X0
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MOVOU 16(SI), X1
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MOVOU 32(SI), X2
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MOVOU 48(SI), X3
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MOVOU 64(SI), X4
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MOVOU 80(SI), X5
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MOVOU 96(SI), X6
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MOVOU 112(SI), X7
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MOVOU -128(SI)(BX*1), X8
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MOVOU -112(SI)(BX*1), X9
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MOVOU -96(SI)(BX*1), X10
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MOVOU -80(SI)(BX*1), X11
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MOVOU -64(SI)(BX*1), X12
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MOVOU -48(SI)(BX*1), X13
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MOVOU -32(SI)(BX*1), X14
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MOVOU -16(SI)(BX*1), X15
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MOVOU X0, (DI)
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MOVOU X1, 16(DI)
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MOVOU X2, 32(DI)
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MOVOU X3, 48(DI)
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MOVOU X4, 64(DI)
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MOVOU X5, 80(DI)
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MOVOU X6, 96(DI)
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MOVOU X7, 112(DI)
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MOVOU X8, -128(DI)(BX*1)
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MOVOU X9, -112(DI)(BX*1)
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MOVOU X10, -96(DI)(BX*1)
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MOVOU X11, -80(DI)(BX*1)
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MOVOU X12, -64(DI)(BX*1)
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MOVOU X13, -48(DI)(BX*1)
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MOVOU X14, -32(DI)(BX*1)
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MOVOU X15, -16(DI)(BX*1)
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RET
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